1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1i8(i8* %A) nounwind {
6 %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A)
10 define <4 x i16> @vld1i16(i16* %A) nounwind {
13 %tmp0 = bitcast i16* %A to i8*
14 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0)
18 define <2 x i32> @vld1i32(i32* %A) nounwind {
21 %tmp0 = bitcast i32* %A to i8*
22 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0)
26 define <2 x float> @vld1f(float* %A) nounwind {
29 %tmp0 = bitcast float* %A to i8*
30 %tmp1 = call <2 x float> @llvm.arm.neon.vld1.v2f32(i8* %tmp0)
34 define <1 x i64> @vld1i64(i64* %A) nounwind {
37 %tmp0 = bitcast i64* %A to i8*
38 %tmp1 = call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %tmp0)
42 define <16 x i8> @vld1Qi8(i8* %A) nounwind {
45 %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A)
49 define <8 x i16> @vld1Qi16(i16* %A) nounwind {
52 %tmp0 = bitcast i16* %A to i8*
53 %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0)
57 define <4 x i32> @vld1Qi32(i32* %A) nounwind {
60 %tmp0 = bitcast i32* %A to i8*
61 %tmp1 = call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %tmp0)
65 define <4 x float> @vld1Qf(float* %A) nounwind {
68 %tmp0 = bitcast float* %A to i8*
69 %tmp1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %tmp0)
73 define <2 x i64> @vld1Qi64(i64* %A) nounwind {
76 %tmp0 = bitcast i64* %A to i8*
77 %tmp1 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %tmp0)
81 declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*) nounwind readonly
82 declare <4 x i16> @llvm.arm.neon.vld1.v4i16(i8*) nounwind readonly
83 declare <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*) nounwind readonly
84 declare <2 x float> @llvm.arm.neon.vld1.v2f32(i8*) nounwind readonly
85 declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*) nounwind readonly
87 declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8*) nounwind readonly
88 declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*) nounwind readonly
89 declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly
90 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
91 declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly