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ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git] / test / CodeGen / ARM / ret0.ll
1 ; RUN: llc < %s -march=arm
2
3 define i32 @test() {
4         ret i32 0
5 }
C/C++ LLVM-based compilers that forbids OOTA behaviors