1 ; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin > %t
3 ; RUN: FileCheck %s < %t
4 ; RUN: FileCheck %s < %t --check-prefix=CHECK-T2ADDRMODE
10 define i64 @f0(i8* %p) nounwind readonly {
12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
13 %0 = extractvalue %0 %ldrexd, 1
14 %1 = extractvalue %0 %ldrexd, 0
15 %2 = zext i32 %0 to i64
16 %3 = zext i32 %1 to i64
17 %shl = shl nuw i64 %2, 32
24 define i32 @f1(i8* %ptr, i64 %val) nounwind {
26 %tmp4 = trunc i64 %val to i32
27 %tmp6 = lshr i64 %val, 32
28 %tmp7 = trunc i64 %tmp6 to i32
29 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
33 declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
34 declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
36 ; CHECK-LABEL: test_load_i8:
37 ; CHECK: ldrexb r0, [r0]
40 define zeroext i8 @test_load_i8(i8* %addr) {
41 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
42 %val8 = trunc i32 %val to i8
46 ; CHECK-LABEL: test_load_i16:
47 ; CHECK: ldrexh r0, [r0]
50 define zeroext i16 @test_load_i16(i16* %addr) {
51 %val = call i32 @llvm.arm.ldrex.p0i16(i16* %addr)
52 %val16 = trunc i32 %val to i16
56 ; CHECK-LABEL: test_load_i32:
57 ; CHECK: ldrex r0, [r0]
58 define i32 @test_load_i32(i32* %addr) {
59 %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr)
63 declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly
64 declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly
65 declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonly
67 ; CHECK-LABEL: test_store_i8:
69 ; CHECK: strexb r0, r1, [r2]
70 define i32 @test_store_i8(i32, i8 %val, i8* %addr) {
71 %extval = zext i8 %val to i32
72 %res = call i32 @llvm.arm.strex.p0i8(i32 %extval, i8* %addr)
76 ; CHECK-LABEL: test_store_i16:
78 ; CHECK: strexh r0, r1, [r2]
79 define i32 @test_store_i16(i32, i16 %val, i16* %addr) {
80 %extval = zext i16 %val to i32
81 %res = call i32 @llvm.arm.strex.p0i16(i32 %extval, i16* %addr)
85 ; CHECK-LABEL: test_store_i32:
86 ; CHECK: strex r0, r1, [r2]
87 define i32 @test_store_i32(i32, i32 %val, i32* %addr) {
88 %res = call i32 @llvm.arm.strex.p0i32(i32 %val, i32* %addr)
92 declare i32 @llvm.arm.strex.p0i8(i32, i8*) nounwind
93 declare i32 @llvm.arm.strex.p0i16(i32, i16*) nounwind
94 declare i32 @llvm.arm.strex.p0i32(i32, i32*) nounwind
96 ; CHECK-LABEL: test_clear:
98 define void @test_clear() {
99 call void @llvm.arm.clrex()
103 declare void @llvm.arm.clrex() nounwind
105 @base = global i32* null
107 define void @excl_addrmode() {
108 ; CHECK-T2ADDRMODE-LABEL: excl_addrmode:
109 %base1020 = load i32*, i32** @base
110 %offset1020 = getelementptr i32, i32* %base1020, i32 255
111 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1020)
112 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1020)
113 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [{{r[0-9]+}}, #1020]
114 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [{{r[0-9]+}}, #1020]
116 %base1024 = load i32*, i32** @base
117 %offset1024 = getelementptr i32, i32* %base1024, i32 256
118 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1024)
119 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1024)
120 ; CHECK-T2ADDRMODE: add.w r[[ADDR:[0-9]+]], {{r[0-9]+}}, #1024
121 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
122 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
124 %base1 = load i32*, i32** @base
125 %addr8 = bitcast i32* %base1 to i8*
126 %offset1_8 = getelementptr i8, i8* %addr8, i32 1
127 %offset1 = bitcast i8* %offset1_8 to i32*
128 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1)
129 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1)
130 ; CHECK-T2ADDRMODE: adds r[[ADDR:[0-9]+]], #1
131 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
132 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
134 %local = alloca i8, i32 1024
135 %local32 = bitcast i8* %local to i32*
136 call i32 @llvm.arm.ldrex.p0i32(i32* %local32)
137 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %local32)
138 ; CHECK-T2ADDRMODE: mov r[[ADDR:[0-9]+]], sp
139 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
140 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
145 ; LLVM should know, even across basic blocks, that ldrex is setting the high
146 ; bits of its i32 to 0. There should be no zero-extend operation.
147 define zeroext i8 @test_cross_block_zext_i8(i1 %tst, i8* %addr) {
148 ; CHECK: test_cross_block_zext_i8:
152 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
153 br i1 %tst, label %end, label %mid
157 %val8 = trunc i32 %val to i8