1 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast | FileCheck %s -check-prefix=A8
2 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast | FileCheck %s -check-prefix=M3
5 ; Magic ARM pair hints works best with linearscan / fast.
7 ; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base
8 ; register when interrupted or faulted.
10 @b = external global i64*
12 define i64 @t(i64 %a) nounwind readonly {
15 ; A8: ldrd r2, r3, [r2]
19 ; M3: ldm.w r2, {r2, r3}
21 %0 = load i64** @b, align 4
22 %1 = load i64* %0, align 4