1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
2 ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
3 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
4 ; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
5 ; RUN: llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
6 ; RUN: llc < %s -mtriple=armv6-apple-ios | FileCheck %s -check-prefix=ARMV6
7 ; RUN: llc < %s -mtriple=thumbv7m-apple-ios | FileCheck %s -check-prefix=THUMBM
9 define void @test1(i32* %ptr, i32 %val1) {
13 ; ARM-NEXT: dmb {{ish$}}
14 ; THUMBONE-LABEL: test1
15 ; THUMBONE: __sync_lock_test_and_set_4
16 ; THUMBTWO-LABEL: test1
17 ; THUMBTWO: dmb {{ish$}}
19 ; THUMBTWO-NEXT: dmb {{ish$}}
21 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
23 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
28 store atomic i32 %val1, i32* %ptr seq_cst, align 4
32 define i32 @test2(i32* %ptr) {
35 ; ARM-NEXT: dmb {{ish$}}
36 ; THUMBONE-LABEL: test2
37 ; THUMBONE: __sync_val_compare_and_swap_4
38 ; THUMBTWO-LABEL: test2
40 ; THUMBTWO-NEXT: dmb {{ish$}}
43 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
47 %val = load atomic i32, i32* %ptr seq_cst, align 4
51 define void @test3(i8* %ptr1, i8* %ptr2) {
60 ; THUMBTWO-LABEL: test3
68 ; THUMBONE-LABEL: test3
79 %val = load atomic i8, i8* %ptr1 unordered, align 1
80 store atomic i8 %val, i8* %ptr2 unordered, align 1
84 define void @test4(i8* %ptr1, i8* %ptr2) {
85 ; THUMBONE-LABEL: test4
86 ; THUMBONE: ___sync_val_compare_and_swap_1
87 ; THUMBONE: ___sync_lock_test_and_set_1
90 %val = load atomic i8, i8* %ptr1 seq_cst, align 1
91 store atomic i8 %val, i8* %ptr2 seq_cst, align 1
95 define i64 @test_old_load_64bit(i64* %p) {
96 ; ARMV4-LABEL: test_old_load_64bit
97 ; ARMV4: ___sync_val_compare_and_swap_8
98 %1 = load atomic i64, i64* %p seq_cst, align 8
102 define void @test_old_store_64bit(i64* %p, i64 %v) {
103 ; ARMV4-LABEL: test_old_store_64bit
104 ; ARMV4: ___sync_lock_test_and_set_8
105 store atomic i64 %v, i64* %p seq_cst, align 8