1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT
3 ; RUN: llc -march=amdgcn --misched=ilpmax -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX
4 ; RUN: llc -march=amdgcn --misched=ilpmax -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX
5 ; The ilpmax scheduler is used for the second test to get the ordering we want for the test.
7 ; DEFAULT-LABEL: {{^}}main:
8 ; DEFAULT: s_load_dwordx4
9 ; DEFAULT: s_load_dwordx4
10 ; DEFAULT: s_waitcnt vmcnt(0)
12 ; DEFAULT: s_waitcnt lgkmcnt(0)
14 define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) #0 {
16 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 0
17 %tmp10 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
18 %tmp11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp10, i32 0, i32 %arg6)
19 %tmp12 = extractelement <4 x float> %tmp11, i32 0
20 %tmp13 = extractelement <4 x float> %tmp11, i32 1
21 call void @llvm.AMDGPU.barrier.global() #1
22 %tmp14 = extractelement <4 x float> %tmp11, i32 2
23 ; %tmp15 = extractelement <4 x float> %tmp11, i32 3
24 %tmp15 = load float, float addrspace(2)* %constptr, align 4 ; Force waiting for expcnt and lgkmcnt
25 %tmp16 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 1
26 %tmp17 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp16, !tbaa !0
27 %tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp17, i32 0, i32 %arg6)
28 %tmp19 = extractelement <4 x float> %tmp18, i32 0
29 %tmp20 = extractelement <4 x float> %tmp18, i32 1
30 %tmp21 = extractelement <4 x float> %tmp18, i32 2
31 %tmp22 = extractelement <4 x float> %tmp18, i32 3
32 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %tmp19, float %tmp20, float %tmp21, float %tmp22)
33 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp12, float %tmp13, float %tmp14, float %tmp15)
37 ; ILPMAX-LABEL: {{^}}main2:
38 ; ILPMAX: s_load_dwordx4
39 ; ILPMAX: s_waitcnt lgkmcnt(0)
41 ; ILPMAX: s_load_dwordx4
42 ; ILPMAX: s_waitcnt lgkmcnt(0)
44 ; ILPMAX: s_waitcnt vmcnt(1)
45 ; ILPMAX: s_waitcnt vmcnt(0)
48 define void @main2([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, [16 x <16 x i8>] addrspace(2)*
49 byval, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
51 %11 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 0
52 %12 = load <16 x i8>, <16 x i8> addrspace(2)* %11, align 16, !tbaa !0
54 %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
55 %15 = extractelement <4 x float> %14, i32 0
56 %16 = extractelement <4 x float> %14, i32 1
57 %17 = extractelement <4 x float> %14, i32 2
58 %18 = extractelement <4 x float> %14, i32 3
59 %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 1
60 %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !tbaa !0
62 %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
63 %23 = extractelement <4 x float> %22, i32 0
64 %24 = extractelement <4 x float> %22, i32 1
65 %25 = extractelement <4 x float> %22, i32 2
66 %26 = extractelement <4 x float> %22, i32 3
67 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
68 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
73 ; Function Attrs: noduplicate nounwind
74 declare void @llvm.AMDGPU.barrier.global() #1
76 ; Function Attrs: nounwind readnone
77 declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #2
79 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
81 attributes #0 = { "ShaderType"="1" }
82 attributes #1 = { noduplicate nounwind }
83 attributes #2 = { nounwind readnone }
85 !0 = !{!1, !1, i64 0, i32 1}
86 !1 = !{!"const", null}