1 ; RUN: llc < %s -march=amdgcn -mcpu=SI -show-mc-encoding -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=GCN %s
2 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs | FileCheck --check-prefix=VI --check-prefix=GCN %s
4 ; SMRD load with an immediate offset.
5 ; GCN-LABEL: {{^}}smrd0:
6 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01
7 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4
8 define void @smrd0(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
10 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 1
11 %1 = load i32, i32 addrspace(2)* %0
12 store i32 %1, i32 addrspace(1)* %out
16 ; SMRD load with the largest possible immediate offset.
17 ; GCN-LABEL: {{^}}smrd1:
18 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff
19 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
20 define void @smrd1(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
22 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 255
23 %1 = load i32, i32 addrspace(2)* %0
24 store i32 %1, i32 addrspace(1)* %out
28 ; SMRD load with an offset greater than the largest possible immediate.
29 ; GCN-LABEL: {{^}}smrd2:
30 ; SI: s_movk_i32 s[[OFFSET:[0-9]]], 0x400
31 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
32 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
34 define void @smrd2(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
36 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 256
37 %1 = load i32, i32 addrspace(2)* %0
38 store i32 %1, i32 addrspace(1)* %out
42 ; SMRD load with a 64-bit offset
43 ; GCN-LABEL: {{^}}smrd3:
44 ; FIXME: There are too many copies here because we don't fold immediates
45 ; through REG_SEQUENCE
46 ; SI: s_load_dwordx2 s[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0xb ; encoding: [0x0b
49 define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
51 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 4294967296 ; 2 ^ 32
52 %1 = load i32, i32 addrspace(2)* %0
53 store i32 %1, i32 addrspace(1)* %out
57 ; SMRD load with the largest possible immediate offset on VI
58 ; GCN-LABEL: {{^}}smrd4:
59 ; SI: s_mov_b32 [[OFFSET:s[0-9]+]], 0xffffc
60 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
61 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
62 define void @smrd4(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
64 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 262143
65 %1 = load i32, i32 addrspace(2)* %0
66 store i32 %1, i32 addrspace(1)* %out
70 ; SMRD load with an offset greater than the largest possible immediate on VI
71 ; GCN-LABEL: {{^}}smrd5:
72 ; GCN: s_mov_b32 [[OFFSET:s[0-9]+]], 0x100000
73 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
74 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
76 define void @smrd5(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
78 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 262144
79 %1 = load i32, i32 addrspace(2)* %0
80 store i32 %1, i32 addrspace(1)* %out
84 ; SMRD load using the load.const intrinsic with an immediate offset
85 ; GCN-LABEL: {{^}}smrd_load_const0:
86 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04
87 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x10
88 define void @smrd_load_const0(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
90 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
91 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
92 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 16)
93 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
97 ; SMRD load using the load.const intrinsic with the largest possible immediate
99 ; GCN-LABEL: {{^}}smrd_load_const1:
100 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff
101 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
102 define void @smrd_load_const1(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
104 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
105 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
106 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1020)
107 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
110 ; SMRD load using the load.const intrinsic with an offset greater than the
111 ; largets possible immediate.
113 ; GCN-LABEL: {{^}}smrd_load_const2:
114 ; SI: s_movk_i32 s[[OFFSET:[0-9]]], 0x400
115 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
116 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
117 define void @smrd_load_const2(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
119 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
120 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
121 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1024)
122 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
126 ; SMRD load with the largest possible immediate offset on VI
127 ; GCN-LABEL: {{^}}smrd_load_const3:
128 ; SI: s_mov_b32 [[OFFSET:s[0-9]+]], 0xffffc
129 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
130 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
131 define void @smrd_load_const3(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
133 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
134 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
135 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1048572)
136 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
140 ; SMRD load with an offset greater than the largest possible immediate on VI
141 ; GCN-LABEL: {{^}}smrd_load_const4:
142 ; GCN: s_mov_b32 [[OFFSET:s[0-9]+]], 0x100000
143 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
144 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
146 define void @smrd_load_const4(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
148 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
149 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
150 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1048576)
151 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
155 ; Function Attrs: nounwind readnone
156 declare float @llvm.SI.load.const(<16 x i8>, i32) #1
158 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
160 attributes #0 = { "ShaderType"="0" }
161 attributes #1 = { nounwind readnone }