1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
5 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
6 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
7 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone
9 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
10 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone
11 declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1) nounwind readnone
13 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
15 ; FUNC-LABEL: {{^}}s_ctlz_i32:
16 ; SI: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
17 ; SI-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]]
18 ; SI-DAG: v_cmp_eq_i32_e64 [[CMPZ:s\[[0-9]+:[0-9]+\]]], 0, [[VAL]]
19 ; SI-DAG: v_mov_b32_e32 [[VCTLZ:v[0-9]+]], [[CTLZ]]
20 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[VCTLZ]], 32, [[CMPZ]]
21 ; SI: buffer_store_dword [[RESULT]]
26 define void @s_ctlz_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
27 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
28 store i32 %ctlz, i32 addrspace(1)* %out, align 4
32 ; FUNC-LABEL: {{^}}v_ctlz_i32:
33 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
34 ; SI-DAG: v_ffbh_u32_e32 [[CTLZ:v[0-9]+]], [[VAL]]
35 ; SI-DAG: v_cmp_eq_i32_e32 vcc, 0, [[CTLZ]]
36 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[CTLZ]], 32, vcc
37 ; SI: buffer_store_dword [[RESULT]],
42 define void @v_ctlz_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
43 %val = load i32, i32 addrspace(1)* %valptr, align 4
44 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
45 store i32 %ctlz, i32 addrspace(1)* %out, align 4
49 ; FUNC-LABEL: {{^}}v_ctlz_v2i32:
50 ; SI: buffer_load_dwordx2
53 ; SI: buffer_store_dwordx2
60 define void @v_ctlz_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) nounwind {
61 %val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr, align 8
62 %ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %val, i1 false) nounwind readnone
63 store <2 x i32> %ctlz, <2 x i32> addrspace(1)* %out, align 8
67 ; FUNC-LABEL: {{^}}v_ctlz_v4i32:
68 ; SI: buffer_load_dwordx4
73 ; SI: buffer_store_dwordx4
88 define void @v_ctlz_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %valptr) nounwind {
89 %val = load <4 x i32>, <4 x i32> addrspace(1)* %valptr, align 16
90 %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %val, i1 false) nounwind readnone
91 store <4 x i32> %ctlz, <4 x i32> addrspace(1)* %out, align 16
95 ; FUNC-LABEL: {{^}}s_ctlz_i64:
96 ; SI: s_load_dwordx2 s{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
97 ; SI-DAG: v_cmp_eq_i32_e64 vcc, 0, s[[HI]]
98 ; SI-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
99 ; SI-DAG: s_add_i32 [[ADD:s[0-9]+]], [[FFBH_LO]], 32
100 ; SI-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
101 ; SI-DAG: v_mov_b32_e32 [[VFFBH_LO:v[0-9]+]], [[FFBH_LO]]
102 ; SI-DAG: v_mov_b32_e32 [[VFFBH_HI:v[0-9]+]], [[FFBH_HI]]
103 ; SI-DAG: v_cndmask_b32_e32 v[[CTLZ:[0-9]+]], [[VFFBH_HI]], [[VFFBH_LO]]
104 ; SI-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}}
105 ; SI: {{buffer|flat}}_store_dwordx2 v{{\[}}[[CTLZ]]:[[CTLZ_HI]]{{\]}}
106 define void @s_ctlz_i64(i64 addrspace(1)* noalias %out, i64 %val) nounwind {
107 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
108 store i64 %ctlz, i64 addrspace(1)* %out
112 ; FUNC-LABEL: {{^}}s_ctlz_i64_trunc:
113 define void @s_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
114 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
115 %trunc = trunc i64 %ctlz to i32
116 store i32 %trunc, i32 addrspace(1)* %out
120 ; FUNC-LABEL: {{^}}v_ctlz_i64:
121 ; SI: {{buffer|flat}}_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
122 ; SI-DAG: v_cmp_eq_i32_e64 [[CMPHI:s\[[0-9]+:[0-9]+\]]], 0, v[[HI]]
123 ; SI-DAG: v_ffbh_u32_e32 [[FFBH_LO:v[0-9]+]], v[[LO]]
124 ; SI-DAG: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, 32, [[FFBH_LO]]
125 ; SI-DAG: v_ffbh_u32_e32 [[FFBH_HI:v[0-9]+]], v[[HI]]
126 ; SI-DAG: v_cndmask_b32_e64 v[[CTLZ:[0-9]+]], [[FFBH_HI]], [[ADD]], [[CMPHI]]
127 ; SI-DAG: v_or_b32_e32 [[OR:v[0-9]+]], v[[LO]], v[[HI]]
128 ; SI-DAG: v_cmp_eq_i32_e32 vcc, 0, [[OR]]
129 ; SI-DAG: v_cndmask_b32_e64 v[[CLTZ_LO:[0-9]+]], v[[CTLZ:[0-9]+]], 64, vcc
130 ; SI-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}}
131 ; SI: {{buffer|flat}}_store_dwordx2 v{{\[}}[[CLTZ_LO]]:[[CTLZ_HI]]{{\]}}
132 define void @v_ctlz_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
133 %tid = call i32 @llvm.r600.read.tidig.x()
134 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
135 %out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
136 %val = load i64, i64 addrspace(1)* %in.gep
137 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
138 store i64 %ctlz, i64 addrspace(1)* %out.gep
142 ; FUNC-LABEL: {{^}}v_ctlz_i64_trunc:
143 define void @v_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
144 %tid = call i32 @llvm.r600.read.tidig.x()
145 %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
146 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
147 %val = load i64, i64 addrspace(1)* %in.gep
148 %ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
149 %trunc = trunc i64 %ctlz to i32
150 store i32 %trunc, i32 addrspace(1)* %out.gep
154 ; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_neg1:
155 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
156 ; SI: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]]
157 ; SI: buffer_store_dword [[RESULT]],
159 define void @v_ctlz_i32_sel_eq_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
160 %val = load i32, i32 addrspace(1)* %valptr
161 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
162 %cmp = icmp eq i32 %val, 0
163 %sel = select i1 %cmp, i32 -1, i32 %ctlz
164 store i32 %sel, i32 addrspace(1)* %out
168 ; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_neg1:
169 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
170 ; SI: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]]
171 ; SI: buffer_store_dword [[RESULT]],
173 define void @v_ctlz_i32_sel_ne_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
174 %val = load i32, i32 addrspace(1)* %valptr
175 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
176 %cmp = icmp ne i32 %val, 0
177 %sel = select i1 %cmp, i32 %ctlz, i32 -1
178 store i32 %sel, i32 addrspace(1)* %out
182 ; TODO: Should be able to eliminate select here as well.
183 ; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_bitwidth:
184 ; SI: buffer_load_dword
189 define void @v_ctlz_i32_sel_eq_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
190 %val = load i32, i32 addrspace(1)* %valptr
191 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
192 %cmp = icmp eq i32 %ctlz, 32
193 %sel = select i1 %cmp, i32 -1, i32 %ctlz
194 store i32 %sel, i32 addrspace(1)* %out
198 ; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_bitwidth:
199 ; SI: buffer_load_dword
204 define void @v_ctlz_i32_sel_ne_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
205 %val = load i32, i32 addrspace(1)* %valptr
206 %ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
207 %cmp = icmp ne i32 %ctlz, 32
208 %sel = select i1 %cmp, i32 %ctlz, i32 -1
209 store i32 %sel, i32 addrspace(1)* %out