1 ; RUN: llc < %s -mtriple aarch64-apple-darwin | FileCheck %s
3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
8 define <1 x float> @test_copysign_v1f32_v1f32(<1 x float> %a, <1 x float> %b) #0 {
9 ; CHECK-LABEL: test_copysign_v1f32_v1f32:
11 ; CHECK-NEXT: movi.2s v2, #0x80, lsl #24
12 ; CHECK-NEXT: bit.8b v0, v1, v2
14 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b)
18 ; WidenVecRes mismatched
19 define <1 x float> @test_copysign_v1f32_v1f64(<1 x float> %a, <1 x double> %b) #0 {
20 ; CHECK-LABEL: test_copysign_v1f32_v1f64:
22 ; CHECK-NEXT: fcvt s1, d1
23 ; CHECK-NEXT: movi.4s v2, #0x80, lsl #24
24 ; CHECK-NEXT: bit.16b v0, v1, v2
26 %tmp0 = fptrunc <1 x double> %b to <1 x float>
27 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %tmp0)
31 declare <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b) #0
36 define <1 x double> @test_copysign_v1f64_v1f32(<1 x double> %a, <1 x float> %b) #0 {
37 ; CHECK-LABEL: test_copysign_v1f64_v1f32:
39 ; CHECK-NEXT: fcvt d1, s1
40 ; CHECK-NEXT: movi.2d v2, #0000000000000000
41 ; CHECK-NEXT: fneg.2d v2, v2
42 ; CHECK-NEXT: bit.16b v0, v1, v2
44 %tmp0 = fpext <1 x float> %b to <1 x double>
45 %r = call <1 x double> @llvm.copysign.v1f64(<1 x double> %a, <1 x double> %tmp0)
49 define <1 x double> @test_copysign_v1f64_v1f64(<1 x double> %a, <1 x double> %b) #0 {
50 ; CHECK-LABEL: test_copysign_v1f64_v1f64:
52 ; CHECK-NEXT: movi.2d v2, #0000000000000000
53 ; CHECK-NEXT: fneg.2d v2, v2
54 ; CHECK-NEXT: bit.16b v0, v1, v2
56 %r = call <1 x double> @llvm.copysign.v1f64(<1 x double> %a, <1 x double> %b)
60 declare <1 x double> @llvm.copysign.v1f64(<1 x double> %a, <1 x double> %b) #0
64 define <2 x float> @test_copysign_v2f32_v2f32(<2 x float> %a, <2 x float> %b) #0 {
65 ; CHECK-LABEL: test_copysign_v2f32_v2f32:
67 ; CHECK-NEXT: movi.2s v2, #0x80, lsl #24
68 ; CHECK-NEXT: bit.8b v0, v1, v2
70 %r = call <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %b)
74 define <2 x float> @test_copysign_v2f32_v2f64(<2 x float> %a, <2 x double> %b) #0 {
75 ; CHECK-LABEL: test_copysign_v2f32_v2f64:
77 ; CHECK-NEXT: fcvtn v1.2s, v1.2d
78 ; CHECK-NEXT: movi.2s v2, #0x80, lsl #24
79 ; CHECK-NEXT: bit.8b v0, v1, v2
81 %tmp0 = fptrunc <2 x double> %b to <2 x float>
82 %r = call <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %tmp0)
86 declare <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %b) #0
90 define <4 x float> @test_copysign_v4f32_v4f32(<4 x float> %a, <4 x float> %b) #0 {
91 ; CHECK-LABEL: test_copysign_v4f32_v4f32:
93 ; CHECK-NEXT: movi.4s v2, #0x80, lsl #24
94 ; CHECK-NEXT: bit.16b v0, v1, v2
96 %r = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b)
101 define <4 x float> @test_copysign_v4f32_v4f64(<4 x float> %a, <4 x double> %b) #0 {
102 ; CHECK-LABEL: test_copysign_v4f32_v4f64:
104 ; CHECK-NEXT: mov s3, v0[1]
105 ; CHECK-NEXT: mov d4, v1[1]
106 ; CHECK-NEXT: movi.4s v5, #0x80, lsl #24
107 ; CHECK-NEXT: fcvt s1, d1
108 ; CHECK-NEXT: mov s6, v0[2]
109 ; CHECK-NEXT: mov s7, v0[3]
110 ; CHECK-NEXT: fcvt s16, d2
111 ; CHECK-NEXT: bit.16b v0, v1, v5
112 ; CHECK-NEXT: bit.16b v6, v16, v5
113 ; CHECK-NEXT: fcvt s1, d4
114 ; CHECK-NEXT: bit.16b v3, v1, v5
115 ; CHECK-NEXT: mov d1, v2[1]
116 ; CHECK-NEXT: fcvt s1, d1
117 ; CHECK-NEXT: ins.s v0[1], v3[0]
118 ; CHECK-NEXT: ins.s v0[2], v6[0]
119 ; CHECK-NEXT: bit.16b v7, v1, v5
120 ; CHECK-NEXT: ins.s v0[3], v7[0]
122 %tmp0 = fptrunc <4 x double> %b to <4 x float>
123 %r = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %tmp0)
127 declare <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b) #0
131 define <2 x double> @test_copysign_v2f64_v232(<2 x double> %a, <2 x float> %b) #0 {
132 ; CHECK-LABEL: test_copysign_v2f64_v232:
134 ; CHECK-NEXT: movi.2d v2, #0000000000000000
135 ; CHECK-NEXT: fneg.2d v2, v2
136 ; CHECK-NEXT: fcvtl v1.2d, v1.2s
137 ; CHECK-NEXT: bit.16b v0, v1, v2
139 %tmp0 = fpext <2 x float> %b to <2 x double>
140 %r = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %tmp0)
144 define <2 x double> @test_copysign_v2f64_v2f64(<2 x double> %a, <2 x double> %b) #0 {
145 ; CHECK-LABEL: test_copysign_v2f64_v2f64:
147 ; CHECK-NEXT: movi.2d v2, #0000000000000000
148 ; CHECK-NEXT: fneg.2d v2, v2
149 ; CHECK-NEXT: bit.16b v0, v1, v2
151 %r = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %b)
155 declare <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %b) #0
159 ; SplitVecRes mismatched
160 define <4 x double> @test_copysign_v4f64_v4f32(<4 x double> %a, <4 x float> %b) #0 {
161 ; CHECK-LABEL: test_copysign_v4f64_v4f32:
163 ; CHECK-NEXT: movi.2d v3, #0000000000000000
164 ; CHECK-NEXT: fcvtl2 v4.2d, v2.4s
165 ; CHECK-NEXT: fcvtl v2.2d, v2.2s
166 ; CHECK-NEXT: fneg.2d v3, v3
167 ; CHECK-NEXT: bit.16b v1, v4, v3
168 ; CHECK-NEXT: bit.16b v0, v2, v3
170 %tmp0 = fpext <4 x float> %b to <4 x double>
171 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %tmp0)
176 define <4 x double> @test_copysign_v4f64_v4f64(<4 x double> %a, <4 x double> %b) #0 {
177 ; CHECK-LABEL: test_copysign_v4f64_v4f64:
179 ; CHECK-NEXT: movi.2d v4, #0000000000000000
180 ; CHECK-NEXT: fneg.2d v4, v4
181 ; CHECK-NEXT: bit.16b v0, v2, v4
182 ; CHECK-NEXT: bit.16b v1, v3, v4
184 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b)
188 declare <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b) #0
190 attributes #0 = { nounwind }