1 ; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
2 declare void @use_addr(i8*)
4 @addr = global i8* null
6 define void @test_bigframe() {
7 ; CHECK: test_bigframe:
9 %var1 = alloca i8, i32 20000000
10 %var2 = alloca i8, i32 16
11 %var3 = alloca i8, i32 20000000
12 ; CHECK: sub sp, sp, #496
13 ; CHECK: str x30, [sp, #488]
14 ; Total adjust is 39999536
15 ; CHECK: movz [[SUBCONST:x[0-9]+]], #22576
16 ; CHECK: movk [[SUBCONST]], #610, lsl #16
17 ; CHECK: sub sp, sp, [[SUBCONST]]
19 ; Total offset is 20000024
20 ; CHECK: movz [[VAR1OFFSET:x[0-9]+]], #11544
21 ; CHECK: movk [[VAR1OFFSET]], #305, lsl #16
22 ; CHECK: add {{x[0-9]+}}, sp, [[VAR1OFFSET]]
23 store volatile i8* %var1, i8** @addr
25 %var1plus2 = getelementptr i8* %var1, i32 2
26 store volatile i8* %var1plus2, i8** @addr
28 ; CHECK: movz [[VAR2OFFSET:x[0-9]+]], #11528
29 ; CHECK: movk [[VAR2OFFSET]], #305, lsl #16
30 ; CHECK: add {{x[0-9]+}}, sp, [[VAR2OFFSET]]
31 store volatile i8* %var2, i8** @addr
33 %var2plus2 = getelementptr i8* %var2, i32 2
34 store volatile i8* %var2plus2, i8** @addr
36 store volatile i8* %var3, i8** @addr
38 %var3plus2 = getelementptr i8* %var3, i32 2
39 store volatile i8* %var3plus2, i8** @addr
41 ; CHECK: movz [[ADDCONST:x[0-9]+]], #22576
42 ; CHECK: movk [[ADDCONST]], #610, lsl #16
43 ; CHECK: add sp, sp, [[ADDCONST]]
47 define void @test_mediumframe() {
48 ; CHECK: test_mediumframe:
49 %var1 = alloca i8, i32 1000000
50 %var2 = alloca i8, i32 16
51 %var3 = alloca i8, i32 1000000
52 ; CHECK: sub sp, sp, #496
53 ; CHECK: str x30, [sp, #488]
54 ; CHECK: sub sp, sp, #688
55 ; CHECK-NEXT: sub sp, sp, #488, lsl #12
57 store volatile i8* %var1, i8** @addr
58 ; CHECK: add [[VAR1ADDR:x[0-9]+]], sp, #600
59 ; CHECK: add [[VAR1ADDR]], [[VAR1ADDR]], #244, lsl #12
61 %var1plus2 = getelementptr i8* %var1, i32 2
62 store volatile i8* %var1plus2, i8** @addr
63 ; CHECK: add [[VAR1PLUS2:x[0-9]+]], {{x[0-9]+}}, #2
65 store volatile i8* %var2, i8** @addr
66 ; CHECK: add [[VAR2ADDR:x[0-9]+]], sp, #584
67 ; CHECK: add [[VAR2ADDR]], [[VAR2ADDR]], #244, lsl #12
69 %var2plus2 = getelementptr i8* %var2, i32 2
70 store volatile i8* %var2plus2, i8** @addr
71 ; CHECK: add [[VAR2PLUS2:x[0-9]+]], {{x[0-9]+}}, #2
73 store volatile i8* %var3, i8** @addr
75 %var3plus2 = getelementptr i8* %var3, i32 2
76 store volatile i8* %var3plus2, i8** @addr
78 ; CHECK: add sp, sp, #688
79 ; CHECK: add sp, sp, #488, lsl #12
80 ; CHECK: ldr x30, [sp, #488]
81 ; CHECK: add sp, sp, #496
86 @bigspace = global [8 x i64] zeroinitializer
88 ; If temporary registers are allocated for adjustment, they should *not* clobber
90 define void @test_tempallocation([8 x i64] %val) nounwind {
91 ; CHECK: test_tempallocation:
92 %var = alloca i8, i32 1000000
95 ; Make sure the prologue is reasonably efficient
96 ; CHECK-NEXT: stp x29, x30, [sp,
97 ; CHECK-NEXT: stp x25, x26, [sp,
98 ; CHECK-NEXT: stp x23, x24, [sp,
99 ; CHECK-NEXT: stp x21, x22, [sp,
100 ; CHECK-NEXT: stp x19, x20, [sp,
102 ; Make sure we don't trash an argument register
103 ; CHECK-NOT: movz {{x[0-7],}}
106 ; CHECK-NOT: movz {{x[0-7],}}
109 call void @use_addr(i8* %var)
111 store [8 x i64] %val, [8 x i64]* @bigspace