1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This transformation analyzes and transforms the induction variables (and
11 // computations derived from them) into forms suitable for efficient execution
14 // This pass performs a strength reduction on array references inside loops that
15 // have as one or more of their components the loop induction variable, it
16 // rewrites expressions to take advantage of scaled-index addressing modes
17 // available on the target, and it performs a variety of other optimizations
18 // related to loop induction variables.
20 // Terminology note: this code has a lot of handling for "post-increment" or
21 // "post-inc" users. This is not talking about post-increment addressing modes;
22 // it is instead talking about code like this:
24 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
26 // %i.next = add %i, 1
27 // %c = icmp eq %i.next, %n
29 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
30 // it's useful to think about these as the same register, with some uses using
31 // the value of the register before the add and some using it after. In this
32 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // the value of the induction variable after the increment. The other common
34 // case of post-increment users is users outside the loop.
36 // TODO: More sophistication in the way Formulae are generated and filtered.
38 // TODO: Handle multiple loops at a time.
40 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
43 // TODO: When truncation is free, truncate ICmp users' operands to make it a
44 // smaller encoding (on x86 at least).
46 // TODO: When a negated register is used by an add (such as in a list of
47 // multiple base registers, or as the increment expression in an addrec),
48 // we may not actually need both reg and (-1 * reg) in registers; the
49 // negation can be implemented by using a sub instead of an add. The
50 // lack of support for taking this into consideration when making
51 // register pressure decisions is partly worked around by the "Special"
54 //===----------------------------------------------------------------------===//
56 #include "llvm/Transforms/Scalar.h"
57 #include "llvm/ADT/DenseSet.h"
58 #include "llvm/ADT/Hashing.h"
59 #include "llvm/ADT/STLExtras.h"
60 #include "llvm/ADT/SetVector.h"
61 #include "llvm/ADT/SmallBitVector.h"
62 #include "llvm/Analysis/IVUsers.h"
63 #include "llvm/Analysis/LoopPass.h"
64 #include "llvm/Analysis/ScalarEvolutionExpander.h"
65 #include "llvm/Analysis/TargetTransformInfo.h"
66 #include "llvm/IR/Constants.h"
67 #include "llvm/IR/DerivedTypes.h"
68 #include "llvm/IR/Dominators.h"
69 #include "llvm/IR/Instructions.h"
70 #include "llvm/IR/IntrinsicInst.h"
71 #include "llvm/IR/Module.h"
72 #include "llvm/IR/ValueHandle.h"
73 #include "llvm/Support/CommandLine.h"
74 #include "llvm/Support/Debug.h"
75 #include "llvm/Support/raw_ostream.h"
76 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
77 #include "llvm/Transforms/Utils/Local.h"
81 #define DEBUG_TYPE "loop-reduce"
83 /// MaxIVUsers is an arbitrary threshold that provides an early opportunitiy for
84 /// bail out. This threshold is far beyond the number of users that LSR can
85 /// conceivably solve, so it should not affect generated code, but catches the
86 /// worst cases before LSR burns too much compile time and stack space.
87 static const unsigned MaxIVUsers = 200;
89 // Temporary flag to cleanup congruent phis after LSR phi expansion.
90 // It's currently disabled until we can determine whether it's truly useful or
91 // not. The flag should be removed after the v3.0 release.
92 // This is now needed for ivchains.
93 static cl::opt<bool> EnablePhiElim(
94 "enable-lsr-phielim", cl::Hidden, cl::init(true),
95 cl::desc("Enable LSR phi elimination"));
98 // Stress test IV chain generation.
99 static cl::opt<bool> StressIVChain(
100 "stress-ivchain", cl::Hidden, cl::init(false),
101 cl::desc("Stress test LSR IV chains"));
103 static bool StressIVChain = false;
109 /// Used in situations where the accessed memory type is unknown.
110 static const unsigned UnknownAddressSpace = ~0u;
115 MemAccessTy() : MemTy(nullptr), AddrSpace(UnknownAddressSpace) {}
117 MemAccessTy(Type *Ty, unsigned AS) :
118 MemTy(Ty), AddrSpace(AS) {}
120 bool operator==(MemAccessTy Other) const {
121 return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace;
124 bool operator!=(MemAccessTy Other) const { return !(*this == Other); }
126 static MemAccessTy getUnknown(LLVMContext &Ctx) {
127 return MemAccessTy(Type::getVoidTy(Ctx), UnknownAddressSpace);
131 /// RegSortData - This class holds data which is used to order reuse candidates.
134 /// UsedByIndices - This represents the set of LSRUse indices which reference
135 /// a particular register.
136 SmallBitVector UsedByIndices;
138 void print(raw_ostream &OS) const;
144 void RegSortData::print(raw_ostream &OS) const {
145 OS << "[NumUses=" << UsedByIndices.count() << ']';
148 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
149 void RegSortData::dump() const {
150 print(errs()); errs() << '\n';
156 /// RegUseTracker - Map register candidates to information about how they are
158 class RegUseTracker {
159 typedef DenseMap<const SCEV *, RegSortData> RegUsesTy;
161 RegUsesTy RegUsesMap;
162 SmallVector<const SCEV *, 16> RegSequence;
165 void countRegister(const SCEV *Reg, size_t LUIdx);
166 void dropRegister(const SCEV *Reg, size_t LUIdx);
167 void swapAndDropUse(size_t LUIdx, size_t LastLUIdx);
169 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
171 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
175 typedef SmallVectorImpl<const SCEV *>::iterator iterator;
176 typedef SmallVectorImpl<const SCEV *>::const_iterator const_iterator;
177 iterator begin() { return RegSequence.begin(); }
178 iterator end() { return RegSequence.end(); }
179 const_iterator begin() const { return RegSequence.begin(); }
180 const_iterator end() const { return RegSequence.end(); }
186 RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) {
187 std::pair<RegUsesTy::iterator, bool> Pair =
188 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
189 RegSortData &RSD = Pair.first->second;
191 RegSequence.push_back(Reg);
192 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
193 RSD.UsedByIndices.set(LUIdx);
197 RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) {
198 RegUsesTy::iterator It = RegUsesMap.find(Reg);
199 assert(It != RegUsesMap.end());
200 RegSortData &RSD = It->second;
201 assert(RSD.UsedByIndices.size() > LUIdx);
202 RSD.UsedByIndices.reset(LUIdx);
206 RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
207 assert(LUIdx <= LastLUIdx);
209 // Update RegUses. The data structure is not optimized for this purpose;
210 // we must iterate through it and update each of the bit vectors.
211 for (auto &Pair : RegUsesMap) {
212 SmallBitVector &UsedByIndices = Pair.second.UsedByIndices;
213 if (LUIdx < UsedByIndices.size())
214 UsedByIndices[LUIdx] =
215 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : 0;
216 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
221 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
222 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
223 if (I == RegUsesMap.end())
225 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
226 int i = UsedByIndices.find_first();
227 if (i == -1) return false;
228 if ((size_t)i != LUIdx) return true;
229 return UsedByIndices.find_next(i) != -1;
232 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
233 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
234 assert(I != RegUsesMap.end() && "Unknown register!");
235 return I->second.UsedByIndices;
238 void RegUseTracker::clear() {
245 /// Formula - This class holds information that describes a formula for
246 /// computing satisfying a use. It may include broken-out immediates and scaled
249 /// Global base address used for complex addressing.
252 /// Base offset for complex addressing.
255 /// Whether any complex addressing has a base register.
258 /// The scale of any complex addressing.
261 /// BaseRegs - The list of "base" registers for this use. When this is
262 /// non-empty. The canonical representation of a formula is
263 /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
264 /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
265 /// #1 enforces that the scaled register is always used when at least two
266 /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
267 /// #2 enforces that 1 * reg is reg.
268 /// This invariant can be temporarly broken while building a formula.
269 /// However, every formula inserted into the LSRInstance must be in canonical
271 SmallVector<const SCEV *, 4> BaseRegs;
273 /// ScaledReg - The 'scaled' register for this use. This should be non-null
274 /// when Scale is not zero.
275 const SCEV *ScaledReg;
277 /// UnfoldedOffset - An additional constant offset which added near the
278 /// use. This requires a temporary register, but the offset itself can
279 /// live in an add immediate field rather than a register.
280 int64_t UnfoldedOffset;
283 : BaseGV(nullptr), BaseOffset(0), HasBaseReg(false), Scale(0),
284 ScaledReg(nullptr), UnfoldedOffset(0) {}
286 void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
288 bool isCanonical() const;
294 size_t getNumRegs() const;
295 Type *getType() const;
297 void deleteBaseReg(const SCEV *&S);
299 bool referencesReg(const SCEV *S) const;
300 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
301 const RegUseTracker &RegUses) const;
303 void print(raw_ostream &OS) const;
309 /// DoInitialMatch - Recursion helper for initialMatch.
310 static void DoInitialMatch(const SCEV *S, Loop *L,
311 SmallVectorImpl<const SCEV *> &Good,
312 SmallVectorImpl<const SCEV *> &Bad,
313 ScalarEvolution &SE) {
314 // Collect expressions which properly dominate the loop header.
315 if (SE.properlyDominates(S, L->getHeader())) {
320 // Look at add operands.
321 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
322 for (const SCEV *S : Add->operands())
323 DoInitialMatch(S, L, Good, Bad, SE);
327 // Look at addrec operands.
328 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
329 if (!AR->getStart()->isZero()) {
330 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
331 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
332 AR->getStepRecurrence(SE),
333 // FIXME: AR->getNoWrapFlags()
334 AR->getLoop(), SCEV::FlagAnyWrap),
339 // Handle a multiplication by -1 (negation) if it didn't fold.
340 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
341 if (Mul->getOperand(0)->isAllOnesValue()) {
342 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
343 const SCEV *NewMul = SE.getMulExpr(Ops);
345 SmallVector<const SCEV *, 4> MyGood;
346 SmallVector<const SCEV *, 4> MyBad;
347 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
348 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
349 SE.getEffectiveSCEVType(NewMul->getType())));
350 for (const SCEV *S : MyGood)
351 Good.push_back(SE.getMulExpr(NegOne, S));
352 for (const SCEV *S : MyBad)
353 Bad.push_back(SE.getMulExpr(NegOne, S));
357 // Ok, we can't do anything interesting. Just stuff the whole thing into a
358 // register and hope for the best.
362 /// initialMatch - Incorporate loop-variant parts of S into this Formula,
363 /// attempting to keep all loop-invariant and loop-computable values in a
364 /// single base register.
365 void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
366 SmallVector<const SCEV *, 4> Good;
367 SmallVector<const SCEV *, 4> Bad;
368 DoInitialMatch(S, L, Good, Bad, SE);
370 const SCEV *Sum = SE.getAddExpr(Good);
372 BaseRegs.push_back(Sum);
376 const SCEV *Sum = SE.getAddExpr(Bad);
378 BaseRegs.push_back(Sum);
384 /// \brief Check whether or not this formula statisfies the canonical
386 /// \see Formula::BaseRegs.
387 bool Formula::isCanonical() const {
389 return Scale != 1 || !BaseRegs.empty();
390 return BaseRegs.size() <= 1;
393 /// \brief Helper method to morph a formula into its canonical representation.
394 /// \see Formula::BaseRegs.
395 /// Every formula having more than one base register, must use the ScaledReg
396 /// field. Otherwise, we would have to do special cases everywhere in LSR
397 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
398 /// On the other hand, 1*reg should be canonicalized into reg.
399 void Formula::canonicalize() {
402 // So far we did not need this case. This is easy to implement but it is
403 // useless to maintain dead code. Beside it could hurt compile time.
404 assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
405 // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
406 ScaledReg = BaseRegs.back();
409 size_t BaseRegsSize = BaseRegs.size();
411 // If ScaledReg is an invariant, try to find a variant expression.
412 while (Try < BaseRegsSize && !isa<SCEVAddRecExpr>(ScaledReg))
413 std::swap(ScaledReg, BaseRegs[Try++]);
416 /// \brief Get rid of the scale in the formula.
417 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
418 /// \return true if it was possible to get rid of the scale, false otherwise.
419 /// \note After this operation the formula may not be in the canonical form.
420 bool Formula::unscale() {
424 BaseRegs.push_back(ScaledReg);
429 /// getNumRegs - Return the total number of register operands used by this
430 /// formula. This does not include register uses implied by non-constant
432 size_t Formula::getNumRegs() const {
433 return !!ScaledReg + BaseRegs.size();
436 /// getType - Return the type of this formula, if it has one, or null
437 /// otherwise. This type is meaningless except for the bit size.
438 Type *Formula::getType() const {
439 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
440 ScaledReg ? ScaledReg->getType() :
441 BaseGV ? BaseGV->getType() :
445 /// deleteBaseReg - Delete the given base reg from the BaseRegs list.
446 void Formula::deleteBaseReg(const SCEV *&S) {
447 if (&S != &BaseRegs.back())
448 std::swap(S, BaseRegs.back());
452 /// referencesReg - Test if this formula references the given register.
453 bool Formula::referencesReg(const SCEV *S) const {
454 return S == ScaledReg ||
455 std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
458 /// hasRegsUsedByUsesOtherThan - Test whether this formula uses registers
459 /// which are used by uses other than the use with the given index.
460 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
461 const RegUseTracker &RegUses) const {
463 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
465 for (const SCEV *BaseReg : BaseRegs)
466 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
471 void Formula::print(raw_ostream &OS) const {
474 if (!First) OS << " + "; else First = false;
475 BaseGV->printAsOperand(OS, /*PrintType=*/false);
477 if (BaseOffset != 0) {
478 if (!First) OS << " + "; else First = false;
481 for (const SCEV *BaseReg : BaseRegs) {
482 if (!First) OS << " + "; else First = false;
483 OS << "reg(" << *BaseReg << ')';
485 if (HasBaseReg && BaseRegs.empty()) {
486 if (!First) OS << " + "; else First = false;
487 OS << "**error: HasBaseReg**";
488 } else if (!HasBaseReg && !BaseRegs.empty()) {
489 if (!First) OS << " + "; else First = false;
490 OS << "**error: !HasBaseReg**";
493 if (!First) OS << " + "; else First = false;
494 OS << Scale << "*reg(";
501 if (UnfoldedOffset != 0) {
502 if (!First) OS << " + ";
503 OS << "imm(" << UnfoldedOffset << ')';
507 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
508 void Formula::dump() const {
509 print(errs()); errs() << '\n';
513 /// isAddRecSExtable - Return true if the given addrec can be sign-extended
514 /// without changing its value.
515 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
517 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
518 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
521 /// isAddSExtable - Return true if the given add can be sign-extended
522 /// without changing its value.
523 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
525 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
526 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
529 /// isMulSExtable - Return true if the given mul can be sign-extended
530 /// without changing its value.
531 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
533 IntegerType::get(SE.getContext(),
534 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
535 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
538 /// getExactSDiv - Return an expression for LHS /s RHS, if it can be determined
539 /// and if the remainder is known to be zero, or null otherwise. If
540 /// IgnoreSignificantBits is true, expressions like (X * Y) /s Y are simplified
541 /// to Y, ignoring that the multiplication may overflow, which is useful when
542 /// the result will be used in a context where the most significant bits are
544 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
546 bool IgnoreSignificantBits = false) {
547 // Handle the trivial case, which works for any SCEV type.
549 return SE.getConstant(LHS->getType(), 1);
551 // Handle a few RHS special cases.
552 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
554 const APInt &RA = RC->getValue()->getValue();
555 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
557 if (RA.isAllOnesValue())
558 return SE.getMulExpr(LHS, RC);
559 // Handle x /s 1 as x.
564 // Check for a division of a constant by a constant.
565 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
568 const APInt &LA = C->getValue()->getValue();
569 const APInt &RA = RC->getValue()->getValue();
570 if (LA.srem(RA) != 0)
572 return SE.getConstant(LA.sdiv(RA));
575 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
576 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
577 if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
578 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
579 IgnoreSignificantBits);
580 if (!Step) return nullptr;
581 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
582 IgnoreSignificantBits);
583 if (!Start) return nullptr;
584 // FlagNW is independent of the start value, step direction, and is
585 // preserved with smaller magnitude steps.
586 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
587 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
592 // Distribute the sdiv over add operands, if the add doesn't overflow.
593 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
594 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
595 SmallVector<const SCEV *, 8> Ops;
596 for (const SCEV *S : Add->operands()) {
597 const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
598 if (!Op) return nullptr;
601 return SE.getAddExpr(Ops);
606 // Check for a multiply operand that we can pull RHS out of.
607 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
608 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
609 SmallVector<const SCEV *, 4> Ops;
611 for (const SCEV *S : Mul->operands()) {
613 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
614 IgnoreSignificantBits)) {
620 return Found ? SE.getMulExpr(Ops) : nullptr;
625 // Otherwise we don't know.
629 /// ExtractImmediate - If S involves the addition of a constant integer value,
630 /// return that integer value, and mutate S to point to a new SCEV with that
632 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
633 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
634 if (C->getValue()->getValue().getMinSignedBits() <= 64) {
635 S = SE.getConstant(C->getType(), 0);
636 return C->getValue()->getSExtValue();
638 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
639 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
640 int64_t Result = ExtractImmediate(NewOps.front(), SE);
642 S = SE.getAddExpr(NewOps);
644 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
645 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
646 int64_t Result = ExtractImmediate(NewOps.front(), SE);
648 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
649 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
656 /// ExtractSymbol - If S involves the addition of a GlobalValue address,
657 /// return that symbol, and mutate S to point to a new SCEV with that
659 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
660 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
661 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
662 S = SE.getConstant(GV->getType(), 0);
665 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
666 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
667 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
669 S = SE.getAddExpr(NewOps);
671 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
672 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
673 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
675 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
676 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
683 /// isAddressUse - Returns true if the specified instruction is using the
684 /// specified value as an address.
685 static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
686 bool isAddress = isa<LoadInst>(Inst);
687 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
688 if (SI->getOperand(1) == OperandVal)
690 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
691 // Addressing modes can also be folded into prefetches and a variety
693 switch (II->getIntrinsicID()) {
695 case Intrinsic::prefetch:
696 case Intrinsic::x86_sse_storeu_ps:
697 case Intrinsic::x86_sse2_storeu_pd:
698 case Intrinsic::x86_sse2_storeu_dq:
699 case Intrinsic::x86_sse2_storel_dq:
700 if (II->getArgOperand(0) == OperandVal)
708 /// getAccessType - Return the type of the memory being accessed.
709 static MemAccessTy getAccessType(const Instruction *Inst) {
710 MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
711 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
712 AccessTy.MemTy = SI->getOperand(0)->getType();
713 AccessTy.AddrSpace = SI->getPointerAddressSpace();
714 } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
715 AccessTy.AddrSpace = LI->getPointerAddressSpace();
716 } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
717 // Addressing modes can also be folded into prefetches and a variety
719 switch (II->getIntrinsicID()) {
721 case Intrinsic::x86_sse_storeu_ps:
722 case Intrinsic::x86_sse2_storeu_pd:
723 case Intrinsic::x86_sse2_storeu_dq:
724 case Intrinsic::x86_sse2_storel_dq:
725 AccessTy.MemTy = II->getArgOperand(0)->getType();
730 // All pointers have the same requirements, so canonicalize them to an
731 // arbitrary pointer type to minimize variation.
732 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy))
733 AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
734 PTy->getAddressSpace());
739 /// isExistingPhi - Return true if this AddRec is already a phi in its loop.
740 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
741 for (BasicBlock::iterator I = AR->getLoop()->getHeader()->begin();
742 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
743 if (SE.isSCEVable(PN->getType()) &&
744 (SE.getEffectiveSCEVType(PN->getType()) ==
745 SE.getEffectiveSCEVType(AR->getType())) &&
746 SE.getSCEV(PN) == AR)
752 /// Check if expanding this expression is likely to incur significant cost. This
753 /// is tricky because SCEV doesn't track which expressions are actually computed
754 /// by the current IR.
756 /// We currently allow expansion of IV increments that involve adds,
757 /// multiplication by constants, and AddRecs from existing phis.
759 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
760 /// obvious multiple of the UDivExpr.
761 static bool isHighCostExpansion(const SCEV *S,
762 SmallPtrSetImpl<const SCEV*> &Processed,
763 ScalarEvolution &SE) {
764 // Zero/One operand expressions
765 switch (S->getSCEVType()) {
770 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
773 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
776 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
780 if (!Processed.insert(S).second)
783 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
784 for (const SCEV *S : Add->operands()) {
785 if (isHighCostExpansion(S, Processed, SE))
791 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
792 if (Mul->getNumOperands() == 2) {
793 // Multiplication by a constant is ok
794 if (isa<SCEVConstant>(Mul->getOperand(0)))
795 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
797 // If we have the value of one operand, check if an existing
798 // multiplication already generates this expression.
799 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
800 Value *UVal = U->getValue();
801 for (User *UR : UVal->users()) {
802 // If U is a constant, it may be used by a ConstantExpr.
803 Instruction *UI = dyn_cast<Instruction>(UR);
804 if (UI && UI->getOpcode() == Instruction::Mul &&
805 SE.isSCEVable(UI->getType())) {
806 return SE.getSCEV(UI) == Mul;
813 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
814 if (isExistingPhi(AR, SE))
818 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
822 /// DeleteTriviallyDeadInstructions - If any of the instructions is the
823 /// specified set are trivially dead, delete them and see if this makes any of
824 /// their operands subsequently dead.
826 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
827 bool Changed = false;
829 while (!DeadInsts.empty()) {
830 Value *V = DeadInsts.pop_back_val();
831 Instruction *I = dyn_cast_or_null<Instruction>(V);
833 if (!I || !isInstructionTriviallyDead(I))
836 for (Use &O : I->operands())
837 if (Instruction *U = dyn_cast<Instruction>(O)) {
840 DeadInsts.emplace_back(U);
843 I->eraseFromParent();
854 /// \brief Check if the addressing mode defined by \p F is completely
855 /// folded in \p LU at isel time.
856 /// This includes address-mode folding and special icmp tricks.
857 /// This function returns true if \p LU can accommodate what \p F
858 /// defines and up to 1 base + 1 scaled + offset.
859 /// In other words, if \p F has several base registers, this function may
860 /// still return true. Therefore, users still need to account for
861 /// additional base registers and/or unfolded offsets to derive an
862 /// accurate cost model.
863 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
864 const LSRUse &LU, const Formula &F);
865 // Get the cost of the scaling factor used in F for LU.
866 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
867 const LSRUse &LU, const Formula &F);
871 /// Cost - This class is used to measure and compare candidate formulae.
873 /// TODO: Some of these could be merged. Also, a lexical ordering
874 /// isn't always optimal.
878 unsigned NumBaseAdds;
885 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
886 SetupCost(0), ScaleCost(0) {}
888 bool operator<(const Cost &Other) const;
893 // Once any of the metrics loses, they must all remain losers.
895 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
896 | ImmCost | SetupCost | ScaleCost) != ~0u)
897 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
898 & ImmCost & SetupCost & ScaleCost) == ~0u);
903 assert(isValid() && "invalid cost");
904 return NumRegs == ~0u;
907 void RateFormula(const TargetTransformInfo &TTI,
909 SmallPtrSetImpl<const SCEV *> &Regs,
910 const DenseSet<const SCEV *> &VisitedRegs,
912 const SmallVectorImpl<int64_t> &Offsets,
913 ScalarEvolution &SE, DominatorTree &DT,
915 SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
917 void print(raw_ostream &OS) const;
921 void RateRegister(const SCEV *Reg,
922 SmallPtrSetImpl<const SCEV *> &Regs,
924 ScalarEvolution &SE, DominatorTree &DT);
925 void RatePrimaryRegister(const SCEV *Reg,
926 SmallPtrSetImpl<const SCEV *> &Regs,
928 ScalarEvolution &SE, DominatorTree &DT,
929 SmallPtrSetImpl<const SCEV *> *LoserRegs);
934 /// RateRegister - Tally up interesting quantities from the given register.
935 void Cost::RateRegister(const SCEV *Reg,
936 SmallPtrSetImpl<const SCEV *> &Regs,
938 ScalarEvolution &SE, DominatorTree &DT) {
939 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
940 // If this is an addrec for another loop, don't second-guess its addrec phi
941 // nodes. LSR isn't currently smart enough to reason about more than one
942 // loop at a time. LSR has already run on inner loops, will not run on outer
943 // loops, and cannot be expected to change sibling loops.
944 if (AR->getLoop() != L) {
945 // If the AddRec exists, consider it's register free and leave it alone.
946 if (isExistingPhi(AR, SE))
949 // Otherwise, do not consider this formula at all.
953 AddRecCost += 1; /// TODO: This should be a function of the stride.
955 // Add the step value register, if it needs one.
956 // TODO: The non-affine case isn't precisely modeled here.
957 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
958 if (!Regs.count(AR->getOperand(1))) {
959 RateRegister(AR->getOperand(1), Regs, L, SE, DT);
967 // Rough heuristic; favor registers which don't require extra setup
968 // instructions in the preheader.
969 if (!isa<SCEVUnknown>(Reg) &&
970 !isa<SCEVConstant>(Reg) &&
971 !(isa<SCEVAddRecExpr>(Reg) &&
972 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
973 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
976 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
977 SE.hasComputableLoopEvolution(Reg, L);
980 /// RatePrimaryRegister - Record this register in the set. If we haven't seen it
981 /// before, rate it. Optional LoserRegs provides a way to declare any formula
982 /// that refers to one of those regs an instant loser.
983 void Cost::RatePrimaryRegister(const SCEV *Reg,
984 SmallPtrSetImpl<const SCEV *> &Regs,
986 ScalarEvolution &SE, DominatorTree &DT,
987 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
988 if (LoserRegs && LoserRegs->count(Reg)) {
992 if (Regs.insert(Reg).second) {
993 RateRegister(Reg, Regs, L, SE, DT);
994 if (LoserRegs && isLoser())
995 LoserRegs->insert(Reg);
999 void Cost::RateFormula(const TargetTransformInfo &TTI,
1001 SmallPtrSetImpl<const SCEV *> &Regs,
1002 const DenseSet<const SCEV *> &VisitedRegs,
1004 const SmallVectorImpl<int64_t> &Offsets,
1005 ScalarEvolution &SE, DominatorTree &DT,
1007 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1008 assert(F.isCanonical() && "Cost is accurate only for canonical formula");
1009 // Tally up the registers.
1010 if (const SCEV *ScaledReg = F.ScaledReg) {
1011 if (VisitedRegs.count(ScaledReg)) {
1015 RatePrimaryRegister(ScaledReg, Regs, L, SE, DT, LoserRegs);
1019 for (const SCEV *BaseReg : F.BaseRegs) {
1020 if (VisitedRegs.count(BaseReg)) {
1024 RatePrimaryRegister(BaseReg, Regs, L, SE, DT, LoserRegs);
1029 // Determine how many (unfolded) adds we'll need inside the loop.
1030 size_t NumBaseParts = F.getNumRegs();
1031 if (NumBaseParts > 1)
1032 // Do not count the base and a possible second register if the target
1033 // allows to fold 2 registers.
1035 NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(TTI, LU, F)));
1036 NumBaseAdds += (F.UnfoldedOffset != 0);
1038 // Accumulate non-free scaling amounts.
1039 ScaleCost += getScalingFactorCost(TTI, LU, F);
1041 // Tally up the non-zero immediates.
1042 for (int64_t O : Offsets) {
1043 int64_t Offset = (uint64_t)O + F.BaseOffset;
1045 ImmCost += 64; // Handle symbolic values conservatively.
1046 // TODO: This should probably be the pointer size.
1047 else if (Offset != 0)
1048 ImmCost += APInt(64, Offset, true).getMinSignedBits();
1050 assert(isValid() && "invalid cost");
1053 /// Lose - Set this cost to a losing value.
1064 /// operator< - Choose the lower cost.
1065 bool Cost::operator<(const Cost &Other) const {
1066 return std::tie(NumRegs, AddRecCost, NumIVMuls, NumBaseAdds, ScaleCost,
1067 ImmCost, SetupCost) <
1068 std::tie(Other.NumRegs, Other.AddRecCost, Other.NumIVMuls,
1069 Other.NumBaseAdds, Other.ScaleCost, Other.ImmCost,
1073 void Cost::print(raw_ostream &OS) const {
1074 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
1075 if (AddRecCost != 0)
1076 OS << ", with addrec cost " << AddRecCost;
1078 OS << ", plus " << NumIVMuls << " IV mul" << (NumIVMuls == 1 ? "" : "s");
1079 if (NumBaseAdds != 0)
1080 OS << ", plus " << NumBaseAdds << " base add"
1081 << (NumBaseAdds == 1 ? "" : "s");
1083 OS << ", plus " << ScaleCost << " scale cost";
1085 OS << ", plus " << ImmCost << " imm cost";
1087 OS << ", plus " << SetupCost << " setup cost";
1090 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1091 void Cost::dump() const {
1092 print(errs()); errs() << '\n';
1098 /// LSRFixup - An operand value in an instruction which is to be replaced
1099 /// with some equivalent, possibly strength-reduced, replacement.
1101 /// UserInst - The instruction which will be updated.
1102 Instruction *UserInst;
1104 /// OperandValToReplace - The operand of the instruction which will
1105 /// be replaced. The operand may be used more than once; every instance
1106 /// will be replaced.
1107 Value *OperandValToReplace;
1109 /// PostIncLoops - If this user is to use the post-incremented value of an
1110 /// induction variable, this variable is non-null and holds the loop
1111 /// associated with the induction variable.
1112 PostIncLoopSet PostIncLoops;
1114 /// LUIdx - The index of the LSRUse describing the expression which
1115 /// this fixup needs, minus an offset (below).
1118 /// Offset - A constant offset to be added to the LSRUse expression.
1119 /// This allows multiple fixups to share the same LSRUse with different
1120 /// offsets, for example in an unrolled loop.
1123 bool isUseFullyOutsideLoop(const Loop *L) const;
1127 void print(raw_ostream &OS) const;
1133 LSRFixup::LSRFixup()
1134 : UserInst(nullptr), OperandValToReplace(nullptr), LUIdx(~size_t(0)),
1137 /// isUseFullyOutsideLoop - Test whether this fixup always uses its
1138 /// value outside of the given loop.
1139 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1140 // PHI nodes use their value in their incoming blocks.
1141 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1142 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1143 if (PN->getIncomingValue(i) == OperandValToReplace &&
1144 L->contains(PN->getIncomingBlock(i)))
1149 return !L->contains(UserInst);
1152 void LSRFixup::print(raw_ostream &OS) const {
1154 // Store is common and interesting enough to be worth special-casing.
1155 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1157 Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1158 } else if (UserInst->getType()->isVoidTy())
1159 OS << UserInst->getOpcodeName();
1161 UserInst->printAsOperand(OS, /*PrintType=*/false);
1163 OS << ", OperandValToReplace=";
1164 OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1166 for (const Loop *PIL : PostIncLoops) {
1167 OS << ", PostIncLoop=";
1168 PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1171 if (LUIdx != ~size_t(0))
1172 OS << ", LUIdx=" << LUIdx;
1175 OS << ", Offset=" << Offset;
1178 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1179 void LSRFixup::dump() const {
1180 print(errs()); errs() << '\n';
1186 /// UniquifierDenseMapInfo - A DenseMapInfo implementation for holding
1187 /// DenseMaps and DenseSets of sorted SmallVectors of const SCEV*.
1188 struct UniquifierDenseMapInfo {
1189 static SmallVector<const SCEV *, 4> getEmptyKey() {
1190 SmallVector<const SCEV *, 4> V;
1191 V.push_back(reinterpret_cast<const SCEV *>(-1));
1195 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1196 SmallVector<const SCEV *, 4> V;
1197 V.push_back(reinterpret_cast<const SCEV *>(-2));
1201 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1202 return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1205 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1206 const SmallVector<const SCEV *, 4> &RHS) {
1211 /// LSRUse - This class holds the state that LSR keeps for each use in
1212 /// IVUsers, as well as uses invented by LSR itself. It includes information
1213 /// about what kinds of things can be folded into the user, information about
1214 /// the user itself, and information about how the use may be satisfied.
1215 /// TODO: Represent multiple users of the same expression in common?
1217 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1220 /// KindType - An enum for a kind of use, indicating what types of
1221 /// scaled and immediate operands it might support.
1223 Basic, ///< A normal use, with no folding.
1224 Special, ///< A special case of basic, allowing -1 scales.
1225 Address, ///< An address use; folding according to TargetLowering
1226 ICmpZero ///< An equality icmp with both operands folded into one.
1227 // TODO: Add a generic icmp too?
1230 typedef PointerIntPair<const SCEV *, 2, KindType> SCEVUseKindPair;
1233 MemAccessTy AccessTy;
1235 SmallVector<int64_t, 8> Offsets;
1239 /// AllFixupsOutsideLoop - This records whether all of the fixups using this
1240 /// LSRUse are outside of the loop, in which case some special-case heuristics
1242 bool AllFixupsOutsideLoop;
1244 /// RigidFormula is set to true to guarantee that this use will be associated
1245 /// with a single formula--the one that initially matched. Some SCEV
1246 /// expressions cannot be expanded. This allows LSR to consider the registers
1247 /// used by those expressions without the need to expand them later after
1248 /// changing the formula.
1251 /// WidestFixupType - This records the widest use type for any fixup using
1252 /// this LSRUse. FindUseWithSimilarFormula can't consider uses with different
1253 /// max fixup widths to be equivalent, because the narrower one may be relying
1254 /// on the implicit truncation to truncate away bogus bits.
1255 Type *WidestFixupType;
1257 /// Formulae - A list of ways to build a value that can satisfy this user.
1258 /// After the list is populated, one of these is selected heuristically and
1259 /// used to formulate a replacement for OperandValToReplace in UserInst.
1260 SmallVector<Formula, 12> Formulae;
1262 /// Regs - The set of register candidates used by all formulae in this LSRUse.
1263 SmallPtrSet<const SCEV *, 4> Regs;
1265 LSRUse(KindType K, MemAccessTy AT)
1266 : Kind(K), AccessTy(AT), MinOffset(INT64_MAX), MaxOffset(INT64_MIN),
1267 AllFixupsOutsideLoop(true), RigidFormula(false),
1268 WidestFixupType(nullptr) {}
1270 bool HasFormulaWithSameRegs(const Formula &F) const;
1271 bool InsertFormula(const Formula &F);
1272 void DeleteFormula(Formula &F);
1273 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1275 void print(raw_ostream &OS) const;
1281 /// HasFormula - Test whether this use as a formula which has the same
1282 /// registers as the given formula.
1283 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1284 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1285 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1286 // Unstable sort by host order ok, because this is only used for uniquifying.
1287 std::sort(Key.begin(), Key.end());
1288 return Uniquifier.count(Key);
1291 /// InsertFormula - If the given formula has not yet been inserted, add it to
1292 /// the list, and return true. Return false otherwise.
1293 /// The formula must be in canonical form.
1294 bool LSRUse::InsertFormula(const Formula &F) {
1295 assert(F.isCanonical() && "Invalid canonical representation");
1297 if (!Formulae.empty() && RigidFormula)
1300 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1301 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1302 // Unstable sort by host order ok, because this is only used for uniquifying.
1303 std::sort(Key.begin(), Key.end());
1305 if (!Uniquifier.insert(Key).second)
1308 // Using a register to hold the value of 0 is not profitable.
1309 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1310 "Zero allocated in a scaled register!");
1312 for (const SCEV *BaseReg : F.BaseRegs)
1313 assert(!BaseReg->isZero() && "Zero allocated in a base register!");
1316 // Add the formula to the list.
1317 Formulae.push_back(F);
1319 // Record registers now being used by this use.
1320 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1322 Regs.insert(F.ScaledReg);
1327 /// DeleteFormula - Remove the given formula from this use's list.
1328 void LSRUse::DeleteFormula(Formula &F) {
1329 if (&F != &Formulae.back())
1330 std::swap(F, Formulae.back());
1331 Formulae.pop_back();
1334 /// RecomputeRegs - Recompute the Regs field, and update RegUses.
1335 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1336 // Now that we've filtered out some formulae, recompute the Regs set.
1337 SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs);
1339 for (const Formula &F : Formulae) {
1340 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1341 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1344 // Update the RegTracker.
1345 for (const SCEV *S : OldRegs)
1347 RegUses.dropRegister(S, LUIdx);
1350 void LSRUse::print(raw_ostream &OS) const {
1351 OS << "LSR Use: Kind=";
1353 case Basic: OS << "Basic"; break;
1354 case Special: OS << "Special"; break;
1355 case ICmpZero: OS << "ICmpZero"; break;
1357 OS << "Address of ";
1358 if (AccessTy.MemTy->isPointerTy())
1359 OS << "pointer"; // the full pointer type could be really verbose
1361 OS << *AccessTy.MemTy;
1364 OS << " in addrspace(" << AccessTy.AddrSpace << ')';
1367 OS << ", Offsets={";
1368 bool NeedComma = false;
1369 for (int64_t O : Offsets) {
1370 if (NeedComma) OS << ',';
1376 if (AllFixupsOutsideLoop)
1377 OS << ", all-fixups-outside-loop";
1379 if (WidestFixupType)
1380 OS << ", widest fixup type: " << *WidestFixupType;
1383 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1384 void LSRUse::dump() const {
1385 print(errs()); errs() << '\n';
1389 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1390 LSRUse::KindType Kind, MemAccessTy AccessTy,
1391 GlobalValue *BaseGV, int64_t BaseOffset,
1392 bool HasBaseReg, int64_t Scale) {
1394 case LSRUse::Address:
1395 return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
1396 HasBaseReg, Scale, AccessTy.AddrSpace);
1398 case LSRUse::ICmpZero:
1399 // There's not even a target hook for querying whether it would be legal to
1400 // fold a GV into an ICmp.
1404 // ICmp only has two operands; don't allow more than two non-trivial parts.
1405 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1408 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1409 // putting the scaled register in the other operand of the icmp.
1410 if (Scale != 0 && Scale != -1)
1413 // If we have low-level target information, ask the target if it can fold an
1414 // integer immediate on an icmp.
1415 if (BaseOffset != 0) {
1417 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1418 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1419 // Offs is the ICmp immediate.
1421 // The cast does the right thing with INT64_MIN.
1422 BaseOffset = -(uint64_t)BaseOffset;
1423 return TTI.isLegalICmpImmediate(BaseOffset);
1426 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1430 // Only handle single-register values.
1431 return !BaseGV && Scale == 0 && BaseOffset == 0;
1433 case LSRUse::Special:
1434 // Special case Basic to handle -1 scales.
1435 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1438 llvm_unreachable("Invalid LSRUse Kind!");
1441 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1442 int64_t MinOffset, int64_t MaxOffset,
1443 LSRUse::KindType Kind, MemAccessTy AccessTy,
1444 GlobalValue *BaseGV, int64_t BaseOffset,
1445 bool HasBaseReg, int64_t Scale) {
1446 // Check for overflow.
1447 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1450 MinOffset = (uint64_t)BaseOffset + MinOffset;
1451 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1454 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1456 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1457 HasBaseReg, Scale) &&
1458 isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1462 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1463 int64_t MinOffset, int64_t MaxOffset,
1464 LSRUse::KindType Kind, MemAccessTy AccessTy,
1466 // For the purpose of isAMCompletelyFolded either having a canonical formula
1467 // or a scale not equal to zero is correct.
1468 // Problems may arise from non canonical formulae having a scale == 0.
1469 // Strictly speaking it would best to just rely on canonical formulae.
1470 // However, when we generate the scaled formulae, we first check that the
1471 // scaling factor is profitable before computing the actual ScaledReg for
1472 // compile time sake.
1473 assert((F.isCanonical() || F.Scale != 0));
1474 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1475 F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1478 /// isLegalUse - Test whether we know how to expand the current formula.
1479 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1480 int64_t MaxOffset, LSRUse::KindType Kind,
1481 MemAccessTy AccessTy, GlobalValue *BaseGV,
1482 int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1483 // We know how to expand completely foldable formulae.
1484 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1485 BaseOffset, HasBaseReg, Scale) ||
1486 // Or formulae that use a base register produced by a sum of base
1489 isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1490 BaseGV, BaseOffset, true, 0));
1493 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1494 int64_t MaxOffset, LSRUse::KindType Kind,
1495 MemAccessTy AccessTy, const Formula &F) {
1496 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1497 F.BaseOffset, F.HasBaseReg, F.Scale);
1500 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1501 const LSRUse &LU, const Formula &F) {
1502 return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1503 LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1507 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1508 const LSRUse &LU, const Formula &F) {
1512 // If the use is not completely folded in that instruction, we will have to
1513 // pay an extra cost only for scale != 1.
1514 if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1516 return F.Scale != 1;
1519 case LSRUse::Address: {
1520 // Check the scaling factor cost with both the min and max offsets.
1521 int ScaleCostMinOffset = TTI.getScalingFactorCost(
1522 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
1523 F.Scale, LU.AccessTy.AddrSpace);
1524 int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1525 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
1526 F.Scale, LU.AccessTy.AddrSpace);
1528 assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1529 "Legal addressing mode has an illegal cost!");
1530 return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1532 case LSRUse::ICmpZero:
1534 case LSRUse::Special:
1535 // The use is completely folded, i.e., everything is folded into the
1540 llvm_unreachable("Invalid LSRUse Kind!");
1543 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1544 LSRUse::KindType Kind, MemAccessTy AccessTy,
1545 GlobalValue *BaseGV, int64_t BaseOffset,
1547 // Fast-path: zero is always foldable.
1548 if (BaseOffset == 0 && !BaseGV) return true;
1550 // Conservatively, create an address with an immediate and a
1551 // base and a scale.
1552 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1554 // Canonicalize a scale of 1 to a base register if the formula doesn't
1555 // already have a base register.
1556 if (!HasBaseReg && Scale == 1) {
1561 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1565 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1566 ScalarEvolution &SE, int64_t MinOffset,
1567 int64_t MaxOffset, LSRUse::KindType Kind,
1568 MemAccessTy AccessTy, const SCEV *S,
1570 // Fast-path: zero is always foldable.
1571 if (S->isZero()) return true;
1573 // Conservatively, create an address with an immediate and a
1574 // base and a scale.
1575 int64_t BaseOffset = ExtractImmediate(S, SE);
1576 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1578 // If there's anything else involved, it's not foldable.
1579 if (!S->isZero()) return false;
1581 // Fast-path: zero is always foldable.
1582 if (BaseOffset == 0 && !BaseGV) return true;
1584 // Conservatively, create an address with an immediate and a
1585 // base and a scale.
1586 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1588 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1589 BaseOffset, HasBaseReg, Scale);
1594 /// IVInc - An individual increment in a Chain of IV increments.
1595 /// Relate an IV user to an expression that computes the IV it uses from the IV
1596 /// used by the previous link in the Chain.
1598 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1599 /// original IVOperand. The head of the chain's IVOperand is only valid during
1600 /// chain collection, before LSR replaces IV users. During chain generation,
1601 /// IncExpr can be used to find the new IVOperand that computes the same
1604 Instruction *UserInst;
1606 const SCEV *IncExpr;
1608 IVInc(Instruction *U, Value *O, const SCEV *E):
1609 UserInst(U), IVOperand(O), IncExpr(E) {}
1612 // IVChain - The list of IV increments in program order.
1613 // We typically add the head of a chain without finding subsequent links.
1615 SmallVector<IVInc,1> Incs;
1616 const SCEV *ExprBase;
1618 IVChain() : ExprBase(nullptr) {}
1620 IVChain(const IVInc &Head, const SCEV *Base)
1621 : Incs(1, Head), ExprBase(Base) {}
1623 typedef SmallVectorImpl<IVInc>::const_iterator const_iterator;
1625 // begin - return the first increment in the chain.
1626 const_iterator begin() const {
1627 assert(!Incs.empty());
1628 return std::next(Incs.begin());
1630 const_iterator end() const {
1634 // hasIncs - Returns true if this chain contains any increments.
1635 bool hasIncs() const { return Incs.size() >= 2; }
1637 // add - Add an IVInc to the end of this chain.
1638 void add(const IVInc &X) { Incs.push_back(X); }
1640 // tailUserInst - Returns the last UserInst in the chain.
1641 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1643 // isProfitableIncrement - Returns true if IncExpr can be profitably added to
1645 bool isProfitableIncrement(const SCEV *OperExpr,
1646 const SCEV *IncExpr,
1650 /// ChainUsers - Helper for CollectChains to track multiple IV increment uses.
1651 /// Distinguish between FarUsers that definitely cross IV increments and
1652 /// NearUsers that may be used between IV increments.
1654 SmallPtrSet<Instruction*, 4> FarUsers;
1655 SmallPtrSet<Instruction*, 4> NearUsers;
1658 /// LSRInstance - This class holds state for the main loop strength reduction
1662 ScalarEvolution &SE;
1665 const TargetTransformInfo &TTI;
1669 /// IVIncInsertPos - This is the insert position that the current loop's
1670 /// induction variable increment should be placed. In simple loops, this is
1671 /// the latch block's terminator. But in more complicated cases, this is a
1672 /// position which will dominate all the in-loop post-increment users.
1673 Instruction *IVIncInsertPos;
1675 /// Factors - Interesting factors between use strides.
1676 SmallSetVector<int64_t, 8> Factors;
1678 /// Types - Interesting use types, to facilitate truncation reuse.
1679 SmallSetVector<Type *, 4> Types;
1681 /// Fixups - The list of operands which are to be replaced.
1682 SmallVector<LSRFixup, 16> Fixups;
1684 /// Uses - The list of interesting uses.
1685 SmallVector<LSRUse, 16> Uses;
1687 /// RegUses - Track which uses use which register candidates.
1688 RegUseTracker RegUses;
1690 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1691 // have more than a few IV increment chains in a loop. Missing a Chain falls
1692 // back to normal LSR behavior for those uses.
1693 static const unsigned MaxChains = 8;
1695 /// IVChainVec - IV users can form a chain of IV increments.
1696 SmallVector<IVChain, MaxChains> IVChainVec;
1698 /// IVIncSet - IV users that belong to profitable IVChains.
1699 SmallPtrSet<Use*, MaxChains> IVIncSet;
1701 void OptimizeShadowIV();
1702 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1703 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1704 void OptimizeLoopTermCond();
1706 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1707 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1708 void FinalizeChain(IVChain &Chain);
1709 void CollectChains();
1710 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1711 SmallVectorImpl<WeakVH> &DeadInsts);
1713 void CollectInterestingTypesAndFactors();
1714 void CollectFixupsAndInitialFormulae();
1716 LSRFixup &getNewFixup() {
1717 Fixups.push_back(LSRFixup());
1718 return Fixups.back();
1721 // Support for sharing of LSRUses between LSRFixups.
1722 typedef DenseMap<LSRUse::SCEVUseKindPair, size_t> UseMapTy;
1725 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1726 LSRUse::KindType Kind, MemAccessTy AccessTy);
1728 std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
1729 MemAccessTy AccessTy);
1731 void DeleteUse(LSRUse &LU, size_t LUIdx);
1733 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1735 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1736 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1737 void CountRegisters(const Formula &F, size_t LUIdx);
1738 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1740 void CollectLoopInvariantFixupsAndFormulae();
1742 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1743 unsigned Depth = 0);
1745 void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1746 const Formula &Base, unsigned Depth,
1747 size_t Idx, bool IsScaledReg = false);
1748 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1749 void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1750 const Formula &Base, size_t Idx,
1751 bool IsScaledReg = false);
1752 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1753 void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1754 const Formula &Base,
1755 const SmallVectorImpl<int64_t> &Worklist,
1756 size_t Idx, bool IsScaledReg = false);
1757 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1758 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1759 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1760 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
1761 void GenerateCrossUseConstantOffsets();
1762 void GenerateAllReuseFormulae();
1764 void FilterOutUndesirableDedicatedRegisters();
1766 size_t EstimateSearchSpaceComplexity() const;
1767 void NarrowSearchSpaceByDetectingSupersets();
1768 void NarrowSearchSpaceByCollapsingUnrolledCode();
1769 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
1770 void NarrowSearchSpaceByPickingWinnerRegs();
1771 void NarrowSearchSpaceUsingHeuristics();
1773 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
1775 SmallVectorImpl<const Formula *> &Workspace,
1776 const Cost &CurCost,
1777 const SmallPtrSet<const SCEV *, 16> &CurRegs,
1778 DenseSet<const SCEV *> &VisitedRegs) const;
1779 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
1781 BasicBlock::iterator
1782 HoistInsertPosition(BasicBlock::iterator IP,
1783 const SmallVectorImpl<Instruction *> &Inputs) const;
1784 BasicBlock::iterator
1785 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1788 SCEVExpander &Rewriter) const;
1790 Value *Expand(const LSRFixup &LF,
1792 BasicBlock::iterator IP,
1793 SCEVExpander &Rewriter,
1794 SmallVectorImpl<WeakVH> &DeadInsts) const;
1795 void RewriteForPHI(PHINode *PN, const LSRFixup &LF,
1797 SCEVExpander &Rewriter,
1798 SmallVectorImpl<WeakVH> &DeadInsts,
1800 void Rewrite(const LSRFixup &LF,
1802 SCEVExpander &Rewriter,
1803 SmallVectorImpl<WeakVH> &DeadInsts,
1805 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
1809 LSRInstance(Loop *L, Pass *P);
1811 bool getChanged() const { return Changed; }
1813 void print_factors_and_types(raw_ostream &OS) const;
1814 void print_fixups(raw_ostream &OS) const;
1815 void print_uses(raw_ostream &OS) const;
1816 void print(raw_ostream &OS) const;
1822 /// OptimizeShadowIV - If IV is used in a int-to-float cast
1823 /// inside the loop then try to eliminate the cast operation.
1824 void LSRInstance::OptimizeShadowIV() {
1825 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1826 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1829 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
1830 UI != E; /* empty */) {
1831 IVUsers::const_iterator CandidateUI = UI;
1833 Instruction *ShadowUse = CandidateUI->getUser();
1834 Type *DestTy = nullptr;
1835 bool IsSigned = false;
1837 /* If shadow use is a int->float cast then insert a second IV
1838 to eliminate this cast.
1840 for (unsigned i = 0; i < n; ++i)
1846 for (unsigned i = 0; i < n; ++i, ++d)
1849 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
1851 DestTy = UCast->getDestTy();
1853 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
1855 DestTy = SCast->getDestTy();
1857 if (!DestTy) continue;
1859 // If target does not support DestTy natively then do not apply
1860 // this transformation.
1861 if (!TTI.isTypeLegal(DestTy)) continue;
1863 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
1865 if (PH->getNumIncomingValues() != 2) continue;
1867 Type *SrcTy = PH->getType();
1868 int Mantissa = DestTy->getFPMantissaWidth();
1869 if (Mantissa == -1) continue;
1870 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
1873 unsigned Entry, Latch;
1874 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
1882 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
1883 if (!Init) continue;
1884 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
1885 (double)Init->getSExtValue() :
1886 (double)Init->getZExtValue());
1888 BinaryOperator *Incr =
1889 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
1890 if (!Incr) continue;
1891 if (Incr->getOpcode() != Instruction::Add
1892 && Incr->getOpcode() != Instruction::Sub)
1895 /* Initialize new IV, double d = 0.0 in above example. */
1896 ConstantInt *C = nullptr;
1897 if (Incr->getOperand(0) == PH)
1898 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
1899 else if (Incr->getOperand(1) == PH)
1900 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
1906 // Ignore negative constants, as the code below doesn't handle them
1907 // correctly. TODO: Remove this restriction.
1908 if (!C->getValue().isStrictlyPositive()) continue;
1910 /* Add new PHINode. */
1911 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
1913 /* create new increment. '++d' in above example. */
1914 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
1915 BinaryOperator *NewIncr =
1916 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
1917 Instruction::FAdd : Instruction::FSub,
1918 NewPH, CFP, "IV.S.next.", Incr);
1920 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
1921 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
1923 /* Remove cast operation */
1924 ShadowUse->replaceAllUsesWith(NewPH);
1925 ShadowUse->eraseFromParent();
1931 /// FindIVUserForCond - If Cond has an operand that is an expression of an IV,
1932 /// set the IV user and stride information and return true, otherwise return
1934 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
1935 for (IVStrideUse &U : IU)
1936 if (U.getUser() == Cond) {
1937 // NOTE: we could handle setcc instructions with multiple uses here, but
1938 // InstCombine does it as well for simple uses, it's not clear that it
1939 // occurs enough in real life to handle.
1946 /// OptimizeMax - Rewrite the loop's terminating condition if it uses
1947 /// a max computation.
1949 /// This is a narrow solution to a specific, but acute, problem. For loops
1955 /// } while (++i < n);
1957 /// the trip count isn't just 'n', because 'n' might not be positive. And
1958 /// unfortunately this can come up even for loops where the user didn't use
1959 /// a C do-while loop. For example, seemingly well-behaved top-test loops
1960 /// will commonly be lowered like this:
1966 /// } while (++i < n);
1969 /// and then it's possible for subsequent optimization to obscure the if
1970 /// test in such a way that indvars can't find it.
1972 /// When indvars can't find the if test in loops like this, it creates a
1973 /// max expression, which allows it to give the loop a canonical
1974 /// induction variable:
1977 /// max = n < 1 ? 1 : n;
1980 /// } while (++i != max);
1982 /// Canonical induction variables are necessary because the loop passes
1983 /// are designed around them. The most obvious example of this is the
1984 /// LoopInfo analysis, which doesn't remember trip count values. It
1985 /// expects to be able to rediscover the trip count each time it is
1986 /// needed, and it does this using a simple analysis that only succeeds if
1987 /// the loop has a canonical induction variable.
1989 /// However, when it comes time to generate code, the maximum operation
1990 /// can be quite costly, especially if it's inside of an outer loop.
1992 /// This function solves this problem by detecting this type of loop and
1993 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
1994 /// the instructions for the maximum computation.
1996 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
1997 // Check that the loop matches the pattern we're looking for.
1998 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
1999 Cond->getPredicate() != CmpInst::ICMP_NE)
2002 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
2003 if (!Sel || !Sel->hasOneUse()) return Cond;
2005 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2006 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2008 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
2010 // Add one to the backedge-taken count to get the trip count.
2011 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
2012 if (IterationCount != SE.getSCEV(Sel)) return Cond;
2014 // Check for a max calculation that matches the pattern. There's no check
2015 // for ICMP_ULE here because the comparison would be with zero, which
2016 // isn't interesting.
2017 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
2018 const SCEVNAryExpr *Max = nullptr;
2019 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
2020 Pred = ICmpInst::ICMP_SLE;
2022 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2023 Pred = ICmpInst::ICMP_SLT;
2025 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2026 Pred = ICmpInst::ICMP_ULT;
2033 // To handle a max with more than two operands, this optimization would
2034 // require additional checking and setup.
2035 if (Max->getNumOperands() != 2)
2038 const SCEV *MaxLHS = Max->getOperand(0);
2039 const SCEV *MaxRHS = Max->getOperand(1);
2041 // ScalarEvolution canonicalizes constants to the left. For < and >, look
2042 // for a comparison with 1. For <= and >=, a comparison with zero.
2044 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2047 // Check the relevant induction variable for conformance to
2049 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2050 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2051 if (!AR || !AR->isAffine() ||
2052 AR->getStart() != One ||
2053 AR->getStepRecurrence(SE) != One)
2056 assert(AR->getLoop() == L &&
2057 "Loop condition operand is an addrec in a different loop!");
2059 // Check the right operand of the select, and remember it, as it will
2060 // be used in the new comparison instruction.
2061 Value *NewRHS = nullptr;
2062 if (ICmpInst::isTrueWhenEqual(Pred)) {
2063 // Look for n+1, and grab n.
2064 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2065 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2066 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2067 NewRHS = BO->getOperand(0);
2068 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2069 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2070 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2071 NewRHS = BO->getOperand(0);
2074 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2075 NewRHS = Sel->getOperand(1);
2076 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2077 NewRHS = Sel->getOperand(2);
2078 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2079 NewRHS = SU->getValue();
2081 // Max doesn't match expected pattern.
2084 // Determine the new comparison opcode. It may be signed or unsigned,
2085 // and the original comparison may be either equality or inequality.
2086 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2087 Pred = CmpInst::getInversePredicate(Pred);
2089 // Ok, everything looks ok to change the condition into an SLT or SGE and
2090 // delete the max calculation.
2092 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2094 // Delete the max calculation instructions.
2095 Cond->replaceAllUsesWith(NewCond);
2096 CondUse->setUser(NewCond);
2097 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2098 Cond->eraseFromParent();
2099 Sel->eraseFromParent();
2100 if (Cmp->use_empty())
2101 Cmp->eraseFromParent();
2105 /// OptimizeLoopTermCond - Change loop terminating condition to use the
2106 /// postinc iv when possible.
2108 LSRInstance::OptimizeLoopTermCond() {
2109 SmallPtrSet<Instruction *, 4> PostIncs;
2111 BasicBlock *LatchBlock = L->getLoopLatch();
2112 SmallVector<BasicBlock*, 8> ExitingBlocks;
2113 L->getExitingBlocks(ExitingBlocks);
2115 for (BasicBlock *ExitingBlock : ExitingBlocks) {
2117 // Get the terminating condition for the loop if possible. If we
2118 // can, we want to change it to use a post-incremented version of its
2119 // induction variable, to allow coalescing the live ranges for the IV into
2120 // one register value.
2122 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2125 // FIXME: Overly conservative, termination condition could be an 'or' etc..
2126 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2129 // Search IVUsesByStride to find Cond's IVUse if there is one.
2130 IVStrideUse *CondUse = nullptr;
2131 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2132 if (!FindIVUserForCond(Cond, CondUse))
2135 // If the trip count is computed in terms of a max (due to ScalarEvolution
2136 // being unable to find a sufficient guard, for example), change the loop
2137 // comparison to use SLT or ULT instead of NE.
2138 // One consequence of doing this now is that it disrupts the count-down
2139 // optimization. That's not always a bad thing though, because in such
2140 // cases it may still be worthwhile to avoid a max.
2141 Cond = OptimizeMax(Cond, CondUse);
2143 // If this exiting block dominates the latch block, it may also use
2144 // the post-inc value if it won't be shared with other uses.
2145 // Check for dominance.
2146 if (!DT.dominates(ExitingBlock, LatchBlock))
2149 // Conservatively avoid trying to use the post-inc value in non-latch
2150 // exits if there may be pre-inc users in intervening blocks.
2151 if (LatchBlock != ExitingBlock)
2152 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2153 // Test if the use is reachable from the exiting block. This dominator
2154 // query is a conservative approximation of reachability.
2155 if (&*UI != CondUse &&
2156 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2157 // Conservatively assume there may be reuse if the quotient of their
2158 // strides could be a legal scale.
2159 const SCEV *A = IU.getStride(*CondUse, L);
2160 const SCEV *B = IU.getStride(*UI, L);
2161 if (!A || !B) continue;
2162 if (SE.getTypeSizeInBits(A->getType()) !=
2163 SE.getTypeSizeInBits(B->getType())) {
2164 if (SE.getTypeSizeInBits(A->getType()) >
2165 SE.getTypeSizeInBits(B->getType()))
2166 B = SE.getSignExtendExpr(B, A->getType());
2168 A = SE.getSignExtendExpr(A, B->getType());
2170 if (const SCEVConstant *D =
2171 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2172 const ConstantInt *C = D->getValue();
2173 // Stride of one or negative one can have reuse with non-addresses.
2174 if (C->isOne() || C->isAllOnesValue())
2175 goto decline_post_inc;
2176 // Avoid weird situations.
2177 if (C->getValue().getMinSignedBits() >= 64 ||
2178 C->getValue().isMinSignedValue())
2179 goto decline_post_inc;
2180 // Check for possible scaled-address reuse.
2181 MemAccessTy AccessTy = getAccessType(UI->getUser());
2182 int64_t Scale = C->getSExtValue();
2183 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2185 /*HasBaseReg=*/false, Scale,
2186 AccessTy.AddrSpace))
2187 goto decline_post_inc;
2189 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2191 /*HasBaseReg=*/false, Scale,
2192 AccessTy.AddrSpace))
2193 goto decline_post_inc;
2197 DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2200 // It's possible for the setcc instruction to be anywhere in the loop, and
2201 // possible for it to have multiple users. If it is not immediately before
2202 // the exiting block branch, move it.
2203 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2204 if (Cond->hasOneUse()) {
2205 Cond->moveBefore(TermBr);
2207 // Clone the terminating condition and insert into the loopend.
2208 ICmpInst *OldCond = Cond;
2209 Cond = cast<ICmpInst>(Cond->clone());
2210 Cond->setName(L->getHeader()->getName() + ".termcond");
2211 ExitingBlock->getInstList().insert(TermBr, Cond);
2213 // Clone the IVUse, as the old use still exists!
2214 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2215 TermBr->replaceUsesOfWith(OldCond, Cond);
2219 // If we get to here, we know that we can transform the setcc instruction to
2220 // use the post-incremented version of the IV, allowing us to coalesce the
2221 // live ranges for the IV correctly.
2222 CondUse->transformToPostInc(L);
2225 PostIncs.insert(Cond);
2229 // Determine an insertion point for the loop induction variable increment. It
2230 // must dominate all the post-inc comparisons we just set up, and it must
2231 // dominate the loop latch edge.
2232 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2233 for (Instruction *Inst : PostIncs) {
2235 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2237 if (BB == Inst->getParent())
2238 IVIncInsertPos = Inst;
2239 else if (BB != IVIncInsertPos->getParent())
2240 IVIncInsertPos = BB->getTerminator();
2244 /// reconcileNewOffset - Determine if the given use can accommodate a fixup
2245 /// at the given offset and other details. If so, update the use and
2247 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2248 bool HasBaseReg, LSRUse::KindType Kind,
2249 MemAccessTy AccessTy) {
2250 int64_t NewMinOffset = LU.MinOffset;
2251 int64_t NewMaxOffset = LU.MaxOffset;
2252 MemAccessTy NewAccessTy = AccessTy;
2254 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2255 // something conservative, however this can pessimize in the case that one of
2256 // the uses will have all its uses outside the loop, for example.
2257 if (LU.Kind != Kind)
2260 // Check for a mismatched access type, and fall back conservatively as needed.
2261 // TODO: Be less conservative when the type is similar and can use the same
2262 // addressing modes.
2263 if (Kind == LSRUse::Address) {
2264 if (AccessTy != LU.AccessTy)
2265 NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext());
2268 // Conservatively assume HasBaseReg is true for now.
2269 if (NewOffset < LU.MinOffset) {
2270 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2271 LU.MaxOffset - NewOffset, HasBaseReg))
2273 NewMinOffset = NewOffset;
2274 } else if (NewOffset > LU.MaxOffset) {
2275 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2276 NewOffset - LU.MinOffset, HasBaseReg))
2278 NewMaxOffset = NewOffset;
2282 LU.MinOffset = NewMinOffset;
2283 LU.MaxOffset = NewMaxOffset;
2284 LU.AccessTy = NewAccessTy;
2285 if (NewOffset != LU.Offsets.back())
2286 LU.Offsets.push_back(NewOffset);
2290 /// getUse - Return an LSRUse index and an offset value for a fixup which
2291 /// needs the given expression, with the given kind and optional access type.
2292 /// Either reuse an existing use or create a new one, as needed.
2293 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2294 LSRUse::KindType Kind,
2295 MemAccessTy AccessTy) {
2296 const SCEV *Copy = Expr;
2297 int64_t Offset = ExtractImmediate(Expr, SE);
2299 // Basic uses can't accept any offset, for example.
2300 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2301 Offset, /*HasBaseReg=*/ true)) {
2306 std::pair<UseMapTy::iterator, bool> P =
2307 UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2309 // A use already existed with this base.
2310 size_t LUIdx = P.first->second;
2311 LSRUse &LU = Uses[LUIdx];
2312 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2314 return std::make_pair(LUIdx, Offset);
2317 // Create a new use.
2318 size_t LUIdx = Uses.size();
2319 P.first->second = LUIdx;
2320 Uses.push_back(LSRUse(Kind, AccessTy));
2321 LSRUse &LU = Uses[LUIdx];
2323 // We don't need to track redundant offsets, but we don't need to go out
2324 // of our way here to avoid them.
2325 if (LU.Offsets.empty() || Offset != LU.Offsets.back())
2326 LU.Offsets.push_back(Offset);
2328 LU.MinOffset = Offset;
2329 LU.MaxOffset = Offset;
2330 return std::make_pair(LUIdx, Offset);
2333 /// DeleteUse - Delete the given use from the Uses list.
2334 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2335 if (&LU != &Uses.back())
2336 std::swap(LU, Uses.back());
2340 RegUses.swapAndDropUse(LUIdx, Uses.size());
2343 /// FindUseWithFormula - Look for a use distinct from OrigLU which is has
2344 /// a formula that has the same registers as the given formula.
2346 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2347 const LSRUse &OrigLU) {
2348 // Search all uses for the formula. This could be more clever.
2349 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2350 LSRUse &LU = Uses[LUIdx];
2351 // Check whether this use is close enough to OrigLU, to see whether it's
2352 // worthwhile looking through its formulae.
2353 // Ignore ICmpZero uses because they may contain formulae generated by
2354 // GenerateICmpZeroScales, in which case adding fixup offsets may
2356 if (&LU != &OrigLU &&
2357 LU.Kind != LSRUse::ICmpZero &&
2358 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2359 LU.WidestFixupType == OrigLU.WidestFixupType &&
2360 LU.HasFormulaWithSameRegs(OrigF)) {
2361 // Scan through this use's formulae.
2362 for (const Formula &F : LU.Formulae) {
2363 // Check to see if this formula has the same registers and symbols
2365 if (F.BaseRegs == OrigF.BaseRegs &&
2366 F.ScaledReg == OrigF.ScaledReg &&
2367 F.BaseGV == OrigF.BaseGV &&
2368 F.Scale == OrigF.Scale &&
2369 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2370 if (F.BaseOffset == 0)
2372 // This is the formula where all the registers and symbols matched;
2373 // there aren't going to be any others. Since we declined it, we
2374 // can skip the rest of the formulae and proceed to the next LSRUse.
2381 // Nothing looked good.
2385 void LSRInstance::CollectInterestingTypesAndFactors() {
2386 SmallSetVector<const SCEV *, 4> Strides;
2388 // Collect interesting types and strides.
2389 SmallVector<const SCEV *, 4> Worklist;
2390 for (const IVStrideUse &U : IU) {
2391 const SCEV *Expr = IU.getExpr(U);
2393 // Collect interesting types.
2394 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2396 // Add strides for mentioned loops.
2397 Worklist.push_back(Expr);
2399 const SCEV *S = Worklist.pop_back_val();
2400 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2401 if (AR->getLoop() == L)
2402 Strides.insert(AR->getStepRecurrence(SE));
2403 Worklist.push_back(AR->getStart());
2404 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2405 Worklist.append(Add->op_begin(), Add->op_end());
2407 } while (!Worklist.empty());
2410 // Compute interesting factors from the set of interesting strides.
2411 for (SmallSetVector<const SCEV *, 4>::const_iterator
2412 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2413 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2414 std::next(I); NewStrideIter != E; ++NewStrideIter) {
2415 const SCEV *OldStride = *I;
2416 const SCEV *NewStride = *NewStrideIter;
2418 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2419 SE.getTypeSizeInBits(NewStride->getType())) {
2420 if (SE.getTypeSizeInBits(OldStride->getType()) >
2421 SE.getTypeSizeInBits(NewStride->getType()))
2422 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2424 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2426 if (const SCEVConstant *Factor =
2427 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2429 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2430 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2431 } else if (const SCEVConstant *Factor =
2432 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2435 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2436 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2440 // If all uses use the same type, don't bother looking for truncation-based
2442 if (Types.size() == 1)
2445 DEBUG(print_factors_and_types(dbgs()));
2448 /// findIVOperand - Helper for CollectChains that finds an IV operand (computed
2449 /// by an AddRec in this loop) within [OI,OE) or returns OE. If IVUsers mapped
2450 /// Instructions to IVStrideUses, we could partially skip this.
2451 static User::op_iterator
2452 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2453 Loop *L, ScalarEvolution &SE) {
2454 for(; OI != OE; ++OI) {
2455 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2456 if (!SE.isSCEVable(Oper->getType()))
2459 if (const SCEVAddRecExpr *AR =
2460 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2461 if (AR->getLoop() == L)
2469 /// getWideOperand - IVChain logic must consistenctly peek base TruncInst
2470 /// operands, so wrap it in a convenient helper.
2471 static Value *getWideOperand(Value *Oper) {
2472 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2473 return Trunc->getOperand(0);
2477 /// isCompatibleIVType - Return true if we allow an IV chain to include both
2479 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2480 Type *LType = LVal->getType();
2481 Type *RType = RVal->getType();
2482 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy());
2485 /// getExprBase - Return an approximation of this SCEV expression's "base", or
2486 /// NULL for any constant. Returning the expression itself is
2487 /// conservative. Returning a deeper subexpression is more precise and valid as
2488 /// long as it isn't less complex than another subexpression. For expressions
2489 /// involving multiple unscaled values, we need to return the pointer-type
2490 /// SCEVUnknown. This avoids forming chains across objects, such as:
2491 /// PrevOper==a[i], IVOper==b[i], IVInc==b-a.
2493 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2494 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2495 static const SCEV *getExprBase(const SCEV *S) {
2496 switch (S->getSCEVType()) {
2497 default: // uncluding scUnknown.
2502 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2504 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2506 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2508 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2509 // there's nothing more complex.
2510 // FIXME: not sure if we want to recognize negation.
2511 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2512 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2513 E(Add->op_begin()); I != E; ++I) {
2514 const SCEV *SubExpr = *I;
2515 if (SubExpr->getSCEVType() == scAddExpr)
2516 return getExprBase(SubExpr);
2518 if (SubExpr->getSCEVType() != scMulExpr)
2521 return S; // all operands are scaled, be conservative.
2524 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2528 /// Return true if the chain increment is profitable to expand into a loop
2529 /// invariant value, which may require its own register. A profitable chain
2530 /// increment will be an offset relative to the same base. We allow such offsets
2531 /// to potentially be used as chain increment as long as it's not obviously
2532 /// expensive to expand using real instructions.
2533 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2534 const SCEV *IncExpr,
2535 ScalarEvolution &SE) {
2536 // Aggressively form chains when -stress-ivchain.
2540 // Do not replace a constant offset from IV head with a nonconstant IV
2542 if (!isa<SCEVConstant>(IncExpr)) {
2543 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2544 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2548 SmallPtrSet<const SCEV*, 8> Processed;
2549 return !isHighCostExpansion(IncExpr, Processed, SE);
2552 /// Return true if the number of registers needed for the chain is estimated to
2553 /// be less than the number required for the individual IV users. First prohibit
2554 /// any IV users that keep the IV live across increments (the Users set should
2555 /// be empty). Next count the number and type of increments in the chain.
2557 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2558 /// effectively use postinc addressing modes. Only consider it profitable it the
2559 /// increments can be computed in fewer registers when chained.
2561 /// TODO: Consider IVInc free if it's already used in another chains.
2563 isProfitableChain(IVChain &Chain, SmallPtrSetImpl<Instruction*> &Users,
2564 ScalarEvolution &SE, const TargetTransformInfo &TTI) {
2568 if (!Chain.hasIncs())
2571 if (!Users.empty()) {
2572 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2573 for (Instruction *Inst : Users) {
2574 dbgs() << " " << *Inst << "\n";
2578 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2580 // The chain itself may require a register, so intialize cost to 1.
2583 // A complete chain likely eliminates the need for keeping the original IV in
2584 // a register. LSR does not currently know how to form a complete chain unless
2585 // the header phi already exists.
2586 if (isa<PHINode>(Chain.tailUserInst())
2587 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2590 const SCEV *LastIncExpr = nullptr;
2591 unsigned NumConstIncrements = 0;
2592 unsigned NumVarIncrements = 0;
2593 unsigned NumReusedIncrements = 0;
2594 for (const IVInc &Inc : Chain) {
2595 if (Inc.IncExpr->isZero())
2598 // Incrementing by zero or some constant is neutral. We assume constants can
2599 // be folded into an addressing mode or an add's immediate operand.
2600 if (isa<SCEVConstant>(Inc.IncExpr)) {
2601 ++NumConstIncrements;
2605 if (Inc.IncExpr == LastIncExpr)
2606 ++NumReusedIncrements;
2610 LastIncExpr = Inc.IncExpr;
2612 // An IV chain with a single increment is handled by LSR's postinc
2613 // uses. However, a chain with multiple increments requires keeping the IV's
2614 // value live longer than it needs to be if chained.
2615 if (NumConstIncrements > 1)
2618 // Materializing increment expressions in the preheader that didn't exist in
2619 // the original code may cost a register. For example, sign-extended array
2620 // indices can produce ridiculous increments like this:
2621 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2622 cost += NumVarIncrements;
2624 // Reusing variable increments likely saves a register to hold the multiple of
2626 cost -= NumReusedIncrements;
2628 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2634 /// ChainInstruction - Add this IV user to an existing chain or make it the head
2636 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2637 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2638 // When IVs are used as types of varying widths, they are generally converted
2639 // to a wider type with some uses remaining narrow under a (free) trunc.
2640 Value *const NextIV = getWideOperand(IVOper);
2641 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2642 const SCEV *const OperExprBase = getExprBase(OperExpr);
2644 // Visit all existing chains. Check if its IVOper can be computed as a
2645 // profitable loop invariant increment from the last link in the Chain.
2646 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2647 const SCEV *LastIncExpr = nullptr;
2648 for (; ChainIdx < NChains; ++ChainIdx) {
2649 IVChain &Chain = IVChainVec[ChainIdx];
2651 // Prune the solution space aggressively by checking that both IV operands
2652 // are expressions that operate on the same unscaled SCEVUnknown. This
2653 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2654 // first avoids creating extra SCEV expressions.
2655 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2658 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2659 if (!isCompatibleIVType(PrevIV, NextIV))
2662 // A phi node terminates a chain.
2663 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2666 // The increment must be loop-invariant so it can be kept in a register.
2667 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2668 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2669 if (!SE.isLoopInvariant(IncExpr, L))
2672 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2673 LastIncExpr = IncExpr;
2677 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2678 // bother for phi nodes, because they must be last in the chain.
2679 if (ChainIdx == NChains) {
2680 if (isa<PHINode>(UserInst))
2682 if (NChains >= MaxChains && !StressIVChain) {
2683 DEBUG(dbgs() << "IV Chain Limit\n");
2686 LastIncExpr = OperExpr;
2687 // IVUsers may have skipped over sign/zero extensions. We don't currently
2688 // attempt to form chains involving extensions unless they can be hoisted
2689 // into this loop's AddRec.
2690 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2693 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2695 ChainUsersVec.resize(NChains);
2696 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2697 << ") IV=" << *LastIncExpr << "\n");
2699 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2700 << ") IV+" << *LastIncExpr << "\n");
2701 // Add this IV user to the end of the chain.
2702 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2704 IVChain &Chain = IVChainVec[ChainIdx];
2706 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2707 // This chain's NearUsers become FarUsers.
2708 if (!LastIncExpr->isZero()) {
2709 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2714 // All other uses of IVOperand become near uses of the chain.
2715 // We currently ignore intermediate values within SCEV expressions, assuming
2716 // they will eventually be used be the current chain, or can be computed
2717 // from one of the chain increments. To be more precise we could
2718 // transitively follow its user and only add leaf IV users to the set.
2719 for (User *U : IVOper->users()) {
2720 Instruction *OtherUse = dyn_cast<Instruction>(U);
2723 // Uses in the chain will no longer be uses if the chain is formed.
2724 // Include the head of the chain in this iteration (not Chain.begin()).
2725 IVChain::const_iterator IncIter = Chain.Incs.begin();
2726 IVChain::const_iterator IncEnd = Chain.Incs.end();
2727 for( ; IncIter != IncEnd; ++IncIter) {
2728 if (IncIter->UserInst == OtherUse)
2731 if (IncIter != IncEnd)
2734 if (SE.isSCEVable(OtherUse->getType())
2735 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
2736 && IU.isIVUserOrOperand(OtherUse)) {
2739 NearUsers.insert(OtherUse);
2742 // Since this user is part of the chain, it's no longer considered a use
2744 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
2747 /// CollectChains - Populate the vector of Chains.
2749 /// This decreases ILP at the architecture level. Targets with ample registers,
2750 /// multiple memory ports, and no register renaming probably don't want
2751 /// this. However, such targets should probably disable LSR altogether.
2753 /// The job of LSR is to make a reasonable choice of induction variables across
2754 /// the loop. Subsequent passes can easily "unchain" computation exposing more
2755 /// ILP *within the loop* if the target wants it.
2757 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
2758 /// will not reorder memory operations, it will recognize this as a chain, but
2759 /// will generate redundant IV increments. Ideally this would be corrected later
2760 /// by a smart scheduler:
2766 /// TODO: Walk the entire domtree within this loop, not just the path to the
2767 /// loop latch. This will discover chains on side paths, but requires
2768 /// maintaining multiple copies of the Chains state.
2769 void LSRInstance::CollectChains() {
2770 DEBUG(dbgs() << "Collecting IV Chains.\n");
2771 SmallVector<ChainUsers, 8> ChainUsersVec;
2773 SmallVector<BasicBlock *,8> LatchPath;
2774 BasicBlock *LoopHeader = L->getHeader();
2775 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
2776 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
2777 LatchPath.push_back(Rung->getBlock());
2779 LatchPath.push_back(LoopHeader);
2781 // Walk the instruction stream from the loop header to the loop latch.
2782 for (SmallVectorImpl<BasicBlock *>::reverse_iterator
2783 BBIter = LatchPath.rbegin(), BBEnd = LatchPath.rend();
2784 BBIter != BBEnd; ++BBIter) {
2785 for (BasicBlock::iterator I = (*BBIter)->begin(), E = (*BBIter)->end();
2787 // Skip instructions that weren't seen by IVUsers analysis.
2788 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(I))
2791 // Ignore users that are part of a SCEV expression. This way we only
2792 // consider leaf IV Users. This effectively rediscovers a portion of
2793 // IVUsers analysis but in program order this time.
2794 if (SE.isSCEVable(I->getType()) && !isa<SCEVUnknown>(SE.getSCEV(I)))
2797 // Remove this instruction from any NearUsers set it may be in.
2798 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
2799 ChainIdx < NChains; ++ChainIdx) {
2800 ChainUsersVec[ChainIdx].NearUsers.erase(I);
2802 // Search for operands that can be chained.
2803 SmallPtrSet<Instruction*, 4> UniqueOperands;
2804 User::op_iterator IVOpEnd = I->op_end();
2805 User::op_iterator IVOpIter = findIVOperand(I->op_begin(), IVOpEnd, L, SE);
2806 while (IVOpIter != IVOpEnd) {
2807 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
2808 if (UniqueOperands.insert(IVOpInst).second)
2809 ChainInstruction(I, IVOpInst, ChainUsersVec);
2810 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2812 } // Continue walking down the instructions.
2813 } // Continue walking down the domtree.
2814 // Visit phi backedges to determine if the chain can generate the IV postinc.
2815 for (BasicBlock::iterator I = L->getHeader()->begin();
2816 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
2817 if (!SE.isSCEVable(PN->getType()))
2821 dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
2823 ChainInstruction(PN, IncV, ChainUsersVec);
2825 // Remove any unprofitable chains.
2826 unsigned ChainIdx = 0;
2827 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
2828 UsersIdx < NChains; ++UsersIdx) {
2829 if (!isProfitableChain(IVChainVec[UsersIdx],
2830 ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
2832 // Preserve the chain at UsesIdx.
2833 if (ChainIdx != UsersIdx)
2834 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
2835 FinalizeChain(IVChainVec[ChainIdx]);
2838 IVChainVec.resize(ChainIdx);
2841 void LSRInstance::FinalizeChain(IVChain &Chain) {
2842 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2843 DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
2845 for (const IVInc &Inc : Chain) {
2846 DEBUG(dbgs() << " Inc: " << Inc.UserInst << "\n");
2847 auto UseI = std::find(Inc.UserInst->op_begin(), Inc.UserInst->op_end(),
2849 assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
2850 IVIncSet.insert(UseI);
2854 /// Return true if the IVInc can be folded into an addressing mode.
2855 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
2856 Value *Operand, const TargetTransformInfo &TTI) {
2857 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
2858 if (!IncConst || !isAddressUse(UserInst, Operand))
2861 if (IncConst->getValue()->getValue().getMinSignedBits() > 64)
2864 MemAccessTy AccessTy = getAccessType(UserInst);
2865 int64_t IncOffset = IncConst->getValue()->getSExtValue();
2866 if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
2867 IncOffset, /*HaseBaseReg=*/false))
2873 /// GenerateIVChains - Generate an add or subtract for each IVInc in a chain to
2874 /// materialize the IV user's operand from the previous IV user's operand.
2875 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
2876 SmallVectorImpl<WeakVH> &DeadInsts) {
2877 // Find the new IVOperand for the head of the chain. It may have been replaced
2879 const IVInc &Head = Chain.Incs[0];
2880 User::op_iterator IVOpEnd = Head.UserInst->op_end();
2881 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
2882 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
2884 Value *IVSrc = nullptr;
2885 while (IVOpIter != IVOpEnd) {
2886 IVSrc = getWideOperand(*IVOpIter);
2888 // If this operand computes the expression that the chain needs, we may use
2889 // it. (Check this after setting IVSrc which is used below.)
2891 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
2892 // narrow for the chain, so we can no longer use it. We do allow using a
2893 // wider phi, assuming the LSR checked for free truncation. In that case we
2894 // should already have a truncate on this operand such that
2895 // getSCEV(IVSrc) == IncExpr.
2896 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
2897 || SE.getSCEV(IVSrc) == Head.IncExpr) {
2900 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
2902 if (IVOpIter == IVOpEnd) {
2903 // Gracefully give up on this chain.
2904 DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
2908 DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
2909 Type *IVTy = IVSrc->getType();
2910 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
2911 const SCEV *LeftOverExpr = nullptr;
2912 for (const IVInc &Inc : Chain) {
2913 Instruction *InsertPt = Inc.UserInst;
2914 if (isa<PHINode>(InsertPt))
2915 InsertPt = L->getLoopLatch()->getTerminator();
2917 // IVOper will replace the current IV User's operand. IVSrc is the IV
2918 // value currently held in a register.
2919 Value *IVOper = IVSrc;
2920 if (!Inc.IncExpr->isZero()) {
2921 // IncExpr was the result of subtraction of two narrow values, so must
2923 const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
2924 LeftOverExpr = LeftOverExpr ?
2925 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
2927 if (LeftOverExpr && !LeftOverExpr->isZero()) {
2928 // Expand the IV increment.
2929 Rewriter.clearPostInc();
2930 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
2931 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
2932 SE.getUnknown(IncV));
2933 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
2935 // If an IV increment can't be folded, use it as the next IV value.
2936 if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
2937 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
2939 LeftOverExpr = nullptr;
2942 Type *OperTy = Inc.IVOperand->getType();
2943 if (IVTy != OperTy) {
2944 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
2945 "cannot extend a chained IV");
2946 IRBuilder<> Builder(InsertPt);
2947 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
2949 Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
2950 DeadInsts.emplace_back(Inc.IVOperand);
2952 // If LSR created a new, wider phi, we may also replace its postinc. We only
2953 // do this if we also found a wide value for the head of the chain.
2954 if (isa<PHINode>(Chain.tailUserInst())) {
2955 for (BasicBlock::iterator I = L->getHeader()->begin();
2956 PHINode *Phi = dyn_cast<PHINode>(I); ++I) {
2957 if (!isCompatibleIVType(Phi, IVSrc))
2959 Instruction *PostIncV = dyn_cast<Instruction>(
2960 Phi->getIncomingValueForBlock(L->getLoopLatch()));
2961 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
2963 Value *IVOper = IVSrc;
2964 Type *PostIncTy = PostIncV->getType();
2965 if (IVTy != PostIncTy) {
2966 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
2967 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
2968 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
2969 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
2971 Phi->replaceUsesOfWith(PostIncV, IVOper);
2972 DeadInsts.emplace_back(PostIncV);
2977 void LSRInstance::CollectFixupsAndInitialFormulae() {
2978 for (const IVStrideUse &U : IU) {
2979 Instruction *UserInst = U.getUser();
2980 // Skip IV users that are part of profitable IV Chains.
2981 User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
2982 U.getOperandValToReplace());
2983 assert(UseI != UserInst->op_end() && "cannot find IV operand");
2984 if (IVIncSet.count(UseI))
2988 LSRFixup &LF = getNewFixup();
2989 LF.UserInst = UserInst;
2990 LF.OperandValToReplace = U.getOperandValToReplace();
2991 LF.PostIncLoops = U.getPostIncLoops();
2993 LSRUse::KindType Kind = LSRUse::Basic;
2994 MemAccessTy AccessTy;
2995 if (isAddressUse(LF.UserInst, LF.OperandValToReplace)) {
2996 Kind = LSRUse::Address;
2997 AccessTy = getAccessType(LF.UserInst);
3000 const SCEV *S = IU.getExpr(U);
3002 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
3003 // (N - i == 0), and this allows (N - i) to be the expression that we work
3004 // with rather than just N or i, so we can consider the register
3005 // requirements for both N and i at the same time. Limiting this code to
3006 // equality icmps is not a problem because all interesting loops use
3007 // equality icmps, thanks to IndVarSimplify.
3008 if (ICmpInst *CI = dyn_cast<ICmpInst>(LF.UserInst))
3009 if (CI->isEquality()) {
3010 // Swap the operands if needed to put the OperandValToReplace on the
3011 // left, for consistency.
3012 Value *NV = CI->getOperand(1);
3013 if (NV == LF.OperandValToReplace) {
3014 CI->setOperand(1, CI->getOperand(0));
3015 CI->setOperand(0, NV);
3016 NV = CI->getOperand(1);
3020 // x == y --> x - y == 0
3021 const SCEV *N = SE.getSCEV(NV);
3022 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
3023 // S is normalized, so normalize N before folding it into S
3024 // to keep the result normalized.
3025 N = TransformForPostIncUse(Normalize, N, CI, nullptr,
3026 LF.PostIncLoops, SE, DT);
3027 Kind = LSRUse::ICmpZero;
3028 S = SE.getMinusSCEV(N, S);
3031 // -1 and the negations of all interesting strides (except the negation
3032 // of -1) are now also interesting.
3033 for (size_t i = 0, e = Factors.size(); i != e; ++i)
3034 if (Factors[i] != -1)
3035 Factors.insert(-(uint64_t)Factors[i]);
3039 // Set up the initial formula for this use.
3040 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3042 LF.Offset = P.second;
3043 LSRUse &LU = Uses[LF.LUIdx];
3044 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3045 if (!LU.WidestFixupType ||
3046 SE.getTypeSizeInBits(LU.WidestFixupType) <
3047 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3048 LU.WidestFixupType = LF.OperandValToReplace->getType();
3050 // If this is the first use of this LSRUse, give it a formula.
3051 if (LU.Formulae.empty()) {
3052 InsertInitialFormula(S, LU, LF.LUIdx);
3053 CountRegisters(LU.Formulae.back(), LF.LUIdx);
3057 DEBUG(print_fixups(dbgs()));
3060 /// InsertInitialFormula - Insert a formula for the given expression into
3061 /// the given use, separating out loop-variant portions from loop-invariant
3062 /// and loop-computable portions.
3064 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3065 // Mark uses whose expressions cannot be expanded.
3066 if (!isSafeToExpand(S, SE))
3067 LU.RigidFormula = true;
3070 F.initialMatch(S, L, SE);
3071 bool Inserted = InsertFormula(LU, LUIdx, F);
3072 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3075 /// InsertSupplementalFormula - Insert a simple single-register formula for
3076 /// the given expression into the given use.
3078 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3079 LSRUse &LU, size_t LUIdx) {
3081 F.BaseRegs.push_back(S);
3082 F.HasBaseReg = true;
3083 bool Inserted = InsertFormula(LU, LUIdx, F);
3084 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3087 /// CountRegisters - Note which registers are used by the given formula,
3088 /// updating RegUses.
3089 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3091 RegUses.countRegister(F.ScaledReg, LUIdx);
3092 for (const SCEV *BaseReg : F.BaseRegs)
3093 RegUses.countRegister(BaseReg, LUIdx);
3096 /// InsertFormula - If the given formula has not yet been inserted, add it to
3097 /// the list, and return true. Return false otherwise.
3098 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3099 // Do not insert formula that we will not be able to expand.
3100 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3101 "Formula is illegal");
3102 if (!LU.InsertFormula(F))
3105 CountRegisters(F, LUIdx);
3109 /// CollectLoopInvariantFixupsAndFormulae - Check for other uses of
3110 /// loop-invariant values which we're tracking. These other uses will pin these
3111 /// values in registers, making them less profitable for elimination.
3112 /// TODO: This currently misses non-constant addrec step registers.
3113 /// TODO: Should this give more weight to users inside the loop?
3115 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3116 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3117 SmallPtrSet<const SCEV *, 32> Visited;
3119 while (!Worklist.empty()) {
3120 const SCEV *S = Worklist.pop_back_val();
3122 // Don't process the same SCEV twice
3123 if (!Visited.insert(S).second)
3126 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3127 Worklist.append(N->op_begin(), N->op_end());
3128 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3129 Worklist.push_back(C->getOperand());
3130 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3131 Worklist.push_back(D->getLHS());
3132 Worklist.push_back(D->getRHS());
3133 } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3134 const Value *V = US->getValue();
3135 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3136 // Look for instructions defined outside the loop.
3137 if (L->contains(Inst)) continue;
3138 } else if (isa<UndefValue>(V))
3139 // Undef doesn't have a live range, so it doesn't matter.
3141 for (const Use &U : V->uses()) {
3142 const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3143 // Ignore non-instructions.
3146 // Ignore instructions in other functions (as can happen with
3148 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3150 // Ignore instructions not dominated by the loop.
3151 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3152 UserInst->getParent() :
3153 cast<PHINode>(UserInst)->getIncomingBlock(
3154 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3155 if (!DT.dominates(L->getHeader(), UseBB))
3157 // Ignore uses which are part of other SCEV expressions, to avoid
3158 // analyzing them multiple times.
3159 if (SE.isSCEVable(UserInst->getType())) {
3160 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3161 // If the user is a no-op, look through to its uses.
3162 if (!isa<SCEVUnknown>(UserS))
3166 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3170 // Ignore icmp instructions which are already being analyzed.
3171 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3172 unsigned OtherIdx = !U.getOperandNo();
3173 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3174 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3178 LSRFixup &LF = getNewFixup();
3179 LF.UserInst = const_cast<Instruction *>(UserInst);
3180 LF.OperandValToReplace = U;
3181 std::pair<size_t, int64_t> P = getUse(
3182 S, LSRUse::Basic, MemAccessTy());
3184 LF.Offset = P.second;
3185 LSRUse &LU = Uses[LF.LUIdx];
3186 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3187 if (!LU.WidestFixupType ||
3188 SE.getTypeSizeInBits(LU.WidestFixupType) <
3189 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3190 LU.WidestFixupType = LF.OperandValToReplace->getType();
3191 InsertSupplementalFormula(US, LU, LF.LUIdx);
3192 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3199 /// CollectSubexprs - Split S into subexpressions which can be pulled out into
3200 /// separate registers. If C is non-null, multiply each subexpression by C.
3202 /// Return remainder expression after factoring the subexpressions captured by
3203 /// Ops. If Ops is complete, return NULL.
3204 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3205 SmallVectorImpl<const SCEV *> &Ops,
3207 ScalarEvolution &SE,
3208 unsigned Depth = 0) {
3209 // Arbitrarily cap recursion to protect compile time.
3213 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3214 // Break out add operands.
3215 for (const SCEV *S : Add->operands()) {
3216 const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
3218 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3221 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3222 // Split a non-zero base out of an addrec.
3223 if (AR->getStart()->isZero())
3226 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3227 C, Ops, L, SE, Depth+1);
3228 // Split the non-zero AddRec unless it is part of a nested recurrence that
3229 // does not pertain to this loop.
3230 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3231 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3232 Remainder = nullptr;
3234 if (Remainder != AR->getStart()) {
3236 Remainder = SE.getConstant(AR->getType(), 0);
3237 return SE.getAddRecExpr(Remainder,
3238 AR->getStepRecurrence(SE),
3240 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3243 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3244 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3245 if (Mul->getNumOperands() != 2)
3247 if (const SCEVConstant *Op0 =
3248 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3249 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3250 const SCEV *Remainder =
3251 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3253 Ops.push_back(SE.getMulExpr(C, Remainder));
3260 /// \brief Helper function for LSRInstance::GenerateReassociations.
3261 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3262 const Formula &Base,
3263 unsigned Depth, size_t Idx,
3265 const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3266 SmallVector<const SCEV *, 8> AddOps;
3267 const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3269 AddOps.push_back(Remainder);
3271 if (AddOps.size() == 1)
3274 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3278 // Loop-variant "unknown" values are uninteresting; we won't be able to
3279 // do anything meaningful with them.
3280 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3283 // Don't pull a constant into a register if the constant could be folded
3284 // into an immediate field.
3285 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3286 LU.AccessTy, *J, Base.getNumRegs() > 1))
3289 // Collect all operands except *J.
3290 SmallVector<const SCEV *, 8> InnerAddOps(
3291 ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3292 InnerAddOps.append(std::next(J),
3293 ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3295 // Don't leave just a constant behind in a register if the constant could
3296 // be folded into an immediate field.
3297 if (InnerAddOps.size() == 1 &&
3298 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3299 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3302 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3303 if (InnerSum->isZero())
3307 // Add the remaining pieces of the add back into the new formula.
3308 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3309 if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3310 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3311 InnerSumSC->getValue()->getZExtValue())) {
3313 (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3315 F.ScaledReg = nullptr;
3317 F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3318 } else if (IsScaledReg)
3319 F.ScaledReg = InnerSum;
3321 F.BaseRegs[Idx] = InnerSum;
3323 // Add J as its own register, or an unfolded immediate.
3324 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3325 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3326 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3327 SC->getValue()->getZExtValue()))
3329 (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3331 F.BaseRegs.push_back(*J);
3332 // We may have changed the number of register in base regs, adjust the
3333 // formula accordingly.
3336 if (InsertFormula(LU, LUIdx, F))
3337 // If that formula hadn't been seen before, recurse to find more like
3339 GenerateReassociations(LU, LUIdx, LU.Formulae.back(), Depth + 1);
3343 /// GenerateReassociations - Split out subexpressions from adds and the bases of
3345 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3346 Formula Base, unsigned Depth) {
3347 assert(Base.isCanonical() && "Input must be in the canonical form");
3348 // Arbitrarily cap recursion to protect compile time.
3352 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3353 GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3355 if (Base.Scale == 1)
3356 GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3357 /* Idx */ -1, /* IsScaledReg */ true);
3360 /// GenerateCombinations - Generate a formula consisting of all of the
3361 /// loop-dominating registers added into a single register.
3362 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3364 // This method is only interesting on a plurality of registers.
3365 if (Base.BaseRegs.size() + (Base.Scale == 1) <= 1)
3368 // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3369 // processing the formula.
3373 SmallVector<const SCEV *, 4> Ops;
3374 for (const SCEV *BaseReg : Base.BaseRegs) {
3375 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3376 !SE.hasComputableLoopEvolution(BaseReg, L))
3377 Ops.push_back(BaseReg);
3379 F.BaseRegs.push_back(BaseReg);
3381 if (Ops.size() > 1) {
3382 const SCEV *Sum = SE.getAddExpr(Ops);
3383 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3384 // opportunity to fold something. For now, just ignore such cases
3385 // rather than proceed with zero in a register.
3386 if (!Sum->isZero()) {
3387 F.BaseRegs.push_back(Sum);
3389 (void)InsertFormula(LU, LUIdx, F);
3394 /// \brief Helper function for LSRInstance::GenerateSymbolicOffsets.
3395 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3396 const Formula &Base, size_t Idx,
3398 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3399 GlobalValue *GV = ExtractSymbol(G, SE);
3400 if (G->isZero() || !GV)
3404 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3409 F.BaseRegs[Idx] = G;
3410 (void)InsertFormula(LU, LUIdx, F);
3413 /// GenerateSymbolicOffsets - Generate reuse formulae using symbolic offsets.
3414 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3416 // We can't add a symbolic offset if the address already contains one.
3417 if (Base.BaseGV) return;
3419 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3420 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3421 if (Base.Scale == 1)
3422 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3423 /* IsScaledReg */ true);
3426 /// \brief Helper function for LSRInstance::GenerateConstantOffsets.
3427 void LSRInstance::GenerateConstantOffsetsImpl(
3428 LSRUse &LU, unsigned LUIdx, const Formula &Base,
3429 const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3430 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3431 for (int64_t Offset : Worklist) {
3433 F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
3434 if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
3436 // Add the offset to the base register.
3437 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
3438 // If it cancelled out, drop the base register, otherwise update it.
3439 if (NewG->isZero()) {
3442 F.ScaledReg = nullptr;
3444 F.deleteBaseReg(F.BaseRegs[Idx]);
3446 } else if (IsScaledReg)
3449 F.BaseRegs[Idx] = NewG;
3451 (void)InsertFormula(LU, LUIdx, F);
3455 int64_t Imm = ExtractImmediate(G, SE);
3456 if (G->isZero() || Imm == 0)
3459 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3460 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3465 F.BaseRegs[Idx] = G;
3466 (void)InsertFormula(LU, LUIdx, F);
3469 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3470 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3472 // TODO: For now, just add the min and max offset, because it usually isn't
3473 // worthwhile looking at everything inbetween.
3474 SmallVector<int64_t, 2> Worklist;
3475 Worklist.push_back(LU.MinOffset);
3476 if (LU.MaxOffset != LU.MinOffset)
3477 Worklist.push_back(LU.MaxOffset);
3479 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3480 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3481 if (Base.Scale == 1)
3482 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3483 /* IsScaledReg */ true);
3486 /// GenerateICmpZeroScales - For ICmpZero, check to see if we can scale up
3487 /// the comparison. For example, x == y -> x*c == y*c.
3488 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3490 if (LU.Kind != LSRUse::ICmpZero) return;
3492 // Determine the integer type for the base formula.
3493 Type *IntTy = Base.getType();
3495 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3497 // Don't do this if there is more than one offset.
3498 if (LU.MinOffset != LU.MaxOffset) return;
3500 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3502 // Check each interesting stride.
3503 for (int64_t Factor : Factors) {
3504 // Check that the multiplication doesn't overflow.
3505 if (Base.BaseOffset == INT64_MIN && Factor == -1)
3507 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3508 if (NewBaseOffset / Factor != Base.BaseOffset)
3510 // If the offset will be truncated at this use, check that it is in bounds.
3511 if (!IntTy->isPointerTy() &&
3512 !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3515 // Check that multiplying with the use offset doesn't overflow.
3516 int64_t Offset = LU.MinOffset;
3517 if (Offset == INT64_MIN && Factor == -1)
3519 Offset = (uint64_t)Offset * Factor;
3520 if (Offset / Factor != LU.MinOffset)
3522 // If the offset will be truncated at this use, check that it is in bounds.
3523 if (!IntTy->isPointerTy() &&
3524 !ConstantInt::isValueValidForType(IntTy, Offset))
3528 F.BaseOffset = NewBaseOffset;
3530 // Check that this scale is legal.
3531 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3534 // Compensate for the use having MinOffset built into it.
3535 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3537 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3539 // Check that multiplying with each base register doesn't overflow.
3540 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3541 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3542 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3546 // Check that multiplying with the scaled register doesn't overflow.
3548 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3549 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3553 // Check that multiplying with the unfolded offset doesn't overflow.
3554 if (F.UnfoldedOffset != 0) {
3555 if (F.UnfoldedOffset == INT64_MIN && Factor == -1)
3557 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3558 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3560 // If the offset will be truncated, check that it is in bounds.
3561 if (!IntTy->isPointerTy() &&
3562 !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3566 // If we make it here and it's legal, add it.
3567 (void)InsertFormula(LU, LUIdx, F);
3572 /// GenerateScales - Generate stride factor reuse formulae by making use of
3573 /// scaled-offset address modes, for example.
3574 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3575 // Determine the integer type for the base formula.
3576 Type *IntTy = Base.getType();
3579 // If this Formula already has a scaled register, we can't add another one.
3580 // Try to unscale the formula to generate a better scale.
3581 if (Base.Scale != 0 && !Base.unscale())
3584 assert(Base.Scale == 0 && "unscale did not did its job!");
3586 // Check each interesting stride.
3587 for (int64_t Factor : Factors) {
3588 Base.Scale = Factor;
3589 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3590 // Check whether this scale is going to be legal.
3591 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3593 // As a special-case, handle special out-of-loop Basic users specially.
3594 // TODO: Reconsider this special case.
3595 if (LU.Kind == LSRUse::Basic &&
3596 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3597 LU.AccessTy, Base) &&
3598 LU.AllFixupsOutsideLoop)
3599 LU.Kind = LSRUse::Special;
3603 // For an ICmpZero, negating a solitary base register won't lead to
3605 if (LU.Kind == LSRUse::ICmpZero &&
3606 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3608 // For each addrec base reg, apply the scale, if possible.
3609 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3610 if (const SCEVAddRecExpr *AR =
3611 dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i])) {
3612 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3613 if (FactorS->isZero())
3615 // Divide out the factor, ignoring high bits, since we'll be
3616 // scaling the value back up in the end.
3617 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3618 // TODO: This could be optimized to avoid all the copying.
3620 F.ScaledReg = Quotient;
3621 F.deleteBaseReg(F.BaseRegs[i]);
3622 // The canonical representation of 1*reg is reg, which is already in
3623 // Base. In that case, do not try to insert the formula, it will be
3625 if (F.Scale == 1 && F.BaseRegs.empty())
3627 (void)InsertFormula(LU, LUIdx, F);
3633 /// GenerateTruncates - Generate reuse formulae from different IV types.
3634 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
3635 // Don't bother truncating symbolic values.
3636 if (Base.BaseGV) return;
3638 // Determine the integer type for the base formula.
3639 Type *DstTy = Base.getType();
3641 DstTy = SE.getEffectiveSCEVType(DstTy);
3643 for (Type *SrcTy : Types) {
3644 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
3647 if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
3648 for (const SCEV *&BaseReg : F.BaseRegs)
3649 BaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
3651 // TODO: This assumes we've done basic processing on all uses and
3652 // have an idea what the register usage is.
3653 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3656 (void)InsertFormula(LU, LUIdx, F);
3663 /// WorkItem - Helper class for GenerateCrossUseConstantOffsets. It's used to
3664 /// defer modifications so that the search phase doesn't have to worry about
3665 /// the data structures moving underneath it.
3669 const SCEV *OrigReg;
3671 WorkItem(size_t LI, int64_t I, const SCEV *R)
3672 : LUIdx(LI), Imm(I), OrigReg(R) {}
3674 void print(raw_ostream &OS) const;
3680 void WorkItem::print(raw_ostream &OS) const {
3681 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
3682 << " , add offset " << Imm;
3685 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
3686 void WorkItem::dump() const {
3687 print(errs()); errs() << '\n';
3691 /// GenerateCrossUseConstantOffsets - Look for registers which are a constant
3692 /// distance apart and try to form reuse opportunities between them.
3693 void LSRInstance::GenerateCrossUseConstantOffsets() {
3694 // Group the registers by their value without any added constant offset.
3695 typedef std::map<int64_t, const SCEV *> ImmMapTy;
3696 DenseMap<const SCEV *, ImmMapTy> Map;
3697 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
3698 SmallVector<const SCEV *, 8> Sequence;
3699 for (const SCEV *Use : RegUses) {
3700 const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
3701 int64_t Imm = ExtractImmediate(Reg, SE);
3702 auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
3704 Sequence.push_back(Reg);
3705 Pair.first->second.insert(std::make_pair(Imm, Use));
3706 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
3709 // Now examine each set of registers with the same base value. Build up
3710 // a list of work to do and do the work in a separate step so that we're
3711 // not adding formulae and register counts while we're searching.
3712 SmallVector<WorkItem, 32> WorkItems;
3713 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
3714 for (const SCEV *Reg : Sequence) {
3715 const ImmMapTy &Imms = Map.find(Reg)->second;
3717 // It's not worthwhile looking for reuse if there's only one offset.
3718 if (Imms.size() == 1)
3721 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3722 for (const auto &Entry : Imms)
3723 dbgs() << ' ' << Entry.first;
3726 // Examine each offset.
3727 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3729 const SCEV *OrigReg = J->second;
3731 int64_t JImm = J->first;
3732 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3734 if (!isa<SCEVConstant>(OrigReg) &&
3735 UsedByIndicesMap[Reg].count() == 1) {
3736 DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg << '\n');
3740 // Conservatively examine offsets between this orig reg a few selected
3742 ImmMapTy::const_iterator OtherImms[] = {
3743 Imms.begin(), std::prev(Imms.end()),
3744 Imms.lower_bound((Imms.begin()->first + std::prev(Imms.end())->first) /
3747 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
3748 ImmMapTy::const_iterator M = OtherImms[i];
3749 if (M == J || M == JE) continue;
3751 // Compute the difference between the two.
3752 int64_t Imm = (uint64_t)JImm - M->first;
3753 for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
3754 LUIdx = UsedByIndices.find_next(LUIdx))
3755 // Make a memo of this use, offset, and register tuple.
3756 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)).second)
3757 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
3764 UsedByIndicesMap.clear();
3765 UniqueItems.clear();
3767 // Now iterate through the worklist and add new formulae.
3768 for (const WorkItem &WI : WorkItems) {
3769 size_t LUIdx = WI.LUIdx;
3770 LSRUse &LU = Uses[LUIdx];
3771 int64_t Imm = WI.Imm;
3772 const SCEV *OrigReg = WI.OrigReg;
3774 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
3775 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
3776 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
3778 // TODO: Use a more targeted data structure.
3779 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
3780 Formula F = LU.Formulae[L];
3781 // FIXME: The code for the scaled and unscaled registers looks
3782 // very similar but slightly different. Investigate if they
3783 // could be merged. That way, we would not have to unscale the
3786 // Use the immediate in the scaled register.
3787 if (F.ScaledReg == OrigReg) {
3788 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
3789 // Don't create 50 + reg(-50).
3790 if (F.referencesReg(SE.getSCEV(
3791 ConstantInt::get(IntTy, -(uint64_t)Offset))))
3794 NewF.BaseOffset = Offset;
3795 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3798 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
3800 // If the new scale is a constant in a register, and adding the constant
3801 // value to the immediate would produce a value closer to zero than the
3802 // immediate itself, then the formula isn't worthwhile.
3803 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
3804 if (C->getValue()->isNegative() !=
3805 (NewF.BaseOffset < 0) &&
3806 (C->getValue()->getValue().abs() * APInt(BitWidth, F.Scale))
3807 .ule(std::abs(NewF.BaseOffset)))
3811 NewF.canonicalize();
3812 (void)InsertFormula(LU, LUIdx, NewF);
3814 // Use the immediate in a base register.
3815 for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
3816 const SCEV *BaseReg = F.BaseRegs[N];
3817 if (BaseReg != OrigReg)
3820 NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
3821 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
3822 LU.Kind, LU.AccessTy, NewF)) {
3823 if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
3826 NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
3828 NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
3830 // If the new formula has a constant in a register, and adding the
3831 // constant value to the immediate would produce a value closer to
3832 // zero than the immediate itself, then the formula isn't worthwhile.
3833 for (const SCEV *NewReg : NewF.BaseRegs)
3834 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewReg))
3835 if ((C->getValue()->getValue() + NewF.BaseOffset).abs().slt(
3836 std::abs(NewF.BaseOffset)) &&
3837 (C->getValue()->getValue() +
3838 NewF.BaseOffset).countTrailingZeros() >=
3839 countTrailingZeros<uint64_t>(NewF.BaseOffset))
3843 NewF.canonicalize();
3844 (void)InsertFormula(LU, LUIdx, NewF);
3853 /// GenerateAllReuseFormulae - Generate formulae for each use.
3855 LSRInstance::GenerateAllReuseFormulae() {
3856 // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
3857 // queries are more precise.
3858 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3859 LSRUse &LU = Uses[LUIdx];
3860 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3861 GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
3862 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3863 GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
3865 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3866 LSRUse &LU = Uses[LUIdx];
3867 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3868 GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
3869 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3870 GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
3871 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3872 GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
3873 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3874 GenerateScales(LU, LUIdx, LU.Formulae[i]);
3876 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3877 LSRUse &LU = Uses[LUIdx];
3878 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3879 GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
3882 GenerateCrossUseConstantOffsets();
3884 DEBUG(dbgs() << "\n"
3885 "After generating reuse formulae:\n";
3886 print_uses(dbgs()));
3889 /// If there are multiple formulae with the same set of registers used
3890 /// by other uses, pick the best one and delete the others.
3891 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
3892 DenseSet<const SCEV *> VisitedRegs;
3893 SmallPtrSet<const SCEV *, 16> Regs;
3894 SmallPtrSet<const SCEV *, 16> LoserRegs;
3896 bool ChangedFormulae = false;
3899 // Collect the best formula for each unique set of shared registers. This
3900 // is reset for each use.
3901 typedef DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>
3903 BestFormulaeTy BestFormulae;
3905 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3906 LSRUse &LU = Uses[LUIdx];
3907 DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs()); dbgs() << '\n');
3910 for (size_t FIdx = 0, NumForms = LU.Formulae.size();
3911 FIdx != NumForms; ++FIdx) {
3912 Formula &F = LU.Formulae[FIdx];
3914 // Some formulas are instant losers. For example, they may depend on
3915 // nonexistent AddRecs from other loops. These need to be filtered
3916 // immediately, otherwise heuristics could choose them over others leading
3917 // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
3918 // avoids the need to recompute this information across formulae using the
3919 // same bad AddRec. Passing LoserRegs is also essential unless we remove
3920 // the corresponding bad register from the Regs set.
3923 CostF.RateFormula(TTI, F, Regs, VisitedRegs, L, LU.Offsets, SE, DT, LU,
3925 if (CostF.isLoser()) {
3926 // During initial formula generation, undesirable formulae are generated
3927 // by uses within other loops that have some non-trivial address mode or
3928 // use the postinc form of the IV. LSR needs to provide these formulae
3929 // as the basis of rediscovering the desired formula that uses an AddRec
3930 // corresponding to the existing phi. Once all formulae have been
3931 // generated, these initial losers may be pruned.
3932 DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
3936 SmallVector<const SCEV *, 4> Key;
3937 for (const SCEV *Reg : F.BaseRegs) {
3938 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3942 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
3943 Key.push_back(F.ScaledReg);
3944 // Unstable sort by host order ok, because this is only used for
3946 std::sort(Key.begin(), Key.end());
3948 std::pair<BestFormulaeTy::const_iterator, bool> P =
3949 BestFormulae.insert(std::make_pair(Key, FIdx));
3953 Formula &Best = LU.Formulae[P.first->second];
3957 CostBest.RateFormula(TTI, Best, Regs, VisitedRegs, L, LU.Offsets, SE,
3959 if (CostF < CostBest)
3961 DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
3963 " in favor of formula "; Best.print(dbgs());
3967 ChangedFormulae = true;
3969 LU.DeleteFormula(F);
3975 // Now that we've filtered out some formulae, recompute the Regs set.
3977 LU.RecomputeRegs(LUIdx, RegUses);
3979 // Reset this to prepare for the next use.
3980 BestFormulae.clear();
3983 DEBUG(if (ChangedFormulae) {
3985 "After filtering out undesirable candidates:\n";
3990 // This is a rough guess that seems to work fairly well.
3991 static const size_t ComplexityLimit = UINT16_MAX;
3993 /// EstimateSearchSpaceComplexity - Estimate the worst-case number of
3994 /// solutions the solver might have to consider. It almost never considers
3995 /// this many solutions because it prune the search space, but the pruning
3996 /// isn't always sufficient.
3997 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
3999 for (const LSRUse &LU : Uses) {
4000 size_t FSize = LU.Formulae.size();
4001 if (FSize >= ComplexityLimit) {
4002 Power = ComplexityLimit;
4006 if (Power >= ComplexityLimit)
4012 /// NarrowSearchSpaceByDetectingSupersets - When one formula uses a superset
4013 /// of the registers of another formula, it won't help reduce register
4014 /// pressure (though it may not necessarily hurt register pressure); remove
4015 /// it to simplify the system.
4016 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
4017 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4018 DEBUG(dbgs() << "The search space is too complex.\n");
4020 DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
4021 "which use a superset of registers used by other "
4024 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4025 LSRUse &LU = Uses[LUIdx];
4027 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4028 Formula &F = LU.Formulae[i];
4029 // Look for a formula with a constant or GV in a register. If the use
4030 // also has a formula with that same value in an immediate field,
4031 // delete the one that uses a register.
4032 for (SmallVectorImpl<const SCEV *>::const_iterator
4033 I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
4034 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
4036 NewF.BaseOffset += C->getValue()->getSExtValue();
4037 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4038 (I - F.BaseRegs.begin()));
4039 if (LU.HasFormulaWithSameRegs(NewF)) {
4040 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4041 LU.DeleteFormula(F);
4047 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
4048 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
4052 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4053 (I - F.BaseRegs.begin()));
4054 if (LU.HasFormulaWithSameRegs(NewF)) {
4055 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4057 LU.DeleteFormula(F);
4068 LU.RecomputeRegs(LUIdx, RegUses);
4071 DEBUG(dbgs() << "After pre-selection:\n";
4072 print_uses(dbgs()));
4076 /// NarrowSearchSpaceByCollapsingUnrolledCode - When there are many registers
4077 /// for expressions like A, A+1, A+2, etc., allocate a single register for
4079 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
4080 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4083 DEBUG(dbgs() << "The search space is too complex.\n"
4084 "Narrowing the search space by assuming that uses separated "
4085 "by a constant offset will use the same registers.\n");
4087 // This is especially useful for unrolled loops.
4089 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4090 LSRUse &LU = Uses[LUIdx];
4091 for (const Formula &F : LU.Formulae) {
4092 if (F.BaseOffset == 0 || (F.Scale != 0 && F.Scale != 1))
4095 LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
4099 if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
4100 LU.Kind, LU.AccessTy))
4103 DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
4105 LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
4107 // Update the relocs to reference the new use.
4108 for (LSRFixup &Fixup : Fixups) {
4109 if (Fixup.LUIdx == LUIdx) {
4110 Fixup.LUIdx = LUThatHas - &Uses.front();
4111 Fixup.Offset += F.BaseOffset;
4112 // Add the new offset to LUThatHas' offset list.
4113 if (LUThatHas->Offsets.back() != Fixup.Offset) {
4114 LUThatHas->Offsets.push_back(Fixup.Offset);
4115 if (Fixup.Offset > LUThatHas->MaxOffset)
4116 LUThatHas->MaxOffset = Fixup.Offset;
4117 if (Fixup.Offset < LUThatHas->MinOffset)
4118 LUThatHas->MinOffset = Fixup.Offset;
4120 DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
4122 if (Fixup.LUIdx == NumUses-1)
4123 Fixup.LUIdx = LUIdx;
4126 // Delete formulae from the new use which are no longer legal.
4128 for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
4129 Formula &F = LUThatHas->Formulae[i];
4130 if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
4131 LUThatHas->Kind, LUThatHas->AccessTy, F)) {
4132 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4134 LUThatHas->DeleteFormula(F);
4142 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4144 // Delete the old use.
4145 DeleteUse(LU, LUIdx);
4152 DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4155 /// NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters - Call
4156 /// FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4157 /// we've done more filtering, as it may be able to find more formulae to
4159 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4160 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4161 DEBUG(dbgs() << "The search space is too complex.\n");
4163 DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4164 "undesirable dedicated registers.\n");
4166 FilterOutUndesirableDedicatedRegisters();
4168 DEBUG(dbgs() << "After pre-selection:\n";
4169 print_uses(dbgs()));
4173 /// NarrowSearchSpaceByPickingWinnerRegs - Pick a register which seems likely
4174 /// to be profitable, and then in any use which has any reference to that
4175 /// register, delete all formulae which do not reference that register.
4176 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4177 // With all other options exhausted, loop until the system is simple
4178 // enough to handle.
4179 SmallPtrSet<const SCEV *, 4> Taken;
4180 while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4181 // Ok, we have too many of formulae on our hands to conveniently handle.
4182 // Use a rough heuristic to thin out the list.
4183 DEBUG(dbgs() << "The search space is too complex.\n");
4185 // Pick the register which is used by the most LSRUses, which is likely
4186 // to be a good reuse register candidate.
4187 const SCEV *Best = nullptr;
4188 unsigned BestNum = 0;
4189 for (const SCEV *Reg : RegUses) {
4190 if (Taken.count(Reg))
4195 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4196 if (Count > BestNum) {
4203 DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4204 << " will yield profitable reuse.\n");
4207 // In any use with formulae which references this register, delete formulae
4208 // which don't reference it.
4209 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4210 LSRUse &LU = Uses[LUIdx];
4211 if (!LU.Regs.count(Best)) continue;
4214 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4215 Formula &F = LU.Formulae[i];
4216 if (!F.referencesReg(Best)) {
4217 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4218 LU.DeleteFormula(F);
4222 assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4228 LU.RecomputeRegs(LUIdx, RegUses);
4231 DEBUG(dbgs() << "After pre-selection:\n";
4232 print_uses(dbgs()));
4236 /// NarrowSearchSpaceUsingHeuristics - If there are an extraordinary number of
4237 /// formulae to choose from, use some rough heuristics to prune down the number
4238 /// of formulae. This keeps the main solver from taking an extraordinary amount
4239 /// of time in some worst-case scenarios.
4240 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4241 NarrowSearchSpaceByDetectingSupersets();
4242 NarrowSearchSpaceByCollapsingUnrolledCode();
4243 NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4244 NarrowSearchSpaceByPickingWinnerRegs();
4247 /// SolveRecurse - This is the recursive solver.
4248 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4250 SmallVectorImpl<const Formula *> &Workspace,
4251 const Cost &CurCost,
4252 const SmallPtrSet<const SCEV *, 16> &CurRegs,
4253 DenseSet<const SCEV *> &VisitedRegs) const {
4256 // - use more aggressive filtering
4257 // - sort the formula so that the most profitable solutions are found first
4258 // - sort the uses too
4260 // - don't compute a cost, and then compare. compare while computing a cost
4262 // - track register sets with SmallBitVector
4264 const LSRUse &LU = Uses[Workspace.size()];
4266 // If this use references any register that's already a part of the
4267 // in-progress solution, consider it a requirement that a formula must
4268 // reference that register in order to be considered. This prunes out
4269 // unprofitable searching.
4270 SmallSetVector<const SCEV *, 4> ReqRegs;
4271 for (const SCEV *S : CurRegs)
4272 if (LU.Regs.count(S))
4275 SmallPtrSet<const SCEV *, 16> NewRegs;
4277 for (const Formula &F : LU.Formulae) {
4278 // Ignore formulae which may not be ideal in terms of register reuse of
4279 // ReqRegs. The formula should use all required registers before
4280 // introducing new ones.
4281 int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
4282 for (const SCEV *Reg : ReqRegs) {
4283 if ((F.ScaledReg && F.ScaledReg == Reg) ||
4284 std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) !=
4287 if (NumReqRegsToFind == 0)
4291 if (NumReqRegsToFind != 0) {
4292 // If none of the formulae satisfied the required registers, then we could
4293 // clear ReqRegs and try again. Currently, we simply give up in this case.
4297 // Evaluate the cost of the current formula. If it's already worse than
4298 // the current best, prune the search at that point.
4301 NewCost.RateFormula(TTI, F, NewRegs, VisitedRegs, L, LU.Offsets, SE, DT,
4303 if (NewCost < SolutionCost) {
4304 Workspace.push_back(&F);
4305 if (Workspace.size() != Uses.size()) {
4306 SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4307 NewRegs, VisitedRegs);
4308 if (F.getNumRegs() == 1 && Workspace.size() == 1)
4309 VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4311 DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4312 dbgs() << ".\n Regs:";
4313 for (const SCEV *S : NewRegs)
4314 dbgs() << ' ' << *S;
4317 SolutionCost = NewCost;
4318 Solution = Workspace;
4320 Workspace.pop_back();
4325 /// Solve - Choose one formula from each use. Return the results in the given
4326 /// Solution vector.
4327 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4328 SmallVector<const Formula *, 8> Workspace;
4330 SolutionCost.Lose();
4332 SmallPtrSet<const SCEV *, 16> CurRegs;
4333 DenseSet<const SCEV *> VisitedRegs;
4334 Workspace.reserve(Uses.size());
4336 // SolveRecurse does all the work.
4337 SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4338 CurRegs, VisitedRegs);
4339 if (Solution.empty()) {
4340 DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4344 // Ok, we've now made all our decisions.
4345 DEBUG(dbgs() << "\n"
4346 "The chosen solution requires "; SolutionCost.print(dbgs());
4348 for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4350 Uses[i].print(dbgs());
4353 Solution[i]->print(dbgs());
4357 assert(Solution.size() == Uses.size() && "Malformed solution!");
4360 /// HoistInsertPosition - Helper for AdjustInsertPositionForExpand. Climb up
4361 /// the dominator tree far as we can go while still being dominated by the
4362 /// input positions. This helps canonicalize the insert position, which
4363 /// encourages sharing.
4364 BasicBlock::iterator
4365 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
4366 const SmallVectorImpl<Instruction *> &Inputs)
4369 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
4370 unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
4373 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
4374 if (!Rung) return IP;
4375 Rung = Rung->getIDom();
4376 if (!Rung) return IP;
4377 IDom = Rung->getBlock();
4379 // Don't climb into a loop though.
4380 const Loop *IDomLoop = LI.getLoopFor(IDom);
4381 unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
4382 if (IDomDepth <= IPLoopDepth &&
4383 (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
4387 bool AllDominate = true;
4388 Instruction *BetterPos = nullptr;
4389 Instruction *Tentative = IDom->getTerminator();
4390 for (Instruction *Inst : Inputs) {
4391 if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
4392 AllDominate = false;
4395 // Attempt to find an insert position in the middle of the block,
4396 // instead of at the end, so that it can be used for other expansions.
4397 if (IDom == Inst->getParent() &&
4398 (!BetterPos || !DT.dominates(Inst, BetterPos)))
4399 BetterPos = std::next(BasicBlock::iterator(Inst));
4412 /// AdjustInsertPositionForExpand - Determine an input position which will be
4413 /// dominated by the operands and which will dominate the result.
4414 BasicBlock::iterator
4415 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
4418 SCEVExpander &Rewriter) const {
4419 // Collect some instructions which must be dominated by the
4420 // expanding replacement. These must be dominated by any operands that
4421 // will be required in the expansion.
4422 SmallVector<Instruction *, 4> Inputs;
4423 if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
4424 Inputs.push_back(I);
4425 if (LU.Kind == LSRUse::ICmpZero)
4426 if (Instruction *I =
4427 dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
4428 Inputs.push_back(I);
4429 if (LF.PostIncLoops.count(L)) {
4430 if (LF.isUseFullyOutsideLoop(L))
4431 Inputs.push_back(L->getLoopLatch()->getTerminator());
4433 Inputs.push_back(IVIncInsertPos);
4435 // The expansion must also be dominated by the increment positions of any
4436 // loops it for which it is using post-inc mode.
4437 for (const Loop *PIL : LF.PostIncLoops) {
4438 if (PIL == L) continue;
4440 // Be dominated by the loop exit.
4441 SmallVector<BasicBlock *, 4> ExitingBlocks;
4442 PIL->getExitingBlocks(ExitingBlocks);
4443 if (!ExitingBlocks.empty()) {
4444 BasicBlock *BB = ExitingBlocks[0];
4445 for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
4446 BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
4447 Inputs.push_back(BB->getTerminator());
4451 assert(!isa<PHINode>(LowestIP) && !isa<LandingPadInst>(LowestIP)
4452 && !isa<DbgInfoIntrinsic>(LowestIP) &&
4453 "Insertion point must be a normal instruction");
4455 // Then, climb up the immediate dominator tree as far as we can go while
4456 // still being dominated by the input positions.
4457 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
4459 // Don't insert instructions before PHI nodes.
4460 while (isa<PHINode>(IP)) ++IP;
4462 // Ignore landingpad instructions.
4463 while (isa<LandingPadInst>(IP)) ++IP;
4465 // Ignore debug intrinsics.
4466 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
4468 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
4469 // IP consistent across expansions and allows the previously inserted
4470 // instructions to be reused by subsequent expansion.
4471 while (Rewriter.isInsertedInstruction(IP) && IP != LowestIP) ++IP;
4476 /// Expand - Emit instructions for the leading candidate expression for this
4477 /// LSRUse (this is called "expanding").
4478 Value *LSRInstance::Expand(const LSRFixup &LF,
4480 BasicBlock::iterator IP,
4481 SCEVExpander &Rewriter,
4482 SmallVectorImpl<WeakVH> &DeadInsts) const {
4483 const LSRUse &LU = Uses[LF.LUIdx];
4484 if (LU.RigidFormula)
4485 return LF.OperandValToReplace;
4487 // Determine an input position which will be dominated by the operands and
4488 // which will dominate the result.
4489 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
4491 // Inform the Rewriter if we have a post-increment use, so that it can
4492 // perform an advantageous expansion.
4493 Rewriter.setPostInc(LF.PostIncLoops);
4495 // This is the type that the user actually needs.
4496 Type *OpTy = LF.OperandValToReplace->getType();
4497 // This will be the type that we'll initially expand to.
4498 Type *Ty = F.getType();
4500 // No type known; just expand directly to the ultimate type.
4502 else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
4503 // Expand directly to the ultimate type if it's the right size.
4505 // This is the type to do integer arithmetic in.
4506 Type *IntTy = SE.getEffectiveSCEVType(Ty);
4508 // Build up a list of operands to add together to form the full base.
4509 SmallVector<const SCEV *, 8> Ops;
4511 // Expand the BaseRegs portion.
4512 for (const SCEV *Reg : F.BaseRegs) {
4513 assert(!Reg->isZero() && "Zero allocated in a base register!");
4515 // If we're expanding for a post-inc user, make the post-inc adjustment.
4516 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4517 Reg = TransformForPostIncUse(Denormalize, Reg,
4518 LF.UserInst, LF.OperandValToReplace,
4521 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr, IP)));
4524 // Expand the ScaledReg portion.
4525 Value *ICmpScaledV = nullptr;
4527 const SCEV *ScaledS = F.ScaledReg;
4529 // If we're expanding for a post-inc user, make the post-inc adjustment.
4530 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4531 ScaledS = TransformForPostIncUse(Denormalize, ScaledS,
4532 LF.UserInst, LF.OperandValToReplace,
4535 if (LU.Kind == LSRUse::ICmpZero) {
4536 // Expand ScaleReg as if it was part of the base regs.
4539 SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, IP)));
4541 // An interesting way of "folding" with an icmp is to use a negated
4542 // scale, which we'll implement by inserting it into the other operand
4544 assert(F.Scale == -1 &&
4545 "The only scale supported by ICmpZero uses is -1!");
4546 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr, IP);
4549 // Otherwise just expand the scaled register and an explicit scale,
4550 // which is expected to be matched as part of the address.
4552 // Flush the operand list to suppress SCEVExpander hoisting address modes.
4553 // Unless the addressing mode will not be folded.
4554 if (!Ops.empty() && LU.Kind == LSRUse::Address &&
4555 isAMCompletelyFolded(TTI, LU, F)) {
4556 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4558 Ops.push_back(SE.getUnknown(FullV));
4560 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, IP));
4563 SE.getMulExpr(ScaledS, SE.getConstant(ScaledS->getType(), F.Scale));
4564 Ops.push_back(ScaledS);
4568 // Expand the GV portion.
4570 // Flush the operand list to suppress SCEVExpander hoisting.
4572 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4574 Ops.push_back(SE.getUnknown(FullV));
4576 Ops.push_back(SE.getUnknown(F.BaseGV));
4579 // Flush the operand list to suppress SCEVExpander hoisting of both folded and
4580 // unfolded offsets. LSR assumes they both live next to their uses.
4582 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4584 Ops.push_back(SE.getUnknown(FullV));
4587 // Expand the immediate portion.
4588 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
4590 if (LU.Kind == LSRUse::ICmpZero) {
4591 // The other interesting way of "folding" with an ICmpZero is to use a
4592 // negated immediate.
4594 ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
4596 Ops.push_back(SE.getUnknown(ICmpScaledV));
4597 ICmpScaledV = ConstantInt::get(IntTy, Offset);
4600 // Just add the immediate values. These again are expected to be matched
4601 // as part of the address.
4602 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
4606 // Expand the unfolded offset portion.
4607 int64_t UnfoldedOffset = F.UnfoldedOffset;
4608 if (UnfoldedOffset != 0) {
4609 // Just add the immediate values.
4610 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy,
4614 // Emit instructions summing all the operands.
4615 const SCEV *FullS = Ops.empty() ?
4616 SE.getConstant(IntTy, 0) :
4618 Value *FullV = Rewriter.expandCodeFor(FullS, Ty, IP);
4620 // We're done expanding now, so reset the rewriter.
4621 Rewriter.clearPostInc();
4623 // An ICmpZero Formula represents an ICmp which we're handling as a
4624 // comparison against zero. Now that we've expanded an expression for that
4625 // form, update the ICmp's other operand.
4626 if (LU.Kind == LSRUse::ICmpZero) {
4627 ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
4628 DeadInsts.emplace_back(CI->getOperand(1));
4629 assert(!F.BaseGV && "ICmp does not support folding a global value and "
4630 "a scale at the same time!");
4631 if (F.Scale == -1) {
4632 if (ICmpScaledV->getType() != OpTy) {
4634 CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
4636 ICmpScaledV, OpTy, "tmp", CI);
4639 CI->setOperand(1, ICmpScaledV);
4641 // A scale of 1 means that the scale has been expanded as part of the
4643 assert((F.Scale == 0 || F.Scale == 1) &&
4644 "ICmp does not support folding a global value and "
4645 "a scale at the same time!");
4646 Constant *C = ConstantInt::getSigned(SE.getEffectiveSCEVType(OpTy),
4648 if (C->getType() != OpTy)
4649 C = ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
4653 CI->setOperand(1, C);
4660 /// RewriteForPHI - Helper for Rewrite. PHI nodes are special because the use
4661 /// of their operands effectively happens in their predecessor blocks, so the
4662 /// expression may need to be expanded in multiple places.
4663 void LSRInstance::RewriteForPHI(PHINode *PN,
4666 SCEVExpander &Rewriter,
4667 SmallVectorImpl<WeakVH> &DeadInsts,
4669 DenseMap<BasicBlock *, Value *> Inserted;
4670 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
4671 if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
4672 BasicBlock *BB = PN->getIncomingBlock(i);
4674 // If this is a critical edge, split the edge so that we do not insert
4675 // the code on all predecessor/successor paths. We do this unless this
4676 // is the canonical backedge for this loop, which complicates post-inc
4678 if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
4679 !isa<IndirectBrInst>(BB->getTerminator())) {
4680 BasicBlock *Parent = PN->getParent();
4681 Loop *PNLoop = LI.getLoopFor(Parent);
4682 if (!PNLoop || Parent != PNLoop->getHeader()) {
4683 // Split the critical edge.
4684 BasicBlock *NewBB = nullptr;
4685 if (!Parent->isLandingPad()) {
4686 NewBB = SplitCriticalEdge(BB, Parent,
4687 CriticalEdgeSplittingOptions(&DT, &LI)
4688 .setMergeIdenticalEdges()
4689 .setDontDeleteUselessPHIs());
4691 SmallVector<BasicBlock*, 2> NewBBs;
4692 SplitLandingPadPredecessors(Parent, BB, "", "", NewBBs, &DT, &LI);
4695 // If NewBB==NULL, then SplitCriticalEdge refused to split because all
4696 // phi predecessors are identical. The simple thing to do is skip
4697 // splitting in this case rather than complicate the API.
4699 // If PN is outside of the loop and BB is in the loop, we want to
4700 // move the block to be immediately before the PHI block, not
4701 // immediately after BB.
4702 if (L->contains(BB) && !L->contains(PN))
4703 NewBB->moveBefore(PN->getParent());
4705 // Splitting the edge can reduce the number of PHI entries we have.
4706 e = PN->getNumIncomingValues();
4708 i = PN->getBasicBlockIndex(BB);
4713 std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
4714 Inserted.insert(std::make_pair(BB, static_cast<Value *>(nullptr)));
4716 PN->setIncomingValue(i, Pair.first->second);
4718 Value *FullV = Expand(LF, F, BB->getTerminator(), Rewriter, DeadInsts);
4720 // If this is reuse-by-noop-cast, insert the noop cast.
4721 Type *OpTy = LF.OperandValToReplace->getType();
4722 if (FullV->getType() != OpTy)
4724 CastInst::Create(CastInst::getCastOpcode(FullV, false,
4726 FullV, LF.OperandValToReplace->getType(),
4727 "tmp", BB->getTerminator());
4729 PN->setIncomingValue(i, FullV);
4730 Pair.first->second = FullV;
4735 /// Rewrite - Emit instructions for the leading candidate expression for this
4736 /// LSRUse (this is called "expanding"), and update the UserInst to reference
4737 /// the newly expanded value.
4738 void LSRInstance::Rewrite(const LSRFixup &LF,
4740 SCEVExpander &Rewriter,
4741 SmallVectorImpl<WeakVH> &DeadInsts,
4743 // First, find an insertion point that dominates UserInst. For PHI nodes,
4744 // find the nearest block which dominates all the relevant uses.
4745 if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
4746 RewriteForPHI(PN, LF, F, Rewriter, DeadInsts, P);
4748 Value *FullV = Expand(LF, F, LF.UserInst, Rewriter, DeadInsts);
4750 // If this is reuse-by-noop-cast, insert the noop cast.
4751 Type *OpTy = LF.OperandValToReplace->getType();
4752 if (FullV->getType() != OpTy) {
4754 CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
4755 FullV, OpTy, "tmp", LF.UserInst);
4759 // Update the user. ICmpZero is handled specially here (for now) because
4760 // Expand may have updated one of the operands of the icmp already, and
4761 // its new value may happen to be equal to LF.OperandValToReplace, in
4762 // which case doing replaceUsesOfWith leads to replacing both operands
4763 // with the same value. TODO: Reorganize this.
4764 if (Uses[LF.LUIdx].Kind == LSRUse::ICmpZero)
4765 LF.UserInst->setOperand(0, FullV);
4767 LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
4770 DeadInsts.emplace_back(LF.OperandValToReplace);
4773 /// ImplementSolution - Rewrite all the fixup locations with new values,
4774 /// following the chosen solution.
4776 LSRInstance::ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
4778 // Keep track of instructions we may have made dead, so that
4779 // we can remove them after we are done working.
4780 SmallVector<WeakVH, 16> DeadInsts;
4782 SCEVExpander Rewriter(SE, L->getHeader()->getModule()->getDataLayout(),
4785 Rewriter.setDebugType(DEBUG_TYPE);
4787 Rewriter.disableCanonicalMode();
4788 Rewriter.enableLSRMode();
4789 Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
4791 // Mark phi nodes that terminate chains so the expander tries to reuse them.
4792 for (const IVChain &Chain : IVChainVec) {
4793 if (PHINode *PN = dyn_cast<PHINode>(Chain.tailUserInst()))
4794 Rewriter.setChainedPhi(PN);
4797 // Expand the new value definitions and update the users.
4798 for (const LSRFixup &Fixup : Fixups) {
4799 Rewrite(Fixup, *Solution[Fixup.LUIdx], Rewriter, DeadInsts, P);
4804 for (const IVChain &Chain : IVChainVec) {
4805 GenerateIVChain(Chain, Rewriter, DeadInsts);
4808 // Clean up after ourselves. This must be done before deleting any
4812 Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
4815 LSRInstance::LSRInstance(Loop *L, Pass *P)
4816 : IU(P->getAnalysis<IVUsers>()), SE(P->getAnalysis<ScalarEvolution>()),
4817 DT(P->getAnalysis<DominatorTreeWrapperPass>().getDomTree()),
4818 LI(P->getAnalysis<LoopInfoWrapperPass>().getLoopInfo()),
4819 TTI(P->getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
4820 *L->getHeader()->getParent())),
4821 L(L), Changed(false), IVIncInsertPos(nullptr) {
4822 // If LoopSimplify form is not available, stay out of trouble.
4823 if (!L->isLoopSimplifyForm())
4826 // If there's no interesting work to be done, bail early.
4827 if (IU.empty()) return;
4829 // If there's too much analysis to be done, bail early. We won't be able to
4830 // model the problem anyway.
4831 unsigned NumUsers = 0;
4832 for (const IVStrideUse &U : IU) {
4833 if (++NumUsers > MaxIVUsers) {
4835 DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << U << "\n");
4841 // All dominating loops must have preheaders, or SCEVExpander may not be able
4842 // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
4844 // IVUsers analysis should only create users that are dominated by simple loop
4845 // headers. Since this loop should dominate all of its users, its user list
4846 // should be empty if this loop itself is not within a simple loop nest.
4847 for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
4848 Rung; Rung = Rung->getIDom()) {
4849 BasicBlock *BB = Rung->getBlock();
4850 const Loop *DomLoop = LI.getLoopFor(BB);
4851 if (DomLoop && DomLoop->getHeader() == BB) {
4852 assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
4857 DEBUG(dbgs() << "\nLSR on loop ";
4858 L->getHeader()->printAsOperand(dbgs(), /*PrintType=*/false);
4861 // First, perform some low-level loop optimizations.
4863 OptimizeLoopTermCond();
4865 // If loop preparation eliminates all interesting IV users, bail.
4866 if (IU.empty()) return;
4868 // Skip nested loops until we can model them better with formulae.
4870 DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
4874 // Start collecting data and preparing for the solver.
4876 CollectInterestingTypesAndFactors();
4877 CollectFixupsAndInitialFormulae();
4878 CollectLoopInvariantFixupsAndFormulae();
4880 assert(!Uses.empty() && "IVUsers reported at least one use");
4881 DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
4882 print_uses(dbgs()));
4884 // Now use the reuse data to generate a bunch of interesting ways
4885 // to formulate the values needed for the uses.
4886 GenerateAllReuseFormulae();
4888 FilterOutUndesirableDedicatedRegisters();
4889 NarrowSearchSpaceUsingHeuristics();
4891 SmallVector<const Formula *, 8> Solution;
4894 // Release memory that is no longer needed.
4899 if (Solution.empty())
4903 // Formulae should be legal.
4904 for (const LSRUse &LU : Uses) {
4905 for (const Formula &F : LU.Formulae)
4906 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4907 F) && "Illegal formula generated!");
4911 // Now that we've decided what we want, make it so.
4912 ImplementSolution(Solution, P);
4915 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
4916 if (Factors.empty() && Types.empty()) return;
4918 OS << "LSR has identified the following interesting factors and types: ";
4921 for (int64_t Factor : Factors) {
4922 if (!First) OS << ", ";
4924 OS << '*' << Factor;
4927 for (Type *Ty : Types) {
4928 if (!First) OS << ", ";
4930 OS << '(' << *Ty << ')';
4935 void LSRInstance::print_fixups(raw_ostream &OS) const {
4936 OS << "LSR is examining the following fixup sites:\n";
4937 for (const LSRFixup &LF : Fixups) {
4944 void LSRInstance::print_uses(raw_ostream &OS) const {
4945 OS << "LSR is examining the following uses:\n";
4946 for (const LSRUse &LU : Uses) {
4950 for (const Formula &F : LU.Formulae) {
4958 void LSRInstance::print(raw_ostream &OS) const {
4959 print_factors_and_types(OS);
4964 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4965 void LSRInstance::dump() const {
4966 print(errs()); errs() << '\n';
4972 class LoopStrengthReduce : public LoopPass {
4974 static char ID; // Pass ID, replacement for typeid
4975 LoopStrengthReduce();
4978 bool runOnLoop(Loop *L, LPPassManager &LPM) override;
4979 void getAnalysisUsage(AnalysisUsage &AU) const override;
4984 char LoopStrengthReduce::ID = 0;
4985 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
4986 "Loop Strength Reduction", false, false)
4987 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
4988 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
4989 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
4990 INITIALIZE_PASS_DEPENDENCY(IVUsers)
4991 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
4992 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
4993 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
4994 "Loop Strength Reduction", false, false)
4997 Pass *llvm::createLoopStrengthReducePass() {
4998 return new LoopStrengthReduce();
5001 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
5002 initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
5005 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
5006 // We split critical edges, so we change the CFG. However, we do update
5007 // many analyses if they are around.
5008 AU.addPreservedID(LoopSimplifyID);
5010 AU.addRequired<LoopInfoWrapperPass>();
5011 AU.addPreserved<LoopInfoWrapperPass>();
5012 AU.addRequiredID(LoopSimplifyID);
5013 AU.addRequired<DominatorTreeWrapperPass>();
5014 AU.addPreserved<DominatorTreeWrapperPass>();
5015 AU.addRequired<ScalarEvolution>();
5016 AU.addPreserved<ScalarEvolution>();
5017 // Requiring LoopSimplify a second time here prevents IVUsers from running
5018 // twice, since LoopSimplify was invalidated by running ScalarEvolution.
5019 AU.addRequiredID(LoopSimplifyID);
5020 AU.addRequired<IVUsers>();
5021 AU.addPreserved<IVUsers>();
5022 AU.addRequired<TargetTransformInfoWrapperPass>();
5025 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
5026 if (skipOptnoneFunction(L))
5029 bool Changed = false;
5031 // Run the main LSR transformation.
5032 Changed |= LSRInstance(L, this).getChanged();
5034 // Remove any extra phis created by processing inner loops.
5035 Changed |= DeleteDeadPHIs(L->getHeader());
5036 if (EnablePhiElim && L->isLoopSimplifyForm()) {
5037 SmallVector<WeakVH, 16> DeadInsts;
5038 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
5039 SCEVExpander Rewriter(getAnalysis<ScalarEvolution>(), DL, "lsr");
5041 Rewriter.setDebugType(DEBUG_TYPE);
5043 unsigned numFolded = Rewriter.replaceCongruentIVs(
5044 L, &getAnalysis<DominatorTreeWrapperPass>().getDomTree(), DeadInsts,
5045 &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
5046 *L->getHeader()->getParent()));
5049 DeleteTriviallyDeadInstructions(DeadInsts);
5050 DeleteDeadPHIs(L->getHeader());