1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This transformation analyzes and transforms the induction variables (and
11 // computations derived from them) into forms suitable for efficient execution
14 // This pass performs a strength reduction on array references inside loops that
15 // have as one or more of their components the loop induction variable, it
16 // rewrites expressions to take advantage of scaled-index addressing modes
17 // available on the target, and it performs a variety of other optimizations
18 // related to loop induction variables.
20 // Terminology note: this code has a lot of handling for "post-increment" or
21 // "post-inc" users. This is not talking about post-increment addressing modes;
22 // it is instead talking about code like this:
24 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
26 // %i.next = add %i, 1
27 // %c = icmp eq %i.next, %n
29 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
30 // it's useful to think about these as the same register, with some uses using
31 // the value of the register before the add and some using // it after. In this
32 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // the value of the induction variable after the increment. The other common
34 // case of post-increment users is users outside the loop.
36 // TODO: More sophistication in the way Formulae are generated and filtered.
38 // TODO: Handle multiple loops at a time.
40 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
43 // TODO: When truncation is free, truncate ICmp users' operands to make it a
44 // smaller encoding (on x86 at least).
46 // TODO: When a negated register is used by an add (such as in a list of
47 // multiple base registers, or as the increment expression in an addrec),
48 // we may not actually need both reg and (-1 * reg) in registers; the
49 // negation can be implemented by using a sub instead of an add. The
50 // lack of support for taking this into consideration when making
51 // register pressure decisions is partly worked around by the "Special"
54 //===----------------------------------------------------------------------===//
56 #define DEBUG_TYPE "loop-reduce"
57 #include "llvm/Transforms/Scalar.h"
58 #include "llvm/ADT/DenseSet.h"
59 #include "llvm/ADT/SetVector.h"
60 #include "llvm/ADT/SmallBitVector.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/Analysis/Dominators.h"
63 #include "llvm/Analysis/IVUsers.h"
64 #include "llvm/Analysis/LoopPass.h"
65 #include "llvm/Analysis/ScalarEvolutionExpander.h"
66 #include "llvm/Analysis/TargetTransformInfo.h"
67 #include "llvm/Assembly/Writer.h"
68 #include "llvm/IR/Constants.h"
69 #include "llvm/IR/DerivedTypes.h"
70 #include "llvm/IR/Instructions.h"
71 #include "llvm/IR/IntrinsicInst.h"
72 #include "llvm/Support/CommandLine.h"
73 #include "llvm/Support/Debug.h"
74 #include "llvm/Support/ValueHandle.h"
75 #include "llvm/Support/raw_ostream.h"
76 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
77 #include "llvm/Transforms/Utils/Local.h"
81 /// MaxIVUsers is an arbitrary threshold that provides an early opportunitiy for
82 /// bail out. This threshold is far beyond the number of users that LSR can
83 /// conceivably solve, so it should not affect generated code, but catches the
84 /// worst cases before LSR burns too much compile time and stack space.
85 static const unsigned MaxIVUsers = 200;
87 // Temporary flag to cleanup congruent phis after LSR phi expansion.
88 // It's currently disabled until we can determine whether it's truly useful or
89 // not. The flag should be removed after the v3.0 release.
90 // This is now needed for ivchains.
91 static cl::opt<bool> EnablePhiElim(
92 "enable-lsr-phielim", cl::Hidden, cl::init(true),
93 cl::desc("Enable LSR phi elimination"));
96 // Stress test IV chain generation.
97 static cl::opt<bool> StressIVChain(
98 "stress-ivchain", cl::Hidden, cl::init(false),
99 cl::desc("Stress test LSR IV chains"));
101 static bool StressIVChain = false;
106 /// RegSortData - This class holds data which is used to order reuse candidates.
109 /// UsedByIndices - This represents the set of LSRUse indices which reference
110 /// a particular register.
111 SmallBitVector UsedByIndices;
115 void print(raw_ostream &OS) const;
121 void RegSortData::print(raw_ostream &OS) const {
122 OS << "[NumUses=" << UsedByIndices.count() << ']';
125 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
126 void RegSortData::dump() const {
127 print(errs()); errs() << '\n';
133 /// RegUseTracker - Map register candidates to information about how they are
135 class RegUseTracker {
136 typedef DenseMap<const SCEV *, RegSortData> RegUsesTy;
138 RegUsesTy RegUsesMap;
139 SmallVector<const SCEV *, 16> RegSequence;
142 void CountRegister(const SCEV *Reg, size_t LUIdx);
143 void DropRegister(const SCEV *Reg, size_t LUIdx);
144 void SwapAndDropUse(size_t LUIdx, size_t LastLUIdx);
146 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
148 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
152 typedef SmallVectorImpl<const SCEV *>::iterator iterator;
153 typedef SmallVectorImpl<const SCEV *>::const_iterator const_iterator;
154 iterator begin() { return RegSequence.begin(); }
155 iterator end() { return RegSequence.end(); }
156 const_iterator begin() const { return RegSequence.begin(); }
157 const_iterator end() const { return RegSequence.end(); }
163 RegUseTracker::CountRegister(const SCEV *Reg, size_t LUIdx) {
164 std::pair<RegUsesTy::iterator, bool> Pair =
165 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
166 RegSortData &RSD = Pair.first->second;
168 RegSequence.push_back(Reg);
169 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
170 RSD.UsedByIndices.set(LUIdx);
174 RegUseTracker::DropRegister(const SCEV *Reg, size_t LUIdx) {
175 RegUsesTy::iterator It = RegUsesMap.find(Reg);
176 assert(It != RegUsesMap.end());
177 RegSortData &RSD = It->second;
178 assert(RSD.UsedByIndices.size() > LUIdx);
179 RSD.UsedByIndices.reset(LUIdx);
183 RegUseTracker::SwapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
184 assert(LUIdx <= LastLUIdx);
186 // Update RegUses. The data structure is not optimized for this purpose;
187 // we must iterate through it and update each of the bit vectors.
188 for (RegUsesTy::iterator I = RegUsesMap.begin(), E = RegUsesMap.end();
190 SmallBitVector &UsedByIndices = I->second.UsedByIndices;
191 if (LUIdx < UsedByIndices.size())
192 UsedByIndices[LUIdx] =
193 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : 0;
194 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
199 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
200 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
201 if (I == RegUsesMap.end())
203 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
204 int i = UsedByIndices.find_first();
205 if (i == -1) return false;
206 if ((size_t)i != LUIdx) return true;
207 return UsedByIndices.find_next(i) != -1;
210 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
211 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
212 assert(I != RegUsesMap.end() && "Unknown register!");
213 return I->second.UsedByIndices;
216 void RegUseTracker::clear() {
223 /// Formula - This class holds information that describes a formula for
224 /// computing satisfying a use. It may include broken-out immediates and scaled
227 /// Global base address used for complex addressing.
230 /// Base offset for complex addressing.
233 /// Whether any complex addressing has a base register.
236 /// The scale of any complex addressing.
239 /// BaseRegs - The list of "base" registers for this use. When this is
241 SmallVector<const SCEV *, 4> BaseRegs;
243 /// ScaledReg - The 'scaled' register for this use. This should be non-null
244 /// when Scale is not zero.
245 const SCEV *ScaledReg;
247 /// UnfoldedOffset - An additional constant offset which added near the
248 /// use. This requires a temporary register, but the offset itself can
249 /// live in an add immediate field rather than a register.
250 int64_t UnfoldedOffset;
253 : BaseGV(0), BaseOffset(0), HasBaseReg(false), Scale(0), ScaledReg(0),
256 void InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
258 unsigned getNumRegs() const;
259 Type *getType() const;
261 void DeleteBaseReg(const SCEV *&S);
263 bool referencesReg(const SCEV *S) const;
264 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
265 const RegUseTracker &RegUses) const;
267 void print(raw_ostream &OS) const;
273 /// DoInitialMatch - Recursion helper for InitialMatch.
274 static void DoInitialMatch(const SCEV *S, Loop *L,
275 SmallVectorImpl<const SCEV *> &Good,
276 SmallVectorImpl<const SCEV *> &Bad,
277 ScalarEvolution &SE) {
278 // Collect expressions which properly dominate the loop header.
279 if (SE.properlyDominates(S, L->getHeader())) {
284 // Look at add operands.
285 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
286 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
288 DoInitialMatch(*I, L, Good, Bad, SE);
292 // Look at addrec operands.
293 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
294 if (!AR->getStart()->isZero()) {
295 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
296 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
297 AR->getStepRecurrence(SE),
298 // FIXME: AR->getNoWrapFlags()
299 AR->getLoop(), SCEV::FlagAnyWrap),
304 // Handle a multiplication by -1 (negation) if it didn't fold.
305 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
306 if (Mul->getOperand(0)->isAllOnesValue()) {
307 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
308 const SCEV *NewMul = SE.getMulExpr(Ops);
310 SmallVector<const SCEV *, 4> MyGood;
311 SmallVector<const SCEV *, 4> MyBad;
312 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
313 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
314 SE.getEffectiveSCEVType(NewMul->getType())));
315 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyGood.begin(),
316 E = MyGood.end(); I != E; ++I)
317 Good.push_back(SE.getMulExpr(NegOne, *I));
318 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyBad.begin(),
319 E = MyBad.end(); I != E; ++I)
320 Bad.push_back(SE.getMulExpr(NegOne, *I));
324 // Ok, we can't do anything interesting. Just stuff the whole thing into a
325 // register and hope for the best.
329 /// InitialMatch - Incorporate loop-variant parts of S into this Formula,
330 /// attempting to keep all loop-invariant and loop-computable values in a
331 /// single base register.
332 void Formula::InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
333 SmallVector<const SCEV *, 4> Good;
334 SmallVector<const SCEV *, 4> Bad;
335 DoInitialMatch(S, L, Good, Bad, SE);
337 const SCEV *Sum = SE.getAddExpr(Good);
339 BaseRegs.push_back(Sum);
343 const SCEV *Sum = SE.getAddExpr(Bad);
345 BaseRegs.push_back(Sum);
350 /// getNumRegs - Return the total number of register operands used by this
351 /// formula. This does not include register uses implied by non-constant
353 unsigned Formula::getNumRegs() const {
354 return !!ScaledReg + BaseRegs.size();
357 /// getType - Return the type of this formula, if it has one, or null
358 /// otherwise. This type is meaningless except for the bit size.
359 Type *Formula::getType() const {
360 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
361 ScaledReg ? ScaledReg->getType() :
362 BaseGV ? BaseGV->getType() :
366 /// DeleteBaseReg - Delete the given base reg from the BaseRegs list.
367 void Formula::DeleteBaseReg(const SCEV *&S) {
368 if (&S != &BaseRegs.back())
369 std::swap(S, BaseRegs.back());
373 /// referencesReg - Test if this formula references the given register.
374 bool Formula::referencesReg(const SCEV *S) const {
375 return S == ScaledReg ||
376 std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
379 /// hasRegsUsedByUsesOtherThan - Test whether this formula uses registers
380 /// which are used by uses other than the use with the given index.
381 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
382 const RegUseTracker &RegUses) const {
384 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
386 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
387 E = BaseRegs.end(); I != E; ++I)
388 if (RegUses.isRegUsedByUsesOtherThan(*I, LUIdx))
393 void Formula::print(raw_ostream &OS) const {
396 if (!First) OS << " + "; else First = false;
397 WriteAsOperand(OS, BaseGV, /*PrintType=*/false);
399 if (BaseOffset != 0) {
400 if (!First) OS << " + "; else First = false;
403 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
404 E = BaseRegs.end(); I != E; ++I) {
405 if (!First) OS << " + "; else First = false;
406 OS << "reg(" << **I << ')';
408 if (HasBaseReg && BaseRegs.empty()) {
409 if (!First) OS << " + "; else First = false;
410 OS << "**error: HasBaseReg**";
411 } else if (!HasBaseReg && !BaseRegs.empty()) {
412 if (!First) OS << " + "; else First = false;
413 OS << "**error: !HasBaseReg**";
416 if (!First) OS << " + "; else First = false;
417 OS << Scale << "*reg(";
424 if (UnfoldedOffset != 0) {
425 if (!First) OS << " + "; else First = false;
426 OS << "imm(" << UnfoldedOffset << ')';
430 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
431 void Formula::dump() const {
432 print(errs()); errs() << '\n';
436 /// isAddRecSExtable - Return true if the given addrec can be sign-extended
437 /// without changing its value.
438 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
440 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
441 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
444 /// isAddSExtable - Return true if the given add can be sign-extended
445 /// without changing its value.
446 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
448 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
449 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
452 /// isMulSExtable - Return true if the given mul can be sign-extended
453 /// without changing its value.
454 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
456 IntegerType::get(SE.getContext(),
457 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
458 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
461 /// getExactSDiv - Return an expression for LHS /s RHS, if it can be determined
462 /// and if the remainder is known to be zero, or null otherwise. If
463 /// IgnoreSignificantBits is true, expressions like (X * Y) /s Y are simplified
464 /// to Y, ignoring that the multiplication may overflow, which is useful when
465 /// the result will be used in a context where the most significant bits are
467 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
469 bool IgnoreSignificantBits = false) {
470 // Handle the trivial case, which works for any SCEV type.
472 return SE.getConstant(LHS->getType(), 1);
474 // Handle a few RHS special cases.
475 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
477 const APInt &RA = RC->getValue()->getValue();
478 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
480 if (RA.isAllOnesValue())
481 return SE.getMulExpr(LHS, RC);
482 // Handle x /s 1 as x.
487 // Check for a division of a constant by a constant.
488 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
491 const APInt &LA = C->getValue()->getValue();
492 const APInt &RA = RC->getValue()->getValue();
493 if (LA.srem(RA) != 0)
495 return SE.getConstant(LA.sdiv(RA));
498 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
499 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
500 if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
501 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
502 IgnoreSignificantBits);
504 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
505 IgnoreSignificantBits);
506 if (!Start) return 0;
507 // FlagNW is independent of the start value, step direction, and is
508 // preserved with smaller magnitude steps.
509 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
510 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
515 // Distribute the sdiv over add operands, if the add doesn't overflow.
516 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
517 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
518 SmallVector<const SCEV *, 8> Ops;
519 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
521 const SCEV *Op = getExactSDiv(*I, RHS, SE,
522 IgnoreSignificantBits);
526 return SE.getAddExpr(Ops);
531 // Check for a multiply operand that we can pull RHS out of.
532 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
533 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
534 SmallVector<const SCEV *, 4> Ops;
536 for (SCEVMulExpr::op_iterator I = Mul->op_begin(), E = Mul->op_end();
540 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
541 IgnoreSignificantBits)) {
547 return Found ? SE.getMulExpr(Ops) : 0;
552 // Otherwise we don't know.
556 /// ExtractImmediate - If S involves the addition of a constant integer value,
557 /// return that integer value, and mutate S to point to a new SCEV with that
559 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
560 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
561 if (C->getValue()->getValue().getMinSignedBits() <= 64) {
562 S = SE.getConstant(C->getType(), 0);
563 return C->getValue()->getSExtValue();
565 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
566 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
567 int64_t Result = ExtractImmediate(NewOps.front(), SE);
569 S = SE.getAddExpr(NewOps);
571 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
572 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
573 int64_t Result = ExtractImmediate(NewOps.front(), SE);
575 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
576 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
583 /// ExtractSymbol - If S involves the addition of a GlobalValue address,
584 /// return that symbol, and mutate S to point to a new SCEV with that
586 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
587 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
588 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
589 S = SE.getConstant(GV->getType(), 0);
592 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
593 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
594 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
596 S = SE.getAddExpr(NewOps);
598 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
599 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
600 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
602 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
603 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
610 /// isAddressUse - Returns true if the specified instruction is using the
611 /// specified value as an address.
612 static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
613 bool isAddress = isa<LoadInst>(Inst);
614 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
615 if (SI->getOperand(1) == OperandVal)
617 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
618 // Addressing modes can also be folded into prefetches and a variety
620 switch (II->getIntrinsicID()) {
622 case Intrinsic::prefetch:
623 case Intrinsic::x86_sse_storeu_ps:
624 case Intrinsic::x86_sse2_storeu_pd:
625 case Intrinsic::x86_sse2_storeu_dq:
626 case Intrinsic::x86_sse2_storel_dq:
627 if (II->getArgOperand(0) == OperandVal)
635 /// getAccessType - Return the type of the memory being accessed.
636 static Type *getAccessType(const Instruction *Inst) {
637 Type *AccessTy = Inst->getType();
638 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst))
639 AccessTy = SI->getOperand(0)->getType();
640 else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
641 // Addressing modes can also be folded into prefetches and a variety
643 switch (II->getIntrinsicID()) {
645 case Intrinsic::x86_sse_storeu_ps:
646 case Intrinsic::x86_sse2_storeu_pd:
647 case Intrinsic::x86_sse2_storeu_dq:
648 case Intrinsic::x86_sse2_storel_dq:
649 AccessTy = II->getArgOperand(0)->getType();
654 // All pointers have the same requirements, so canonicalize them to an
655 // arbitrary pointer type to minimize variation.
656 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy))
657 AccessTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
658 PTy->getAddressSpace());
663 /// isExistingPhi - Return true if this AddRec is already a phi in its loop.
664 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
665 for (BasicBlock::iterator I = AR->getLoop()->getHeader()->begin();
666 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
667 if (SE.isSCEVable(PN->getType()) &&
668 (SE.getEffectiveSCEVType(PN->getType()) ==
669 SE.getEffectiveSCEVType(AR->getType())) &&
670 SE.getSCEV(PN) == AR)
676 /// Check if expanding this expression is likely to incur significant cost. This
677 /// is tricky because SCEV doesn't track which expressions are actually computed
678 /// by the current IR.
680 /// We currently allow expansion of IV increments that involve adds,
681 /// multiplication by constants, and AddRecs from existing phis.
683 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
684 /// obvious multiple of the UDivExpr.
685 static bool isHighCostExpansion(const SCEV *S,
686 SmallPtrSet<const SCEV*, 8> &Processed,
687 ScalarEvolution &SE) {
688 // Zero/One operand expressions
689 switch (S->getSCEVType()) {
694 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
697 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
700 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
704 if (!Processed.insert(S))
707 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
708 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
710 if (isHighCostExpansion(*I, Processed, SE))
716 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
717 if (Mul->getNumOperands() == 2) {
718 // Multiplication by a constant is ok
719 if (isa<SCEVConstant>(Mul->getOperand(0)))
720 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
722 // If we have the value of one operand, check if an existing
723 // multiplication already generates this expression.
724 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
725 Value *UVal = U->getValue();
726 for (Value::use_iterator UI = UVal->use_begin(), UE = UVal->use_end();
728 // If U is a constant, it may be used by a ConstantExpr.
729 Instruction *User = dyn_cast<Instruction>(*UI);
730 if (User && User->getOpcode() == Instruction::Mul
731 && SE.isSCEVable(User->getType())) {
732 return SE.getSCEV(User) == Mul;
739 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
740 if (isExistingPhi(AR, SE))
744 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
748 /// DeleteTriviallyDeadInstructions - If any of the instructions is the
749 /// specified set are trivially dead, delete them and see if this makes any of
750 /// their operands subsequently dead.
752 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
753 bool Changed = false;
755 while (!DeadInsts.empty()) {
756 Value *V = DeadInsts.pop_back_val();
757 Instruction *I = dyn_cast_or_null<Instruction>(V);
759 if (I == 0 || !isInstructionTriviallyDead(I))
762 for (User::op_iterator OI = I->op_begin(), E = I->op_end(); OI != E; ++OI)
763 if (Instruction *U = dyn_cast<Instruction>(*OI)) {
766 DeadInsts.push_back(U);
769 I->eraseFromParent();
779 // Check if it is legal to fold 2 base registers.
780 static bool isLegal2RegAMUse(const TargetTransformInfo &TTI, const LSRUse &LU,
785 /// Cost - This class is used to measure and compare candidate formulae.
787 /// TODO: Some of these could be merged. Also, a lexical ordering
788 /// isn't always optimal.
792 unsigned NumBaseAdds;
798 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
801 bool operator<(const Cost &Other) const;
806 // Once any of the metrics loses, they must all remain losers.
808 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
809 | ImmCost | SetupCost) != ~0u)
810 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
811 & ImmCost & SetupCost) == ~0u);
816 assert(isValid() && "invalid cost");
817 return NumRegs == ~0u;
820 void RateFormula(const TargetTransformInfo &TTI,
822 SmallPtrSet<const SCEV *, 16> &Regs,
823 const DenseSet<const SCEV *> &VisitedRegs,
825 const SmallVectorImpl<int64_t> &Offsets,
826 ScalarEvolution &SE, DominatorTree &DT,
828 SmallPtrSet<const SCEV *, 16> *LoserRegs = 0);
830 void print(raw_ostream &OS) const;
834 void RateRegister(const SCEV *Reg,
835 SmallPtrSet<const SCEV *, 16> &Regs,
837 ScalarEvolution &SE, DominatorTree &DT);
838 void RatePrimaryRegister(const SCEV *Reg,
839 SmallPtrSet<const SCEV *, 16> &Regs,
841 ScalarEvolution &SE, DominatorTree &DT,
842 SmallPtrSet<const SCEV *, 16> *LoserRegs);
847 /// RateRegister - Tally up interesting quantities from the given register.
848 void Cost::RateRegister(const SCEV *Reg,
849 SmallPtrSet<const SCEV *, 16> &Regs,
851 ScalarEvolution &SE, DominatorTree &DT) {
852 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
853 // If this is an addrec for another loop, don't second-guess its addrec phi
854 // nodes. LSR isn't currently smart enough to reason about more than one
855 // loop at a time. LSR has already run on inner loops, will not run on outer
856 // loops, and cannot be expected to change sibling loops.
857 if (AR->getLoop() != L) {
858 // If the AddRec exists, consider it's register free and leave it alone.
859 if (isExistingPhi(AR, SE))
862 // Otherwise, do not consider this formula at all.
866 AddRecCost += 1; /// TODO: This should be a function of the stride.
868 // Add the step value register, if it needs one.
869 // TODO: The non-affine case isn't precisely modeled here.
870 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
871 if (!Regs.count(AR->getOperand(1))) {
872 RateRegister(AR->getOperand(1), Regs, L, SE, DT);
880 // Rough heuristic; favor registers which don't require extra setup
881 // instructions in the preheader.
882 if (!isa<SCEVUnknown>(Reg) &&
883 !isa<SCEVConstant>(Reg) &&
884 !(isa<SCEVAddRecExpr>(Reg) &&
885 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
886 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
889 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
890 SE.hasComputableLoopEvolution(Reg, L);
893 /// RatePrimaryRegister - Record this register in the set. If we haven't seen it
894 /// before, rate it. Optional LoserRegs provides a way to declare any formula
895 /// that refers to one of those regs an instant loser.
896 void Cost::RatePrimaryRegister(const SCEV *Reg,
897 SmallPtrSet<const SCEV *, 16> &Regs,
899 ScalarEvolution &SE, DominatorTree &DT,
900 SmallPtrSet<const SCEV *, 16> *LoserRegs) {
901 if (LoserRegs && LoserRegs->count(Reg)) {
905 if (Regs.insert(Reg)) {
906 RateRegister(Reg, Regs, L, SE, DT);
907 if (LoserRegs && isLoser())
908 LoserRegs->insert(Reg);
912 void Cost::RateFormula(const TargetTransformInfo &TTI,
914 SmallPtrSet<const SCEV *, 16> &Regs,
915 const DenseSet<const SCEV *> &VisitedRegs,
917 const SmallVectorImpl<int64_t> &Offsets,
918 ScalarEvolution &SE, DominatorTree &DT,
920 SmallPtrSet<const SCEV *, 16> *LoserRegs) {
921 // Tally up the registers.
922 if (const SCEV *ScaledReg = F.ScaledReg) {
923 if (VisitedRegs.count(ScaledReg)) {
927 RatePrimaryRegister(ScaledReg, Regs, L, SE, DT, LoserRegs);
931 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
932 E = F.BaseRegs.end(); I != E; ++I) {
933 const SCEV *BaseReg = *I;
934 if (VisitedRegs.count(BaseReg)) {
938 RatePrimaryRegister(BaseReg, Regs, L, SE, DT, LoserRegs);
943 // Determine how many (unfolded) adds we'll need inside the loop.
944 size_t NumBaseParts = F.BaseRegs.size() + (F.UnfoldedOffset != 0);
945 if (NumBaseParts > 1)
946 // Do not count the base and a possible second register if the target
947 // allows to fold 2 registers.
948 NumBaseAdds += NumBaseParts - (1 + isLegal2RegAMUse(TTI, LU, F));
950 // Tally up the non-zero immediates.
951 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
952 E = Offsets.end(); I != E; ++I) {
953 int64_t Offset = (uint64_t)*I + F.BaseOffset;
955 ImmCost += 64; // Handle symbolic values conservatively.
956 // TODO: This should probably be the pointer size.
957 else if (Offset != 0)
958 ImmCost += APInt(64, Offset, true).getMinSignedBits();
960 assert(isValid() && "invalid cost");
963 /// Loose - Set this cost to a losing value.
973 /// operator< - Choose the lower cost.
974 bool Cost::operator<(const Cost &Other) const {
975 if (NumRegs != Other.NumRegs)
976 return NumRegs < Other.NumRegs;
977 if (AddRecCost != Other.AddRecCost)
978 return AddRecCost < Other.AddRecCost;
979 if (NumIVMuls != Other.NumIVMuls)
980 return NumIVMuls < Other.NumIVMuls;
981 if (NumBaseAdds != Other.NumBaseAdds)
982 return NumBaseAdds < Other.NumBaseAdds;
983 if (ImmCost != Other.ImmCost)
984 return ImmCost < Other.ImmCost;
985 if (SetupCost != Other.SetupCost)
986 return SetupCost < Other.SetupCost;
990 void Cost::print(raw_ostream &OS) const {
991 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
993 OS << ", with addrec cost " << AddRecCost;
995 OS << ", plus " << NumIVMuls << " IV mul" << (NumIVMuls == 1 ? "" : "s");
996 if (NumBaseAdds != 0)
997 OS << ", plus " << NumBaseAdds << " base add"
998 << (NumBaseAdds == 1 ? "" : "s");
1000 OS << ", plus " << ImmCost << " imm cost";
1002 OS << ", plus " << SetupCost << " setup cost";
1005 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1006 void Cost::dump() const {
1007 print(errs()); errs() << '\n';
1013 /// LSRFixup - An operand value in an instruction which is to be replaced
1014 /// with some equivalent, possibly strength-reduced, replacement.
1016 /// UserInst - The instruction which will be updated.
1017 Instruction *UserInst;
1019 /// OperandValToReplace - The operand of the instruction which will
1020 /// be replaced. The operand may be used more than once; every instance
1021 /// will be replaced.
1022 Value *OperandValToReplace;
1024 /// PostIncLoops - If this user is to use the post-incremented value of an
1025 /// induction variable, this variable is non-null and holds the loop
1026 /// associated with the induction variable.
1027 PostIncLoopSet PostIncLoops;
1029 /// LUIdx - The index of the LSRUse describing the expression which
1030 /// this fixup needs, minus an offset (below).
1033 /// Offset - A constant offset to be added to the LSRUse expression.
1034 /// This allows multiple fixups to share the same LSRUse with different
1035 /// offsets, for example in an unrolled loop.
1038 bool isUseFullyOutsideLoop(const Loop *L) const;
1042 void print(raw_ostream &OS) const;
1048 LSRFixup::LSRFixup()
1049 : UserInst(0), OperandValToReplace(0), LUIdx(~size_t(0)), Offset(0) {}
1051 /// isUseFullyOutsideLoop - Test whether this fixup always uses its
1052 /// value outside of the given loop.
1053 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1054 // PHI nodes use their value in their incoming blocks.
1055 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1056 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1057 if (PN->getIncomingValue(i) == OperandValToReplace &&
1058 L->contains(PN->getIncomingBlock(i)))
1063 return !L->contains(UserInst);
1066 void LSRFixup::print(raw_ostream &OS) const {
1068 // Store is common and interesting enough to be worth special-casing.
1069 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1071 WriteAsOperand(OS, Store->getOperand(0), /*PrintType=*/false);
1072 } else if (UserInst->getType()->isVoidTy())
1073 OS << UserInst->getOpcodeName();
1075 WriteAsOperand(OS, UserInst, /*PrintType=*/false);
1077 OS << ", OperandValToReplace=";
1078 WriteAsOperand(OS, OperandValToReplace, /*PrintType=*/false);
1080 for (PostIncLoopSet::const_iterator I = PostIncLoops.begin(),
1081 E = PostIncLoops.end(); I != E; ++I) {
1082 OS << ", PostIncLoop=";
1083 WriteAsOperand(OS, (*I)->getHeader(), /*PrintType=*/false);
1086 if (LUIdx != ~size_t(0))
1087 OS << ", LUIdx=" << LUIdx;
1090 OS << ", Offset=" << Offset;
1093 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1094 void LSRFixup::dump() const {
1095 print(errs()); errs() << '\n';
1101 /// UniquifierDenseMapInfo - A DenseMapInfo implementation for holding
1102 /// DenseMaps and DenseSets of sorted SmallVectors of const SCEV*.
1103 struct UniquifierDenseMapInfo {
1104 static SmallVector<const SCEV *, 4> getEmptyKey() {
1105 SmallVector<const SCEV *, 4> V;
1106 V.push_back(reinterpret_cast<const SCEV *>(-1));
1110 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1111 SmallVector<const SCEV *, 4> V;
1112 V.push_back(reinterpret_cast<const SCEV *>(-2));
1116 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1117 unsigned Result = 0;
1118 for (SmallVectorImpl<const SCEV *>::const_iterator I = V.begin(),
1119 E = V.end(); I != E; ++I)
1120 Result ^= DenseMapInfo<const SCEV *>::getHashValue(*I);
1124 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1125 const SmallVector<const SCEV *, 4> &RHS) {
1130 /// LSRUse - This class holds the state that LSR keeps for each use in
1131 /// IVUsers, as well as uses invented by LSR itself. It includes information
1132 /// about what kinds of things can be folded into the user, information about
1133 /// the user itself, and information about how the use may be satisfied.
1134 /// TODO: Represent multiple users of the same expression in common?
1136 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1139 /// KindType - An enum for a kind of use, indicating what types of
1140 /// scaled and immediate operands it might support.
1142 Basic, ///< A normal use, with no folding.
1143 Special, ///< A special case of basic, allowing -1 scales.
1144 Address, ///< An address use; folding according to TargetLowering
1145 ICmpZero ///< An equality icmp with both operands folded into one.
1146 // TODO: Add a generic icmp too?
1152 SmallVector<int64_t, 8> Offsets;
1156 /// AllFixupsOutsideLoop - This records whether all of the fixups using this
1157 /// LSRUse are outside of the loop, in which case some special-case heuristics
1159 bool AllFixupsOutsideLoop;
1161 /// WidestFixupType - This records the widest use type for any fixup using
1162 /// this LSRUse. FindUseWithSimilarFormula can't consider uses with different
1163 /// max fixup widths to be equivalent, because the narrower one may be relying
1164 /// on the implicit truncation to truncate away bogus bits.
1165 Type *WidestFixupType;
1167 /// Formulae - A list of ways to build a value that can satisfy this user.
1168 /// After the list is populated, one of these is selected heuristically and
1169 /// used to formulate a replacement for OperandValToReplace in UserInst.
1170 SmallVector<Formula, 12> Formulae;
1172 /// Regs - The set of register candidates used by all formulae in this LSRUse.
1173 SmallPtrSet<const SCEV *, 4> Regs;
1175 LSRUse(KindType K, Type *T) : Kind(K), AccessTy(T),
1176 MinOffset(INT64_MAX),
1177 MaxOffset(INT64_MIN),
1178 AllFixupsOutsideLoop(true),
1179 WidestFixupType(0) {}
1181 bool HasFormulaWithSameRegs(const Formula &F) const;
1182 bool InsertFormula(const Formula &F);
1183 void DeleteFormula(Formula &F);
1184 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1186 void print(raw_ostream &OS) const;
1192 /// HasFormula - Test whether this use as a formula which has the same
1193 /// registers as the given formula.
1194 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1195 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1196 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1197 // Unstable sort by host order ok, because this is only used for uniquifying.
1198 std::sort(Key.begin(), Key.end());
1199 return Uniquifier.count(Key);
1202 /// InsertFormula - If the given formula has not yet been inserted, add it to
1203 /// the list, and return true. Return false otherwise.
1204 bool LSRUse::InsertFormula(const Formula &F) {
1205 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1206 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1207 // Unstable sort by host order ok, because this is only used for uniquifying.
1208 std::sort(Key.begin(), Key.end());
1210 if (!Uniquifier.insert(Key).second)
1213 // Using a register to hold the value of 0 is not profitable.
1214 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1215 "Zero allocated in a scaled register!");
1217 for (SmallVectorImpl<const SCEV *>::const_iterator I =
1218 F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I)
1219 assert(!(*I)->isZero() && "Zero allocated in a base register!");
1222 // Add the formula to the list.
1223 Formulae.push_back(F);
1225 // Record registers now being used by this use.
1226 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1231 /// DeleteFormula - Remove the given formula from this use's list.
1232 void LSRUse::DeleteFormula(Formula &F) {
1233 if (&F != &Formulae.back())
1234 std::swap(F, Formulae.back());
1235 Formulae.pop_back();
1238 /// RecomputeRegs - Recompute the Regs field, and update RegUses.
1239 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1240 // Now that we've filtered out some formulae, recompute the Regs set.
1241 SmallPtrSet<const SCEV *, 4> OldRegs = Regs;
1243 for (SmallVectorImpl<Formula>::const_iterator I = Formulae.begin(),
1244 E = Formulae.end(); I != E; ++I) {
1245 const Formula &F = *I;
1246 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1247 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1250 // Update the RegTracker.
1251 for (SmallPtrSet<const SCEV *, 4>::iterator I = OldRegs.begin(),
1252 E = OldRegs.end(); I != E; ++I)
1253 if (!Regs.count(*I))
1254 RegUses.DropRegister(*I, LUIdx);
1257 void LSRUse::print(raw_ostream &OS) const {
1258 OS << "LSR Use: Kind=";
1260 case Basic: OS << "Basic"; break;
1261 case Special: OS << "Special"; break;
1262 case ICmpZero: OS << "ICmpZero"; break;
1264 OS << "Address of ";
1265 if (AccessTy->isPointerTy())
1266 OS << "pointer"; // the full pointer type could be really verbose
1271 OS << ", Offsets={";
1272 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
1273 E = Offsets.end(); I != E; ++I) {
1275 if (llvm::next(I) != E)
1280 if (AllFixupsOutsideLoop)
1281 OS << ", all-fixups-outside-loop";
1283 if (WidestFixupType)
1284 OS << ", widest fixup type: " << *WidestFixupType;
1287 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1288 void LSRUse::dump() const {
1289 print(errs()); errs() << '\n';
1293 /// isLegalUse - Test whether the use described by AM is "legal", meaning it can
1294 /// be completely folded into the user instruction at isel time. This includes
1295 /// address-mode folding and special icmp tricks.
1296 static bool isLegalUse(const TargetTransformInfo &TTI, LSRUse::KindType Kind,
1297 Type *AccessTy, GlobalValue *BaseGV, int64_t BaseOffset,
1298 bool HasBaseReg, int64_t Scale) {
1300 case LSRUse::Address:
1301 return TTI.isLegalAddressingMode(AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale);
1303 // Otherwise, just guess that reg+reg addressing is legal.
1306 case LSRUse::ICmpZero:
1307 // There's not even a target hook for querying whether it would be legal to
1308 // fold a GV into an ICmp.
1312 // ICmp only has two operands; don't allow more than two non-trivial parts.
1313 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1316 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1317 // putting the scaled register in the other operand of the icmp.
1318 if (Scale != 0 && Scale != -1)
1321 // If we have low-level target information, ask the target if it can fold an
1322 // integer immediate on an icmp.
1323 if (BaseOffset != 0) {
1325 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1326 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1327 // Offs is the ICmp immediate.
1329 // The cast does the right thing with INT64_MIN.
1330 BaseOffset = -(uint64_t)BaseOffset;
1331 return TTI.isLegalICmpImmediate(BaseOffset);
1334 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1338 // Only handle single-register values.
1339 return !BaseGV && Scale == 0 && BaseOffset == 0;
1341 case LSRUse::Special:
1342 // Special case Basic to handle -1 scales.
1343 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1346 llvm_unreachable("Invalid LSRUse Kind!");
1349 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1350 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1351 GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
1353 // Check for overflow.
1354 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1357 MinOffset = (uint64_t)BaseOffset + MinOffset;
1358 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1361 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1363 return isLegalUse(TTI, Kind, AccessTy, BaseGV, MinOffset, HasBaseReg,
1365 isLegalUse(TTI, Kind, AccessTy, BaseGV, MaxOffset, HasBaseReg, Scale);
1368 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1369 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1371 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1372 F.BaseOffset, F.HasBaseReg, F.Scale);
1375 static bool isLegal2RegAMUse(const TargetTransformInfo &TTI, const LSRUse &LU,
1377 // If F is used as an Addressing Mode, it may fold one Base plus one
1378 // scaled register. If the scaled register is nil, do as if another
1379 // element of the base regs is a 1-scaled register.
1380 // This is possible if BaseRegs has at least 2 registers.
1382 // If this is not an address calculation, this is not an addressing mode
1384 if (LU.Kind != LSRUse::Address)
1387 // F is already scaled.
1391 // We need to keep one register for the base and one to scale.
1392 if (F.BaseRegs.size() < 2)
1395 return isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
1396 F.BaseGV, F.BaseOffset, F.HasBaseReg, 1);
1399 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1400 LSRUse::KindType Kind, Type *AccessTy,
1401 GlobalValue *BaseGV, int64_t BaseOffset,
1403 // Fast-path: zero is always foldable.
1404 if (BaseOffset == 0 && !BaseGV) return true;
1406 // Conservatively, create an address with an immediate and a
1407 // base and a scale.
1408 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1410 // Canonicalize a scale of 1 to a base register if the formula doesn't
1411 // already have a base register.
1412 if (!HasBaseReg && Scale == 1) {
1417 return isLegalUse(TTI, Kind, AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale);
1420 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1421 ScalarEvolution &SE, int64_t MinOffset,
1422 int64_t MaxOffset, LSRUse::KindType Kind,
1423 Type *AccessTy, const SCEV *S, bool HasBaseReg) {
1424 // Fast-path: zero is always foldable.
1425 if (S->isZero()) return true;
1427 // Conservatively, create an address with an immediate and a
1428 // base and a scale.
1429 int64_t BaseOffset = ExtractImmediate(S, SE);
1430 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1432 // If there's anything else involved, it's not foldable.
1433 if (!S->isZero()) return false;
1435 // Fast-path: zero is always foldable.
1436 if (BaseOffset == 0 && !BaseGV) return true;
1438 // Conservatively, create an address with an immediate and a
1439 // base and a scale.
1440 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1442 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1443 BaseOffset, HasBaseReg, Scale);
1448 /// UseMapDenseMapInfo - A DenseMapInfo implementation for holding
1449 /// DenseMaps and DenseSets of pairs of const SCEV* and LSRUse::Kind.
1450 struct UseMapDenseMapInfo {
1451 static std::pair<const SCEV *, LSRUse::KindType> getEmptyKey() {
1452 return std::make_pair(reinterpret_cast<const SCEV *>(-1), LSRUse::Basic);
1455 static std::pair<const SCEV *, LSRUse::KindType> getTombstoneKey() {
1456 return std::make_pair(reinterpret_cast<const SCEV *>(-2), LSRUse::Basic);
1460 getHashValue(const std::pair<const SCEV *, LSRUse::KindType> &V) {
1461 unsigned Result = DenseMapInfo<const SCEV *>::getHashValue(V.first);
1462 Result ^= DenseMapInfo<unsigned>::getHashValue(unsigned(V.second));
1466 static bool isEqual(const std::pair<const SCEV *, LSRUse::KindType> &LHS,
1467 const std::pair<const SCEV *, LSRUse::KindType> &RHS) {
1472 /// IVInc - An individual increment in a Chain of IV increments.
1473 /// Relate an IV user to an expression that computes the IV it uses from the IV
1474 /// used by the previous link in the Chain.
1476 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1477 /// original IVOperand. The head of the chain's IVOperand is only valid during
1478 /// chain collection, before LSR replaces IV users. During chain generation,
1479 /// IncExpr can be used to find the new IVOperand that computes the same
1482 Instruction *UserInst;
1484 const SCEV *IncExpr;
1486 IVInc(Instruction *U, Value *O, const SCEV *E):
1487 UserInst(U), IVOperand(O), IncExpr(E) {}
1490 // IVChain - The list of IV increments in program order.
1491 // We typically add the head of a chain without finding subsequent links.
1493 SmallVector<IVInc,1> Incs;
1494 const SCEV *ExprBase;
1496 IVChain() : ExprBase(0) {}
1498 IVChain(const IVInc &Head, const SCEV *Base)
1499 : Incs(1, Head), ExprBase(Base) {}
1501 typedef SmallVectorImpl<IVInc>::const_iterator const_iterator;
1503 // begin - return the first increment in the chain.
1504 const_iterator begin() const {
1505 assert(!Incs.empty());
1506 return llvm::next(Incs.begin());
1508 const_iterator end() const {
1512 // hasIncs - Returns true if this chain contains any increments.
1513 bool hasIncs() const { return Incs.size() >= 2; }
1515 // add - Add an IVInc to the end of this chain.
1516 void add(const IVInc &X) { Incs.push_back(X); }
1518 // tailUserInst - Returns the last UserInst in the chain.
1519 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1521 // isProfitableIncrement - Returns true if IncExpr can be profitably added to
1523 bool isProfitableIncrement(const SCEV *OperExpr,
1524 const SCEV *IncExpr,
1528 /// ChainUsers - Helper for CollectChains to track multiple IV increment uses.
1529 /// Distinguish between FarUsers that definitely cross IV increments and
1530 /// NearUsers that may be used between IV increments.
1532 SmallPtrSet<Instruction*, 4> FarUsers;
1533 SmallPtrSet<Instruction*, 4> NearUsers;
1536 /// LSRInstance - This class holds state for the main loop strength reduction
1540 ScalarEvolution &SE;
1543 const TargetTransformInfo &TTI;
1547 /// IVIncInsertPos - This is the insert position that the current loop's
1548 /// induction variable increment should be placed. In simple loops, this is
1549 /// the latch block's terminator. But in more complicated cases, this is a
1550 /// position which will dominate all the in-loop post-increment users.
1551 Instruction *IVIncInsertPos;
1553 /// Factors - Interesting factors between use strides.
1554 SmallSetVector<int64_t, 8> Factors;
1556 /// Types - Interesting use types, to facilitate truncation reuse.
1557 SmallSetVector<Type *, 4> Types;
1559 /// Fixups - The list of operands which are to be replaced.
1560 SmallVector<LSRFixup, 16> Fixups;
1562 /// Uses - The list of interesting uses.
1563 SmallVector<LSRUse, 16> Uses;
1565 /// RegUses - Track which uses use which register candidates.
1566 RegUseTracker RegUses;
1568 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1569 // have more than a few IV increment chains in a loop. Missing a Chain falls
1570 // back to normal LSR behavior for those uses.
1571 static const unsigned MaxChains = 8;
1573 /// IVChainVec - IV users can form a chain of IV increments.
1574 SmallVector<IVChain, MaxChains> IVChainVec;
1576 /// IVIncSet - IV users that belong to profitable IVChains.
1577 SmallPtrSet<Use*, MaxChains> IVIncSet;
1579 void OptimizeShadowIV();
1580 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1581 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1582 void OptimizeLoopTermCond();
1584 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1585 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1586 void FinalizeChain(IVChain &Chain);
1587 void CollectChains();
1588 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1589 SmallVectorImpl<WeakVH> &DeadInsts);
1591 void CollectInterestingTypesAndFactors();
1592 void CollectFixupsAndInitialFormulae();
1594 LSRFixup &getNewFixup() {
1595 Fixups.push_back(LSRFixup());
1596 return Fixups.back();
1599 // Support for sharing of LSRUses between LSRFixups.
1600 typedef DenseMap<std::pair<const SCEV *, LSRUse::KindType>,
1602 UseMapDenseMapInfo> UseMapTy;
1605 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1606 LSRUse::KindType Kind, Type *AccessTy);
1608 std::pair<size_t, int64_t> getUse(const SCEV *&Expr,
1609 LSRUse::KindType Kind,
1612 void DeleteUse(LSRUse &LU, size_t LUIdx);
1614 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1616 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1617 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1618 void CountRegisters(const Formula &F, size_t LUIdx);
1619 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1621 void CollectLoopInvariantFixupsAndFormulae();
1623 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1624 unsigned Depth = 0);
1625 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1626 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1627 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1628 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1629 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1630 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
1631 void GenerateCrossUseConstantOffsets();
1632 void GenerateAllReuseFormulae();
1634 void FilterOutUndesirableDedicatedRegisters();
1636 size_t EstimateSearchSpaceComplexity() const;
1637 void NarrowSearchSpaceByDetectingSupersets();
1638 void NarrowSearchSpaceByCollapsingUnrolledCode();
1639 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
1640 void NarrowSearchSpaceByPickingWinnerRegs();
1641 void NarrowSearchSpaceUsingHeuristics();
1643 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
1645 SmallVectorImpl<const Formula *> &Workspace,
1646 const Cost &CurCost,
1647 const SmallPtrSet<const SCEV *, 16> &CurRegs,
1648 DenseSet<const SCEV *> &VisitedRegs) const;
1649 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
1651 BasicBlock::iterator
1652 HoistInsertPosition(BasicBlock::iterator IP,
1653 const SmallVectorImpl<Instruction *> &Inputs) const;
1654 BasicBlock::iterator
1655 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1658 SCEVExpander &Rewriter) const;
1660 Value *Expand(const LSRFixup &LF,
1662 BasicBlock::iterator IP,
1663 SCEVExpander &Rewriter,
1664 SmallVectorImpl<WeakVH> &DeadInsts) const;
1665 void RewriteForPHI(PHINode *PN, const LSRFixup &LF,
1667 SCEVExpander &Rewriter,
1668 SmallVectorImpl<WeakVH> &DeadInsts,
1670 void Rewrite(const LSRFixup &LF,
1672 SCEVExpander &Rewriter,
1673 SmallVectorImpl<WeakVH> &DeadInsts,
1675 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
1679 LSRInstance(Loop *L, Pass *P);
1681 bool getChanged() const { return Changed; }
1683 void print_factors_and_types(raw_ostream &OS) const;
1684 void print_fixups(raw_ostream &OS) const;
1685 void print_uses(raw_ostream &OS) const;
1686 void print(raw_ostream &OS) const;
1692 /// OptimizeShadowIV - If IV is used in a int-to-float cast
1693 /// inside the loop then try to eliminate the cast operation.
1694 void LSRInstance::OptimizeShadowIV() {
1695 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1696 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1699 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
1700 UI != E; /* empty */) {
1701 IVUsers::const_iterator CandidateUI = UI;
1703 Instruction *ShadowUse = CandidateUI->getUser();
1704 Type *DestTy = NULL;
1705 bool IsSigned = false;
1707 /* If shadow use is a int->float cast then insert a second IV
1708 to eliminate this cast.
1710 for (unsigned i = 0; i < n; ++i)
1716 for (unsigned i = 0; i < n; ++i, ++d)
1719 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
1721 DestTy = UCast->getDestTy();
1723 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
1725 DestTy = SCast->getDestTy();
1727 if (!DestTy) continue;
1729 // If target does not support DestTy natively then do not apply
1730 // this transformation.
1731 if (!TTI.isTypeLegal(DestTy)) continue;
1733 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
1735 if (PH->getNumIncomingValues() != 2) continue;
1737 Type *SrcTy = PH->getType();
1738 int Mantissa = DestTy->getFPMantissaWidth();
1739 if (Mantissa == -1) continue;
1740 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
1743 unsigned Entry, Latch;
1744 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
1752 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
1753 if (!Init) continue;
1754 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
1755 (double)Init->getSExtValue() :
1756 (double)Init->getZExtValue());
1758 BinaryOperator *Incr =
1759 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
1760 if (!Incr) continue;
1761 if (Incr->getOpcode() != Instruction::Add
1762 && Incr->getOpcode() != Instruction::Sub)
1765 /* Initialize new IV, double d = 0.0 in above example. */
1766 ConstantInt *C = NULL;
1767 if (Incr->getOperand(0) == PH)
1768 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
1769 else if (Incr->getOperand(1) == PH)
1770 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
1776 // Ignore negative constants, as the code below doesn't handle them
1777 // correctly. TODO: Remove this restriction.
1778 if (!C->getValue().isStrictlyPositive()) continue;
1780 /* Add new PHINode. */
1781 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
1783 /* create new increment. '++d' in above example. */
1784 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
1785 BinaryOperator *NewIncr =
1786 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
1787 Instruction::FAdd : Instruction::FSub,
1788 NewPH, CFP, "IV.S.next.", Incr);
1790 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
1791 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
1793 /* Remove cast operation */
1794 ShadowUse->replaceAllUsesWith(NewPH);
1795 ShadowUse->eraseFromParent();
1801 /// FindIVUserForCond - If Cond has an operand that is an expression of an IV,
1802 /// set the IV user and stride information and return true, otherwise return
1804 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
1805 for (IVUsers::iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
1806 if (UI->getUser() == Cond) {
1807 // NOTE: we could handle setcc instructions with multiple uses here, but
1808 // InstCombine does it as well for simple uses, it's not clear that it
1809 // occurs enough in real life to handle.
1816 /// OptimizeMax - Rewrite the loop's terminating condition if it uses
1817 /// a max computation.
1819 /// This is a narrow solution to a specific, but acute, problem. For loops
1825 /// } while (++i < n);
1827 /// the trip count isn't just 'n', because 'n' might not be positive. And
1828 /// unfortunately this can come up even for loops where the user didn't use
1829 /// a C do-while loop. For example, seemingly well-behaved top-test loops
1830 /// will commonly be lowered like this:
1836 /// } while (++i < n);
1839 /// and then it's possible for subsequent optimization to obscure the if
1840 /// test in such a way that indvars can't find it.
1842 /// When indvars can't find the if test in loops like this, it creates a
1843 /// max expression, which allows it to give the loop a canonical
1844 /// induction variable:
1847 /// max = n < 1 ? 1 : n;
1850 /// } while (++i != max);
1852 /// Canonical induction variables are necessary because the loop passes
1853 /// are designed around them. The most obvious example of this is the
1854 /// LoopInfo analysis, which doesn't remember trip count values. It
1855 /// expects to be able to rediscover the trip count each time it is
1856 /// needed, and it does this using a simple analysis that only succeeds if
1857 /// the loop has a canonical induction variable.
1859 /// However, when it comes time to generate code, the maximum operation
1860 /// can be quite costly, especially if it's inside of an outer loop.
1862 /// This function solves this problem by detecting this type of loop and
1863 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
1864 /// the instructions for the maximum computation.
1866 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
1867 // Check that the loop matches the pattern we're looking for.
1868 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
1869 Cond->getPredicate() != CmpInst::ICMP_NE)
1872 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
1873 if (!Sel || !Sel->hasOneUse()) return Cond;
1875 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1876 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1878 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
1880 // Add one to the backedge-taken count to get the trip count.
1881 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
1882 if (IterationCount != SE.getSCEV(Sel)) return Cond;
1884 // Check for a max calculation that matches the pattern. There's no check
1885 // for ICMP_ULE here because the comparison would be with zero, which
1886 // isn't interesting.
1887 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
1888 const SCEVNAryExpr *Max = 0;
1889 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
1890 Pred = ICmpInst::ICMP_SLE;
1892 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
1893 Pred = ICmpInst::ICMP_SLT;
1895 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
1896 Pred = ICmpInst::ICMP_ULT;
1903 // To handle a max with more than two operands, this optimization would
1904 // require additional checking and setup.
1905 if (Max->getNumOperands() != 2)
1908 const SCEV *MaxLHS = Max->getOperand(0);
1909 const SCEV *MaxRHS = Max->getOperand(1);
1911 // ScalarEvolution canonicalizes constants to the left. For < and >, look
1912 // for a comparison with 1. For <= and >=, a comparison with zero.
1914 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
1917 // Check the relevant induction variable for conformance to
1919 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
1920 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
1921 if (!AR || !AR->isAffine() ||
1922 AR->getStart() != One ||
1923 AR->getStepRecurrence(SE) != One)
1926 assert(AR->getLoop() == L &&
1927 "Loop condition operand is an addrec in a different loop!");
1929 // Check the right operand of the select, and remember it, as it will
1930 // be used in the new comparison instruction.
1932 if (ICmpInst::isTrueWhenEqual(Pred)) {
1933 // Look for n+1, and grab n.
1934 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
1935 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
1936 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
1937 NewRHS = BO->getOperand(0);
1938 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
1939 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
1940 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
1941 NewRHS = BO->getOperand(0);
1944 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
1945 NewRHS = Sel->getOperand(1);
1946 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
1947 NewRHS = Sel->getOperand(2);
1948 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
1949 NewRHS = SU->getValue();
1951 // Max doesn't match expected pattern.
1954 // Determine the new comparison opcode. It may be signed or unsigned,
1955 // and the original comparison may be either equality or inequality.
1956 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
1957 Pred = CmpInst::getInversePredicate(Pred);
1959 // Ok, everything looks ok to change the condition into an SLT or SGE and
1960 // delete the max calculation.
1962 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
1964 // Delete the max calculation instructions.
1965 Cond->replaceAllUsesWith(NewCond);
1966 CondUse->setUser(NewCond);
1967 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
1968 Cond->eraseFromParent();
1969 Sel->eraseFromParent();
1970 if (Cmp->use_empty())
1971 Cmp->eraseFromParent();
1975 /// OptimizeLoopTermCond - Change loop terminating condition to use the
1976 /// postinc iv when possible.
1978 LSRInstance::OptimizeLoopTermCond() {
1979 SmallPtrSet<Instruction *, 4> PostIncs;
1981 BasicBlock *LatchBlock = L->getLoopLatch();
1982 SmallVector<BasicBlock*, 8> ExitingBlocks;
1983 L->getExitingBlocks(ExitingBlocks);
1985 for (unsigned i = 0, e = ExitingBlocks.size(); i != e; ++i) {
1986 BasicBlock *ExitingBlock = ExitingBlocks[i];
1988 // Get the terminating condition for the loop if possible. If we
1989 // can, we want to change it to use a post-incremented version of its
1990 // induction variable, to allow coalescing the live ranges for the IV into
1991 // one register value.
1993 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
1996 // FIXME: Overly conservative, termination condition could be an 'or' etc..
1997 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2000 // Search IVUsesByStride to find Cond's IVUse if there is one.
2001 IVStrideUse *CondUse = 0;
2002 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2003 if (!FindIVUserForCond(Cond, CondUse))
2006 // If the trip count is computed in terms of a max (due to ScalarEvolution
2007 // being unable to find a sufficient guard, for example), change the loop
2008 // comparison to use SLT or ULT instead of NE.
2009 // One consequence of doing this now is that it disrupts the count-down
2010 // optimization. That's not always a bad thing though, because in such
2011 // cases it may still be worthwhile to avoid a max.
2012 Cond = OptimizeMax(Cond, CondUse);
2014 // If this exiting block dominates the latch block, it may also use
2015 // the post-inc value if it won't be shared with other uses.
2016 // Check for dominance.
2017 if (!DT.dominates(ExitingBlock, LatchBlock))
2020 // Conservatively avoid trying to use the post-inc value in non-latch
2021 // exits if there may be pre-inc users in intervening blocks.
2022 if (LatchBlock != ExitingBlock)
2023 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2024 // Test if the use is reachable from the exiting block. This dominator
2025 // query is a conservative approximation of reachability.
2026 if (&*UI != CondUse &&
2027 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2028 // Conservatively assume there may be reuse if the quotient of their
2029 // strides could be a legal scale.
2030 const SCEV *A = IU.getStride(*CondUse, L);
2031 const SCEV *B = IU.getStride(*UI, L);
2032 if (!A || !B) continue;
2033 if (SE.getTypeSizeInBits(A->getType()) !=
2034 SE.getTypeSizeInBits(B->getType())) {
2035 if (SE.getTypeSizeInBits(A->getType()) >
2036 SE.getTypeSizeInBits(B->getType()))
2037 B = SE.getSignExtendExpr(B, A->getType());
2039 A = SE.getSignExtendExpr(A, B->getType());
2041 if (const SCEVConstant *D =
2042 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2043 const ConstantInt *C = D->getValue();
2044 // Stride of one or negative one can have reuse with non-addresses.
2045 if (C->isOne() || C->isAllOnesValue())
2046 goto decline_post_inc;
2047 // Avoid weird situations.
2048 if (C->getValue().getMinSignedBits() >= 64 ||
2049 C->getValue().isMinSignedValue())
2050 goto decline_post_inc;
2051 // Check for possible scaled-address reuse.
2052 Type *AccessTy = getAccessType(UI->getUser());
2053 int64_t Scale = C->getSExtValue();
2054 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ 0,
2056 /*HasBaseReg=*/ false, Scale))
2057 goto decline_post_inc;
2059 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ 0,
2061 /*HasBaseReg=*/ false, Scale))
2062 goto decline_post_inc;
2066 DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2069 // It's possible for the setcc instruction to be anywhere in the loop, and
2070 // possible for it to have multiple users. If it is not immediately before
2071 // the exiting block branch, move it.
2072 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2073 if (Cond->hasOneUse()) {
2074 Cond->moveBefore(TermBr);
2076 // Clone the terminating condition and insert into the loopend.
2077 ICmpInst *OldCond = Cond;
2078 Cond = cast<ICmpInst>(Cond->clone());
2079 Cond->setName(L->getHeader()->getName() + ".termcond");
2080 ExitingBlock->getInstList().insert(TermBr, Cond);
2082 // Clone the IVUse, as the old use still exists!
2083 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2084 TermBr->replaceUsesOfWith(OldCond, Cond);
2088 // If we get to here, we know that we can transform the setcc instruction to
2089 // use the post-incremented version of the IV, allowing us to coalesce the
2090 // live ranges for the IV correctly.
2091 CondUse->transformToPostInc(L);
2094 PostIncs.insert(Cond);
2098 // Determine an insertion point for the loop induction variable increment. It
2099 // must dominate all the post-inc comparisons we just set up, and it must
2100 // dominate the loop latch edge.
2101 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2102 for (SmallPtrSet<Instruction *, 4>::const_iterator I = PostIncs.begin(),
2103 E = PostIncs.end(); I != E; ++I) {
2105 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2107 if (BB == (*I)->getParent())
2108 IVIncInsertPos = *I;
2109 else if (BB != IVIncInsertPos->getParent())
2110 IVIncInsertPos = BB->getTerminator();
2114 /// reconcileNewOffset - Determine if the given use can accommodate a fixup
2115 /// at the given offset and other details. If so, update the use and
2118 LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
2119 LSRUse::KindType Kind, Type *AccessTy) {
2120 int64_t NewMinOffset = LU.MinOffset;
2121 int64_t NewMaxOffset = LU.MaxOffset;
2122 Type *NewAccessTy = AccessTy;
2124 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2125 // something conservative, however this can pessimize in the case that one of
2126 // the uses will have all its uses outside the loop, for example.
2127 if (LU.Kind != Kind)
2129 // Conservatively assume HasBaseReg is true for now.
2130 if (NewOffset < LU.MinOffset) {
2131 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2132 LU.MaxOffset - NewOffset, HasBaseReg))
2134 NewMinOffset = NewOffset;
2135 } else if (NewOffset > LU.MaxOffset) {
2136 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2137 NewOffset - LU.MinOffset, HasBaseReg))
2139 NewMaxOffset = NewOffset;
2141 // Check for a mismatched access type, and fall back conservatively as needed.
2142 // TODO: Be less conservative when the type is similar and can use the same
2143 // addressing modes.
2144 if (Kind == LSRUse::Address && AccessTy != LU.AccessTy)
2145 NewAccessTy = Type::getVoidTy(AccessTy->getContext());
2148 LU.MinOffset = NewMinOffset;
2149 LU.MaxOffset = NewMaxOffset;
2150 LU.AccessTy = NewAccessTy;
2151 if (NewOffset != LU.Offsets.back())
2152 LU.Offsets.push_back(NewOffset);
2156 /// getUse - Return an LSRUse index and an offset value for a fixup which
2157 /// needs the given expression, with the given kind and optional access type.
2158 /// Either reuse an existing use or create a new one, as needed.
2159 std::pair<size_t, int64_t>
2160 LSRInstance::getUse(const SCEV *&Expr,
2161 LSRUse::KindType Kind, Type *AccessTy) {
2162 const SCEV *Copy = Expr;
2163 int64_t Offset = ExtractImmediate(Expr, SE);
2165 // Basic uses can't accept any offset, for example.
2166 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2167 Offset, /*HasBaseReg=*/ true)) {
2172 std::pair<UseMapTy::iterator, bool> P =
2173 UseMap.insert(std::make_pair(std::make_pair(Expr, Kind), 0));
2175 // A use already existed with this base.
2176 size_t LUIdx = P.first->second;
2177 LSRUse &LU = Uses[LUIdx];
2178 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2180 return std::make_pair(LUIdx, Offset);
2183 // Create a new use.
2184 size_t LUIdx = Uses.size();
2185 P.first->second = LUIdx;
2186 Uses.push_back(LSRUse(Kind, AccessTy));
2187 LSRUse &LU = Uses[LUIdx];
2189 // We don't need to track redundant offsets, but we don't need to go out
2190 // of our way here to avoid them.
2191 if (LU.Offsets.empty() || Offset != LU.Offsets.back())
2192 LU.Offsets.push_back(Offset);
2194 LU.MinOffset = Offset;
2195 LU.MaxOffset = Offset;
2196 return std::make_pair(LUIdx, Offset);
2199 /// DeleteUse - Delete the given use from the Uses list.
2200 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2201 if (&LU != &Uses.back())
2202 std::swap(LU, Uses.back());
2206 RegUses.SwapAndDropUse(LUIdx, Uses.size());
2209 /// FindUseWithFormula - Look for a use distinct from OrigLU which is has
2210 /// a formula that has the same registers as the given formula.
2212 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2213 const LSRUse &OrigLU) {
2214 // Search all uses for the formula. This could be more clever.
2215 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2216 LSRUse &LU = Uses[LUIdx];
2217 // Check whether this use is close enough to OrigLU, to see whether it's
2218 // worthwhile looking through its formulae.
2219 // Ignore ICmpZero uses because they may contain formulae generated by
2220 // GenerateICmpZeroScales, in which case adding fixup offsets may
2222 if (&LU != &OrigLU &&
2223 LU.Kind != LSRUse::ICmpZero &&
2224 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2225 LU.WidestFixupType == OrigLU.WidestFixupType &&
2226 LU.HasFormulaWithSameRegs(OrigF)) {
2227 // Scan through this use's formulae.
2228 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
2229 E = LU.Formulae.end(); I != E; ++I) {
2230 const Formula &F = *I;
2231 // Check to see if this formula has the same registers and symbols
2233 if (F.BaseRegs == OrigF.BaseRegs &&
2234 F.ScaledReg == OrigF.ScaledReg &&
2235 F.BaseGV == OrigF.BaseGV &&
2236 F.Scale == OrigF.Scale &&
2237 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2238 if (F.BaseOffset == 0)
2240 // This is the formula where all the registers and symbols matched;
2241 // there aren't going to be any others. Since we declined it, we
2242 // can skip the rest of the formulae and proceed to the next LSRUse.
2249 // Nothing looked good.
2253 void LSRInstance::CollectInterestingTypesAndFactors() {
2254 SmallSetVector<const SCEV *, 4> Strides;
2256 // Collect interesting types and strides.
2257 SmallVector<const SCEV *, 4> Worklist;
2258 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2259 const SCEV *Expr = IU.getExpr(*UI);
2261 // Collect interesting types.
2262 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2264 // Add strides for mentioned loops.
2265 Worklist.push_back(Expr);
2267 const SCEV *S = Worklist.pop_back_val();
2268 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2269 if (AR->getLoop() == L)
2270 Strides.insert(AR->getStepRecurrence(SE));
2271 Worklist.push_back(AR->getStart());
2272 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2273 Worklist.append(Add->op_begin(), Add->op_end());
2275 } while (!Worklist.empty());
2278 // Compute interesting factors from the set of interesting strides.
2279 for (SmallSetVector<const SCEV *, 4>::const_iterator
2280 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2281 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2282 llvm::next(I); NewStrideIter != E; ++NewStrideIter) {
2283 const SCEV *OldStride = *I;
2284 const SCEV *NewStride = *NewStrideIter;
2286 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2287 SE.getTypeSizeInBits(NewStride->getType())) {
2288 if (SE.getTypeSizeInBits(OldStride->getType()) >
2289 SE.getTypeSizeInBits(NewStride->getType()))
2290 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2292 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2294 if (const SCEVConstant *Factor =
2295 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2297 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2298 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2299 } else if (const SCEVConstant *Factor =
2300 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2303 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2304 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2308 // If all uses use the same type, don't bother looking for truncation-based
2310 if (Types.size() == 1)
2313 DEBUG(print_factors_and_types(dbgs()));
2316 /// findIVOperand - Helper for CollectChains that finds an IV operand (computed
2317 /// by an AddRec in this loop) within [OI,OE) or returns OE. If IVUsers mapped
2318 /// Instructions to IVStrideUses, we could partially skip this.
2319 static User::op_iterator
2320 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2321 Loop *L, ScalarEvolution &SE) {
2322 for(; OI != OE; ++OI) {
2323 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2324 if (!SE.isSCEVable(Oper->getType()))
2327 if (const SCEVAddRecExpr *AR =
2328 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2329 if (AR->getLoop() == L)
2337 /// getWideOperand - IVChain logic must consistenctly peek base TruncInst
2338 /// operands, so wrap it in a convenient helper.
2339 static Value *getWideOperand(Value *Oper) {
2340 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2341 return Trunc->getOperand(0);
2345 /// isCompatibleIVType - Return true if we allow an IV chain to include both
2347 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2348 Type *LType = LVal->getType();
2349 Type *RType = RVal->getType();
2350 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy());
2353 /// getExprBase - Return an approximation of this SCEV expression's "base", or
2354 /// NULL for any constant. Returning the expression itself is
2355 /// conservative. Returning a deeper subexpression is more precise and valid as
2356 /// long as it isn't less complex than another subexpression. For expressions
2357 /// involving multiple unscaled values, we need to return the pointer-type
2358 /// SCEVUnknown. This avoids forming chains across objects, such as:
2359 /// PrevOper==a[i], IVOper==b[i], IVInc==b-a.
2361 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2362 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2363 static const SCEV *getExprBase(const SCEV *S) {
2364 switch (S->getSCEVType()) {
2365 default: // uncluding scUnknown.
2370 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2372 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2374 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2376 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2377 // there's nothing more complex.
2378 // FIXME: not sure if we want to recognize negation.
2379 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2380 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2381 E(Add->op_begin()); I != E; ++I) {
2382 const SCEV *SubExpr = *I;
2383 if (SubExpr->getSCEVType() == scAddExpr)
2384 return getExprBase(SubExpr);
2386 if (SubExpr->getSCEVType() != scMulExpr)
2389 return S; // all operands are scaled, be conservative.
2392 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2396 /// Return true if the chain increment is profitable to expand into a loop
2397 /// invariant value, which may require its own register. A profitable chain
2398 /// increment will be an offset relative to the same base. We allow such offsets
2399 /// to potentially be used as chain increment as long as it's not obviously
2400 /// expensive to expand using real instructions.
2401 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2402 const SCEV *IncExpr,
2403 ScalarEvolution &SE) {
2404 // Aggressively form chains when -stress-ivchain.
2408 // Do not replace a constant offset from IV head with a nonconstant IV
2410 if (!isa<SCEVConstant>(IncExpr)) {
2411 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2412 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2416 SmallPtrSet<const SCEV*, 8> Processed;
2417 return !isHighCostExpansion(IncExpr, Processed, SE);
2420 /// Return true if the number of registers needed for the chain is estimated to
2421 /// be less than the number required for the individual IV users. First prohibit
2422 /// any IV users that keep the IV live across increments (the Users set should
2423 /// be empty). Next count the number and type of increments in the chain.
2425 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2426 /// effectively use postinc addressing modes. Only consider it profitable it the
2427 /// increments can be computed in fewer registers when chained.
2429 /// TODO: Consider IVInc free if it's already used in another chains.
2431 isProfitableChain(IVChain &Chain, SmallPtrSet<Instruction*, 4> &Users,
2432 ScalarEvolution &SE, const TargetTransformInfo &TTI) {
2436 if (!Chain.hasIncs())
2439 if (!Users.empty()) {
2440 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2441 for (SmallPtrSet<Instruction*, 4>::const_iterator I = Users.begin(),
2442 E = Users.end(); I != E; ++I) {
2443 dbgs() << " " << **I << "\n";
2447 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2449 // The chain itself may require a register, so intialize cost to 1.
2452 // A complete chain likely eliminates the need for keeping the original IV in
2453 // a register. LSR does not currently know how to form a complete chain unless
2454 // the header phi already exists.
2455 if (isa<PHINode>(Chain.tailUserInst())
2456 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2459 const SCEV *LastIncExpr = 0;
2460 unsigned NumConstIncrements = 0;
2461 unsigned NumVarIncrements = 0;
2462 unsigned NumReusedIncrements = 0;
2463 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2466 if (I->IncExpr->isZero())
2469 // Incrementing by zero or some constant is neutral. We assume constants can
2470 // be folded into an addressing mode or an add's immediate operand.
2471 if (isa<SCEVConstant>(I->IncExpr)) {
2472 ++NumConstIncrements;
2476 if (I->IncExpr == LastIncExpr)
2477 ++NumReusedIncrements;
2481 LastIncExpr = I->IncExpr;
2483 // An IV chain with a single increment is handled by LSR's postinc
2484 // uses. However, a chain with multiple increments requires keeping the IV's
2485 // value live longer than it needs to be if chained.
2486 if (NumConstIncrements > 1)
2489 // Materializing increment expressions in the preheader that didn't exist in
2490 // the original code may cost a register. For example, sign-extended array
2491 // indices can produce ridiculous increments like this:
2492 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2493 cost += NumVarIncrements;
2495 // Reusing variable increments likely saves a register to hold the multiple of
2497 cost -= NumReusedIncrements;
2499 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2505 /// ChainInstruction - Add this IV user to an existing chain or make it the head
2507 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2508 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2509 // When IVs are used as types of varying widths, they are generally converted
2510 // to a wider type with some uses remaining narrow under a (free) trunc.
2511 Value *const NextIV = getWideOperand(IVOper);
2512 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2513 const SCEV *const OperExprBase = getExprBase(OperExpr);
2515 // Visit all existing chains. Check if its IVOper can be computed as a
2516 // profitable loop invariant increment from the last link in the Chain.
2517 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2518 const SCEV *LastIncExpr = 0;
2519 for (; ChainIdx < NChains; ++ChainIdx) {
2520 IVChain &Chain = IVChainVec[ChainIdx];
2522 // Prune the solution space aggressively by checking that both IV operands
2523 // are expressions that operate on the same unscaled SCEVUnknown. This
2524 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2525 // first avoids creating extra SCEV expressions.
2526 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2529 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2530 if (!isCompatibleIVType(PrevIV, NextIV))
2533 // A phi node terminates a chain.
2534 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2537 // The increment must be loop-invariant so it can be kept in a register.
2538 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2539 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2540 if (!SE.isLoopInvariant(IncExpr, L))
2543 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2544 LastIncExpr = IncExpr;
2548 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2549 // bother for phi nodes, because they must be last in the chain.
2550 if (ChainIdx == NChains) {
2551 if (isa<PHINode>(UserInst))
2553 if (NChains >= MaxChains && !StressIVChain) {
2554 DEBUG(dbgs() << "IV Chain Limit\n");
2557 LastIncExpr = OperExpr;
2558 // IVUsers may have skipped over sign/zero extensions. We don't currently
2559 // attempt to form chains involving extensions unless they can be hoisted
2560 // into this loop's AddRec.
2561 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2564 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2566 ChainUsersVec.resize(NChains);
2567 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2568 << ") IV=" << *LastIncExpr << "\n");
2570 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2571 << ") IV+" << *LastIncExpr << "\n");
2572 // Add this IV user to the end of the chain.
2573 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2575 IVChain &Chain = IVChainVec[ChainIdx];
2577 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2578 // This chain's NearUsers become FarUsers.
2579 if (!LastIncExpr->isZero()) {
2580 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2585 // All other uses of IVOperand become near uses of the chain.
2586 // We currently ignore intermediate values within SCEV expressions, assuming
2587 // they will eventually be used be the current chain, or can be computed
2588 // from one of the chain increments. To be more precise we could
2589 // transitively follow its user and only add leaf IV users to the set.
2590 for (Value::use_iterator UseIter = IVOper->use_begin(),
2591 UseEnd = IVOper->use_end(); UseIter != UseEnd; ++UseIter) {
2592 Instruction *OtherUse = dyn_cast<Instruction>(*UseIter);
2595 // Uses in the chain will no longer be uses if the chain is formed.
2596 // Include the head of the chain in this iteration (not Chain.begin()).
2597 IVChain::const_iterator IncIter = Chain.Incs.begin();
2598 IVChain::const_iterator IncEnd = Chain.Incs.end();
2599 for( ; IncIter != IncEnd; ++IncIter) {
2600 if (IncIter->UserInst == OtherUse)
2603 if (IncIter != IncEnd)
2606 if (SE.isSCEVable(OtherUse->getType())
2607 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
2608 && IU.isIVUserOrOperand(OtherUse)) {
2611 NearUsers.insert(OtherUse);
2614 // Since this user is part of the chain, it's no longer considered a use
2616 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
2619 /// CollectChains - Populate the vector of Chains.
2621 /// This decreases ILP at the architecture level. Targets with ample registers,
2622 /// multiple memory ports, and no register renaming probably don't want
2623 /// this. However, such targets should probably disable LSR altogether.
2625 /// The job of LSR is to make a reasonable choice of induction variables across
2626 /// the loop. Subsequent passes can easily "unchain" computation exposing more
2627 /// ILP *within the loop* if the target wants it.
2629 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
2630 /// will not reorder memory operations, it will recognize this as a chain, but
2631 /// will generate redundant IV increments. Ideally this would be corrected later
2632 /// by a smart scheduler:
2638 /// TODO: Walk the entire domtree within this loop, not just the path to the
2639 /// loop latch. This will discover chains on side paths, but requires
2640 /// maintaining multiple copies of the Chains state.
2641 void LSRInstance::CollectChains() {
2642 DEBUG(dbgs() << "Collecting IV Chains.\n");
2643 SmallVector<ChainUsers, 8> ChainUsersVec;
2645 SmallVector<BasicBlock *,8> LatchPath;
2646 BasicBlock *LoopHeader = L->getHeader();
2647 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
2648 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
2649 LatchPath.push_back(Rung->getBlock());
2651 LatchPath.push_back(LoopHeader);
2653 // Walk the instruction stream from the loop header to the loop latch.
2654 for (SmallVectorImpl<BasicBlock *>::reverse_iterator
2655 BBIter = LatchPath.rbegin(), BBEnd = LatchPath.rend();
2656 BBIter != BBEnd; ++BBIter) {
2657 for (BasicBlock::iterator I = (*BBIter)->begin(), E = (*BBIter)->end();
2659 // Skip instructions that weren't seen by IVUsers analysis.
2660 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(I))
2663 // Ignore users that are part of a SCEV expression. This way we only
2664 // consider leaf IV Users. This effectively rediscovers a portion of
2665 // IVUsers analysis but in program order this time.
2666 if (SE.isSCEVable(I->getType()) && !isa<SCEVUnknown>(SE.getSCEV(I)))
2669 // Remove this instruction from any NearUsers set it may be in.
2670 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
2671 ChainIdx < NChains; ++ChainIdx) {
2672 ChainUsersVec[ChainIdx].NearUsers.erase(I);
2674 // Search for operands that can be chained.
2675 SmallPtrSet<Instruction*, 4> UniqueOperands;
2676 User::op_iterator IVOpEnd = I->op_end();
2677 User::op_iterator IVOpIter = findIVOperand(I->op_begin(), IVOpEnd, L, SE);
2678 while (IVOpIter != IVOpEnd) {
2679 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
2680 if (UniqueOperands.insert(IVOpInst))
2681 ChainInstruction(I, IVOpInst, ChainUsersVec);
2682 IVOpIter = findIVOperand(llvm::next(IVOpIter), IVOpEnd, L, SE);
2684 } // Continue walking down the instructions.
2685 } // Continue walking down the domtree.
2686 // Visit phi backedges to determine if the chain can generate the IV postinc.
2687 for (BasicBlock::iterator I = L->getHeader()->begin();
2688 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
2689 if (!SE.isSCEVable(PN->getType()))
2693 dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
2695 ChainInstruction(PN, IncV, ChainUsersVec);
2697 // Remove any unprofitable chains.
2698 unsigned ChainIdx = 0;
2699 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
2700 UsersIdx < NChains; ++UsersIdx) {
2701 if (!isProfitableChain(IVChainVec[UsersIdx],
2702 ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
2704 // Preserve the chain at UsesIdx.
2705 if (ChainIdx != UsersIdx)
2706 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
2707 FinalizeChain(IVChainVec[ChainIdx]);
2710 IVChainVec.resize(ChainIdx);
2713 void LSRInstance::FinalizeChain(IVChain &Chain) {
2714 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2715 DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
2717 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2719 DEBUG(dbgs() << " Inc: " << *I->UserInst << "\n");
2720 User::op_iterator UseI =
2721 std::find(I->UserInst->op_begin(), I->UserInst->op_end(), I->IVOperand);
2722 assert(UseI != I->UserInst->op_end() && "cannot find IV operand");
2723 IVIncSet.insert(UseI);
2727 /// Return true if the IVInc can be folded into an addressing mode.
2728 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
2729 Value *Operand, const TargetTransformInfo &TTI) {
2730 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
2731 if (!IncConst || !isAddressUse(UserInst, Operand))
2734 if (IncConst->getValue()->getValue().getMinSignedBits() > 64)
2737 int64_t IncOffset = IncConst->getValue()->getSExtValue();
2738 if (!isAlwaysFoldable(TTI, LSRUse::Address,
2739 getAccessType(UserInst), /*BaseGV=*/ 0,
2740 IncOffset, /*HaseBaseReg=*/ false))
2746 /// GenerateIVChains - Generate an add or subtract for each IVInc in a chain to
2747 /// materialize the IV user's operand from the previous IV user's operand.
2748 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
2749 SmallVectorImpl<WeakVH> &DeadInsts) {
2750 // Find the new IVOperand for the head of the chain. It may have been replaced
2752 const IVInc &Head = Chain.Incs[0];
2753 User::op_iterator IVOpEnd = Head.UserInst->op_end();
2754 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
2755 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
2758 while (IVOpIter != IVOpEnd) {
2759 IVSrc = getWideOperand(*IVOpIter);
2761 // If this operand computes the expression that the chain needs, we may use
2762 // it. (Check this after setting IVSrc which is used below.)
2764 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
2765 // narrow for the chain, so we can no longer use it. We do allow using a
2766 // wider phi, assuming the LSR checked for free truncation. In that case we
2767 // should already have a truncate on this operand such that
2768 // getSCEV(IVSrc) == IncExpr.
2769 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
2770 || SE.getSCEV(IVSrc) == Head.IncExpr) {
2773 IVOpIter = findIVOperand(llvm::next(IVOpIter), IVOpEnd, L, SE);
2775 if (IVOpIter == IVOpEnd) {
2776 // Gracefully give up on this chain.
2777 DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
2781 DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
2782 Type *IVTy = IVSrc->getType();
2783 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
2784 const SCEV *LeftOverExpr = 0;
2785 for (IVChain::const_iterator IncI = Chain.begin(),
2786 IncE = Chain.end(); IncI != IncE; ++IncI) {
2788 Instruction *InsertPt = IncI->UserInst;
2789 if (isa<PHINode>(InsertPt))
2790 InsertPt = L->getLoopLatch()->getTerminator();
2792 // IVOper will replace the current IV User's operand. IVSrc is the IV
2793 // value currently held in a register.
2794 Value *IVOper = IVSrc;
2795 if (!IncI->IncExpr->isZero()) {
2796 // IncExpr was the result of subtraction of two narrow values, so must
2798 const SCEV *IncExpr = SE.getNoopOrSignExtend(IncI->IncExpr, IntTy);
2799 LeftOverExpr = LeftOverExpr ?
2800 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
2802 if (LeftOverExpr && !LeftOverExpr->isZero()) {
2803 // Expand the IV increment.
2804 Rewriter.clearPostInc();
2805 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
2806 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
2807 SE.getUnknown(IncV));
2808 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
2810 // If an IV increment can't be folded, use it as the next IV value.
2811 if (!canFoldIVIncExpr(LeftOverExpr, IncI->UserInst, IncI->IVOperand,
2813 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
2818 Type *OperTy = IncI->IVOperand->getType();
2819 if (IVTy != OperTy) {
2820 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
2821 "cannot extend a chained IV");
2822 IRBuilder<> Builder(InsertPt);
2823 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
2825 IncI->UserInst->replaceUsesOfWith(IncI->IVOperand, IVOper);
2826 DeadInsts.push_back(IncI->IVOperand);
2828 // If LSR created a new, wider phi, we may also replace its postinc. We only
2829 // do this if we also found a wide value for the head of the chain.
2830 if (isa<PHINode>(Chain.tailUserInst())) {
2831 for (BasicBlock::iterator I = L->getHeader()->begin();
2832 PHINode *Phi = dyn_cast<PHINode>(I); ++I) {
2833 if (!isCompatibleIVType(Phi, IVSrc))
2835 Instruction *PostIncV = dyn_cast<Instruction>(
2836 Phi->getIncomingValueForBlock(L->getLoopLatch()));
2837 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
2839 Value *IVOper = IVSrc;
2840 Type *PostIncTy = PostIncV->getType();
2841 if (IVTy != PostIncTy) {
2842 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
2843 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
2844 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
2845 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
2847 Phi->replaceUsesOfWith(PostIncV, IVOper);
2848 DeadInsts.push_back(PostIncV);
2853 void LSRInstance::CollectFixupsAndInitialFormulae() {
2854 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2855 Instruction *UserInst = UI->getUser();
2856 // Skip IV users that are part of profitable IV Chains.
2857 User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
2858 UI->getOperandValToReplace());
2859 assert(UseI != UserInst->op_end() && "cannot find IV operand");
2860 if (IVIncSet.count(UseI))
2864 LSRFixup &LF = getNewFixup();
2865 LF.UserInst = UserInst;
2866 LF.OperandValToReplace = UI->getOperandValToReplace();
2867 LF.PostIncLoops = UI->getPostIncLoops();
2869 LSRUse::KindType Kind = LSRUse::Basic;
2871 if (isAddressUse(LF.UserInst, LF.OperandValToReplace)) {
2872 Kind = LSRUse::Address;
2873 AccessTy = getAccessType(LF.UserInst);
2876 const SCEV *S = IU.getExpr(*UI);
2878 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
2879 // (N - i == 0), and this allows (N - i) to be the expression that we work
2880 // with rather than just N or i, so we can consider the register
2881 // requirements for both N and i at the same time. Limiting this code to
2882 // equality icmps is not a problem because all interesting loops use
2883 // equality icmps, thanks to IndVarSimplify.
2884 if (ICmpInst *CI = dyn_cast<ICmpInst>(LF.UserInst))
2885 if (CI->isEquality()) {
2886 // Swap the operands if needed to put the OperandValToReplace on the
2887 // left, for consistency.
2888 Value *NV = CI->getOperand(1);
2889 if (NV == LF.OperandValToReplace) {
2890 CI->setOperand(1, CI->getOperand(0));
2891 CI->setOperand(0, NV);
2892 NV = CI->getOperand(1);
2896 // x == y --> x - y == 0
2897 const SCEV *N = SE.getSCEV(NV);
2898 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N)) {
2899 // S is normalized, so normalize N before folding it into S
2900 // to keep the result normalized.
2901 N = TransformForPostIncUse(Normalize, N, CI, 0,
2902 LF.PostIncLoops, SE, DT);
2903 Kind = LSRUse::ICmpZero;
2904 S = SE.getMinusSCEV(N, S);
2907 // -1 and the negations of all interesting strides (except the negation
2908 // of -1) are now also interesting.
2909 for (size_t i = 0, e = Factors.size(); i != e; ++i)
2910 if (Factors[i] != -1)
2911 Factors.insert(-(uint64_t)Factors[i]);
2915 // Set up the initial formula for this use.
2916 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
2918 LF.Offset = P.second;
2919 LSRUse &LU = Uses[LF.LUIdx];
2920 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
2921 if (!LU.WidestFixupType ||
2922 SE.getTypeSizeInBits(LU.WidestFixupType) <
2923 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
2924 LU.WidestFixupType = LF.OperandValToReplace->getType();
2926 // If this is the first use of this LSRUse, give it a formula.
2927 if (LU.Formulae.empty()) {
2928 InsertInitialFormula(S, LU, LF.LUIdx);
2929 CountRegisters(LU.Formulae.back(), LF.LUIdx);
2933 DEBUG(print_fixups(dbgs()));
2936 /// InsertInitialFormula - Insert a formula for the given expression into
2937 /// the given use, separating out loop-variant portions from loop-invariant
2938 /// and loop-computable portions.
2940 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
2942 F.InitialMatch(S, L, SE);
2943 bool Inserted = InsertFormula(LU, LUIdx, F);
2944 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
2947 /// InsertSupplementalFormula - Insert a simple single-register formula for
2948 /// the given expression into the given use.
2950 LSRInstance::InsertSupplementalFormula(const SCEV *S,
2951 LSRUse &LU, size_t LUIdx) {
2953 F.BaseRegs.push_back(S);
2954 F.HasBaseReg = true;
2955 bool Inserted = InsertFormula(LU, LUIdx, F);
2956 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
2959 /// CountRegisters - Note which registers are used by the given formula,
2960 /// updating RegUses.
2961 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
2963 RegUses.CountRegister(F.ScaledReg, LUIdx);
2964 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
2965 E = F.BaseRegs.end(); I != E; ++I)
2966 RegUses.CountRegister(*I, LUIdx);
2969 /// InsertFormula - If the given formula has not yet been inserted, add it to
2970 /// the list, and return true. Return false otherwise.
2971 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
2972 if (!LU.InsertFormula(F))
2975 CountRegisters(F, LUIdx);
2979 /// CollectLoopInvariantFixupsAndFormulae - Check for other uses of
2980 /// loop-invariant values which we're tracking. These other uses will pin these
2981 /// values in registers, making them less profitable for elimination.
2982 /// TODO: This currently misses non-constant addrec step registers.
2983 /// TODO: Should this give more weight to users inside the loop?
2985 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
2986 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
2987 SmallPtrSet<const SCEV *, 8> Inserted;
2989 while (!Worklist.empty()) {
2990 const SCEV *S = Worklist.pop_back_val();
2992 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
2993 Worklist.append(N->op_begin(), N->op_end());
2994 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
2995 Worklist.push_back(C->getOperand());
2996 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
2997 Worklist.push_back(D->getLHS());
2998 Worklist.push_back(D->getRHS());
2999 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
3000 if (!Inserted.insert(U)) continue;
3001 const Value *V = U->getValue();
3002 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3003 // Look for instructions defined outside the loop.
3004 if (L->contains(Inst)) continue;
3005 } else if (isa<UndefValue>(V))
3006 // Undef doesn't have a live range, so it doesn't matter.
3008 for (Value::const_use_iterator UI = V->use_begin(), UE = V->use_end();
3010 const Instruction *UserInst = dyn_cast<Instruction>(*UI);
3011 // Ignore non-instructions.
3014 // Ignore instructions in other functions (as can happen with
3016 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3018 // Ignore instructions not dominated by the loop.
3019 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3020 UserInst->getParent() :
3021 cast<PHINode>(UserInst)->getIncomingBlock(
3022 PHINode::getIncomingValueNumForOperand(UI.getOperandNo()));
3023 if (!DT.dominates(L->getHeader(), UseBB))
3025 // Ignore uses which are part of other SCEV expressions, to avoid
3026 // analyzing them multiple times.
3027 if (SE.isSCEVable(UserInst->getType())) {
3028 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3029 // If the user is a no-op, look through to its uses.
3030 if (!isa<SCEVUnknown>(UserS))
3034 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3038 // Ignore icmp instructions which are already being analyzed.
3039 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3040 unsigned OtherIdx = !UI.getOperandNo();
3041 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3042 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3046 LSRFixup &LF = getNewFixup();
3047 LF.UserInst = const_cast<Instruction *>(UserInst);
3048 LF.OperandValToReplace = UI.getUse();
3049 std::pair<size_t, int64_t> P = getUse(S, LSRUse::Basic, 0);
3051 LF.Offset = P.second;
3052 LSRUse &LU = Uses[LF.LUIdx];
3053 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3054 if (!LU.WidestFixupType ||
3055 SE.getTypeSizeInBits(LU.WidestFixupType) <
3056 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3057 LU.WidestFixupType = LF.OperandValToReplace->getType();
3058 InsertSupplementalFormula(U, LU, LF.LUIdx);
3059 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3066 /// CollectSubexprs - Split S into subexpressions which can be pulled out into
3067 /// separate registers. If C is non-null, multiply each subexpression by C.
3069 /// Return remainder expression after factoring the subexpressions captured by
3070 /// Ops. If Ops is complete, return NULL.
3071 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3072 SmallVectorImpl<const SCEV *> &Ops,
3074 ScalarEvolution &SE,
3075 unsigned Depth = 0) {
3076 // Arbitrarily cap recursion to protect compile time.
3080 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3081 // Break out add operands.
3082 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
3084 const SCEV *Remainder = CollectSubexprs(*I, C, Ops, L, SE, Depth+1);
3086 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3089 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3090 // Split a non-zero base out of an addrec.
3091 if (AR->getStart()->isZero())
3094 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3095 C, Ops, L, SE, Depth+1);
3096 // Split the non-zero AddRec unless it is part of a nested recurrence that
3097 // does not pertain to this loop.
3098 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3099 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3102 if (Remainder != AR->getStart()) {
3104 Remainder = SE.getConstant(AR->getType(), 0);
3105 return SE.getAddRecExpr(Remainder,
3106 AR->getStepRecurrence(SE),
3108 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3111 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3112 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3113 if (Mul->getNumOperands() != 2)
3115 if (const SCEVConstant *Op0 =
3116 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3117 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3118 const SCEV *Remainder =
3119 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3121 Ops.push_back(SE.getMulExpr(C, Remainder));
3128 /// GenerateReassociations - Split out subexpressions from adds and the bases of
3130 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3133 // Arbitrarily cap recursion to protect compile time.
3134 if (Depth >= 3) return;
3136 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3137 const SCEV *BaseReg = Base.BaseRegs[i];
3139 SmallVector<const SCEV *, 8> AddOps;
3140 const SCEV *Remainder = CollectSubexprs(BaseReg, 0, AddOps, L, SE);
3142 AddOps.push_back(Remainder);
3144 if (AddOps.size() == 1) continue;
3146 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3147 JE = AddOps.end(); J != JE; ++J) {
3149 // Loop-variant "unknown" values are uninteresting; we won't be able to
3150 // do anything meaningful with them.
3151 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3154 // Don't pull a constant into a register if the constant could be folded
3155 // into an immediate field.
3156 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3157 LU.AccessTy, *J, Base.getNumRegs() > 1))
3160 // Collect all operands except *J.
3161 SmallVector<const SCEV *, 8> InnerAddOps
3162 (((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3164 (llvm::next(J), ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3166 // Don't leave just a constant behind in a register if the constant could
3167 // be folded into an immediate field.
3168 if (InnerAddOps.size() == 1 &&
3169 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3170 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3173 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3174 if (InnerSum->isZero())
3178 // Add the remaining pieces of the add back into the new formula.
3179 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3181 SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3182 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3183 InnerSumSC->getValue()->getZExtValue())) {
3184 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset +
3185 InnerSumSC->getValue()->getZExtValue();
3186 F.BaseRegs.erase(F.BaseRegs.begin() + i);
3188 F.BaseRegs[i] = InnerSum;
3190 // Add J as its own register, or an unfolded immediate.
3191 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3192 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3193 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3194 SC->getValue()->getZExtValue()))
3195 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset +
3196 SC->getValue()->getZExtValue();
3198 F.BaseRegs.push_back(*J);
3200 if (InsertFormula(LU, LUIdx, F))
3201 // If that formula hadn't been seen before, recurse to find more like
3203 GenerateReassociations(LU, LUIdx, LU.Formulae.back(), Depth+1);
3208 /// GenerateCombinations - Generate a formula consisting of all of the
3209 /// loop-dominating registers added into a single register.
3210 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3212 // This method is only interesting on a plurality of registers.
3213 if (Base.BaseRegs.size() <= 1) return;
3217 SmallVector<const SCEV *, 4> Ops;
3218 for (SmallVectorImpl<const SCEV *>::const_iterator
3219 I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) {
3220 const SCEV *BaseReg = *I;
3221 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3222 !SE.hasComputableLoopEvolution(BaseReg, L))
3223 Ops.push_back(BaseReg);
3225 F.BaseRegs.push_back(BaseReg);
3227 if (Ops.size() > 1) {
3228 const SCEV *Sum = SE.getAddExpr(Ops);
3229 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3230 // opportunity to fold something. For now, just ignore such cases
3231 // rather than proceed with zero in a register.
3232 if (!Sum->isZero()) {
3233 F.BaseRegs.push_back(Sum);
3234 (void)InsertFormula(LU, LUIdx, F);
3239 /// GenerateSymbolicOffsets - Generate reuse formulae using symbolic offsets.
3240 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3242 // We can't add a symbolic offset if the address already contains one.
3243 if (Base.BaseGV) return;
3245 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3246 const SCEV *G = Base.BaseRegs[i];
3247 GlobalValue *GV = ExtractSymbol(G, SE);
3248 if (G->isZero() || !GV)
3252 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3255 (void)InsertFormula(LU, LUIdx, F);
3259 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3260 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3262 // TODO: For now, just add the min and max offset, because it usually isn't
3263 // worthwhile looking at everything inbetween.
3264 SmallVector<int64_t, 2> Worklist;
3265 Worklist.push_back(LU.MinOffset);
3266 if (LU.MaxOffset != LU.MinOffset)
3267 Worklist.push_back(LU.MaxOffset);
3269 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3270 const SCEV *G = Base.BaseRegs[i];
3272 for (SmallVectorImpl<int64_t>::const_iterator I = Worklist.begin(),
3273 E = Worklist.end(); I != E; ++I) {
3275 F.BaseOffset = (uint64_t)Base.BaseOffset - *I;
3276 if (isLegalUse(TTI, LU.MinOffset - *I, LU.MaxOffset - *I, LU.Kind,
3278 // Add the offset to the base register.
3279 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), *I), G);
3280 // If it cancelled out, drop the base register, otherwise update it.
3281 if (NewG->isZero()) {
3282 std::swap(F.BaseRegs[i], F.BaseRegs.back());
3283 F.BaseRegs.pop_back();
3285 F.BaseRegs[i] = NewG;
3287 (void)InsertFormula(LU, LUIdx, F);
3291 int64_t Imm = ExtractImmediate(G, SE);
3292 if (G->isZero() || Imm == 0)
3295 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3296 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3299 (void)InsertFormula(LU, LUIdx, F);
3303 /// GenerateICmpZeroScales - For ICmpZero, check to see if we can scale up
3304 /// the comparison. For example, x == y -> x*c == y*c.
3305 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3307 if (LU.Kind != LSRUse::ICmpZero) return;
3309 // Determine the integer type for the base formula.
3310 Type *IntTy = Base.getType();
3312 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3314 // Don't do this if there is more than one offset.
3315 if (LU.MinOffset != LU.MaxOffset) return;
3317 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3319 // Check each interesting stride.
3320 for (SmallSetVector<int64_t, 8>::const_iterator
3321 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3322 int64_t Factor = *I;
3324 // Check that the multiplication doesn't overflow.
3325 if (Base.BaseOffset == INT64_MIN && Factor == -1)
3327 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3328 if (NewBaseOffset / Factor != Base.BaseOffset)
3331 // Check that multiplying with the use offset doesn't overflow.
3332 int64_t Offset = LU.MinOffset;
3333 if (Offset == INT64_MIN && Factor == -1)
3335 Offset = (uint64_t)Offset * Factor;
3336 if (Offset / Factor != LU.MinOffset)
3340 F.BaseOffset = NewBaseOffset;
3342 // Check that this scale is legal.
3343 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3346 // Compensate for the use having MinOffset built into it.
3347 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3349 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3351 // Check that multiplying with each base register doesn't overflow.
3352 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3353 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3354 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3358 // Check that multiplying with the scaled register doesn't overflow.
3360 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3361 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3365 // Check that multiplying with the unfolded offset doesn't overflow.
3366 if (F.UnfoldedOffset != 0) {
3367 if (F.UnfoldedOffset == INT64_MIN && Factor == -1)
3369 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3370 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3374 // If we make it here and it's legal, add it.
3375 (void)InsertFormula(LU, LUIdx, F);
3380 /// GenerateScales - Generate stride factor reuse formulae by making use of
3381 /// scaled-offset address modes, for example.
3382 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3383 // Determine the integer type for the base formula.
3384 Type *IntTy = Base.getType();
3387 // If this Formula already has a scaled register, we can't add another one.
3388 if (Base.Scale != 0) return;
3390 // Check each interesting stride.
3391 for (SmallSetVector<int64_t, 8>::const_iterator
3392 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3393 int64_t Factor = *I;
3395 Base.Scale = Factor;
3396 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3397 // Check whether this scale is going to be legal.
3398 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3400 // As a special-case, handle special out-of-loop Basic users specially.
3401 // TODO: Reconsider this special case.
3402 if (LU.Kind == LSRUse::Basic &&
3403 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3404 LU.AccessTy, Base) &&
3405 LU.AllFixupsOutsideLoop)
3406 LU.Kind = LSRUse::Special;
3410 // For an ICmpZero, negating a solitary base register won't lead to
3412 if (LU.Kind == LSRUse::ICmpZero &&
3413 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3415 // For each addrec base reg, apply the scale, if possible.
3416 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3417 if (const SCEVAddRecExpr *AR =
3418 dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i])) {
3419 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3420 if (FactorS->isZero())
3422 // Divide out the factor, ignoring high bits, since we'll be
3423 // scaling the value back up in the end.
3424 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3425 // TODO: This could be optimized to avoid all the copying.
3427 F.ScaledReg = Quotient;
3428 F.DeleteBaseReg(F.BaseRegs[i]);
3429 (void)InsertFormula(LU, LUIdx, F);
3435 /// GenerateTruncates - Generate reuse formulae from different IV types.
3436 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
3437 // Don't bother truncating symbolic values.
3438 if (Base.BaseGV) return;
3440 // Determine the integer type for the base formula.
3441 Type *DstTy = Base.getType();
3443 DstTy = SE.getEffectiveSCEVType(DstTy);
3445 for (SmallSetVector<Type *, 4>::const_iterator
3446 I = Types.begin(), E = Types.end(); I != E; ++I) {
3448 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
3451 if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, *I);
3452 for (SmallVectorImpl<const SCEV *>::iterator J = F.BaseRegs.begin(),
3453 JE = F.BaseRegs.end(); J != JE; ++J)
3454 *J = SE.getAnyExtendExpr(*J, SrcTy);
3456 // TODO: This assumes we've done basic processing on all uses and
3457 // have an idea what the register usage is.
3458 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3461 (void)InsertFormula(LU, LUIdx, F);
3468 /// WorkItem - Helper class for GenerateCrossUseConstantOffsets. It's used to
3469 /// defer modifications so that the search phase doesn't have to worry about
3470 /// the data structures moving underneath it.
3474 const SCEV *OrigReg;
3476 WorkItem(size_t LI, int64_t I, const SCEV *R)
3477 : LUIdx(LI), Imm(I), OrigReg(R) {}
3479 void print(raw_ostream &OS) const;
3485 void WorkItem::print(raw_ostream &OS) const {
3486 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
3487 << " , add offset " << Imm;
3490 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
3491 void WorkItem::dump() const {
3492 print(errs()); errs() << '\n';
3496 /// GenerateCrossUseConstantOffsets - Look for registers which are a constant
3497 /// distance apart and try to form reuse opportunities between them.
3498 void LSRInstance::GenerateCrossUseConstantOffsets() {
3499 // Group the registers by their value without any added constant offset.
3500 typedef std::map<int64_t, const SCEV *> ImmMapTy;
3501 typedef DenseMap<const SCEV *, ImmMapTy> RegMapTy;
3503 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
3504 SmallVector<const SCEV *, 8> Sequence;
3505 for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
3507 const SCEV *Reg = *I;
3508 int64_t Imm = ExtractImmediate(Reg, SE);
3509 std::pair<RegMapTy::iterator, bool> Pair =
3510 Map.insert(std::make_pair(Reg, ImmMapTy()));
3512 Sequence.push_back(Reg);
3513 Pair.first->second.insert(std::make_pair(Imm, *I));
3514 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(*I);
3517 // Now examine each set of registers with the same base value. Build up
3518 // a list of work to do and do the work in a separate step so that we're
3519 // not adding formulae and register counts while we're searching.
3520 SmallVector<WorkItem, 32> WorkItems;
3521 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
3522 for (SmallVectorImpl<const SCEV *>::const_iterator I = Sequence.begin(),
3523 E = Sequence.end(); I != E; ++I) {
3524 const SCEV *Reg = *I;
3525 const ImmMapTy &Imms = Map.find(Reg)->second;
3527 // It's not worthwhile looking for reuse if there's only one offset.
3528 if (Imms.size() == 1)
3531 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3532 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3534 dbgs() << ' ' << J->first;
3537 // Examine each offset.
3538 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3540 const SCEV *OrigReg = J->second;
3542 int64_t JImm = J->first;
3543 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3545 if (!isa<SCEVConstant>(OrigReg) &&
3546 UsedByIndicesMap[Reg].count() == 1) {
3547 DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg << '\n');
3551 // Conservatively examine offsets between this orig reg a few selected
3553 ImmMapTy::const_iterator OtherImms[] = {
3554 Imms.begin(), prior(Imms.end()),
3555 Imms.lower_bound((Imms.begin()->first + prior(Imms.end())->first) / 2)
3557 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
3558 ImmMapTy::const_iterator M = OtherImms[i];
3559 if (M == J || M == JE) continue;
3561 // Compute the difference between the two.
3562 int64_t Imm = (uint64_t)JImm - M->first;
3563 for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
3564 LUIdx = UsedByIndices.find_next(LUIdx))
3565 // Make a memo of this use, offset, and register tuple.
3566 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)))
3567 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
3574 UsedByIndicesMap.clear();
3575 UniqueItems.clear();
3577 // Now iterate through the worklist and add new formulae.
3578 for (SmallVectorImpl<WorkItem>::const_iterator I = WorkItems.begin(),
3579 E = WorkItems.end(); I != E; ++I) {
3580 const WorkItem &WI = *I;
3581 size_t LUIdx = WI.LUIdx;
3582 LSRUse &LU = Uses[LUIdx];
3583 int64_t Imm = WI.Imm;
3584 const SCEV *OrigReg = WI.OrigReg;
3586 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
3587 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
3588 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
3590 // TODO: Use a more targeted data structure.
3591 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
3592 const Formula &F = LU.Formulae[L];
3593 // Use the immediate in the scaled register.
3594 if (F.ScaledReg == OrigReg) {
3595 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
3596 // Don't create 50 + reg(-50).
3597 if (F.referencesReg(SE.getSCEV(
3598 ConstantInt::get(IntTy, -(uint64_t)Offset))))
3601 NewF.BaseOffset = Offset;
3602 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3605 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
3607 // If the new scale is a constant in a register, and adding the constant
3608 // value to the immediate would produce a value closer to zero than the
3609 // immediate itself, then the formula isn't worthwhile.
3610 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
3611 if (C->getValue()->isNegative() !=
3612 (NewF.BaseOffset < 0) &&
3613 (C->getValue()->getValue().abs() * APInt(BitWidth, F.Scale))
3614 .ule(abs64(NewF.BaseOffset)))
3618 (void)InsertFormula(LU, LUIdx, NewF);
3620 // Use the immediate in a base register.
3621 for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
3622 const SCEV *BaseReg = F.BaseRegs[N];
3623 if (BaseReg != OrigReg)
3626 NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
3627 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
3628 LU.Kind, LU.AccessTy, NewF)) {
3629 if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
3632 NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
3634 NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
3636 // If the new formula has a constant in a register, and adding the
3637 // constant value to the immediate would produce a value closer to
3638 // zero than the immediate itself, then the formula isn't worthwhile.
3639 for (SmallVectorImpl<const SCEV *>::const_iterator
3640 J = NewF.BaseRegs.begin(), JE = NewF.BaseRegs.end();
3642 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*J))
3643 if ((C->getValue()->getValue() + NewF.BaseOffset).abs().slt(
3644 abs64(NewF.BaseOffset)) &&
3645 (C->getValue()->getValue() +
3646 NewF.BaseOffset).countTrailingZeros() >=
3647 countTrailingZeros<uint64_t>(NewF.BaseOffset))
3651 (void)InsertFormula(LU, LUIdx, NewF);
3660 /// GenerateAllReuseFormulae - Generate formulae for each use.
3662 LSRInstance::GenerateAllReuseFormulae() {
3663 // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
3664 // queries are more precise.
3665 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3666 LSRUse &LU = Uses[LUIdx];
3667 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3668 GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
3669 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3670 GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
3672 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3673 LSRUse &LU = Uses[LUIdx];
3674 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3675 GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
3676 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3677 GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
3678 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3679 GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
3680 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3681 GenerateScales(LU, LUIdx, LU.Formulae[i]);
3683 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3684 LSRUse &LU = Uses[LUIdx];
3685 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3686 GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
3689 GenerateCrossUseConstantOffsets();
3691 DEBUG(dbgs() << "\n"
3692 "After generating reuse formulae:\n";
3693 print_uses(dbgs()));
3696 /// If there are multiple formulae with the same set of registers used
3697 /// by other uses, pick the best one and delete the others.
3698 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
3699 DenseSet<const SCEV *> VisitedRegs;
3700 SmallPtrSet<const SCEV *, 16> Regs;
3701 SmallPtrSet<const SCEV *, 16> LoserRegs;
3703 bool ChangedFormulae = false;
3706 // Collect the best formula for each unique set of shared registers. This
3707 // is reset for each use.
3708 typedef DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>
3710 BestFormulaeTy BestFormulae;
3712 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3713 LSRUse &LU = Uses[LUIdx];
3714 DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs()); dbgs() << '\n');
3717 for (size_t FIdx = 0, NumForms = LU.Formulae.size();
3718 FIdx != NumForms; ++FIdx) {
3719 Formula &F = LU.Formulae[FIdx];
3721 // Some formulas are instant losers. For example, they may depend on
3722 // nonexistent AddRecs from other loops. These need to be filtered
3723 // immediately, otherwise heuristics could choose them over others leading
3724 // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
3725 // avoids the need to recompute this information across formulae using the
3726 // same bad AddRec. Passing LoserRegs is also essential unless we remove
3727 // the corresponding bad register from the Regs set.
3730 CostF.RateFormula(TTI, F, Regs, VisitedRegs, L, LU.Offsets, SE, DT, LU,
3732 if (CostF.isLoser()) {
3733 // During initial formula generation, undesirable formulae are generated
3734 // by uses within other loops that have some non-trivial address mode or
3735 // use the postinc form of the IV. LSR needs to provide these formulae
3736 // as the basis of rediscovering the desired formula that uses an AddRec
3737 // corresponding to the existing phi. Once all formulae have been
3738 // generated, these initial losers may be pruned.
3739 DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
3743 SmallVector<const SCEV *, 4> Key;
3744 for (SmallVectorImpl<const SCEV *>::const_iterator J = F.BaseRegs.begin(),
3745 JE = F.BaseRegs.end(); J != JE; ++J) {
3746 const SCEV *Reg = *J;
3747 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3751 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
3752 Key.push_back(F.ScaledReg);
3753 // Unstable sort by host order ok, because this is only used for
3755 std::sort(Key.begin(), Key.end());
3757 std::pair<BestFormulaeTy::const_iterator, bool> P =
3758 BestFormulae.insert(std::make_pair(Key, FIdx));
3762 Formula &Best = LU.Formulae[P.first->second];
3766 CostBest.RateFormula(TTI, Best, Regs, VisitedRegs, L, LU.Offsets, SE,
3768 if (CostF < CostBest)
3770 DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
3772 " in favor of formula "; Best.print(dbgs());
3776 ChangedFormulae = true;
3778 LU.DeleteFormula(F);
3784 // Now that we've filtered out some formulae, recompute the Regs set.
3786 LU.RecomputeRegs(LUIdx, RegUses);
3788 // Reset this to prepare for the next use.
3789 BestFormulae.clear();
3792 DEBUG(if (ChangedFormulae) {
3794 "After filtering out undesirable candidates:\n";
3799 // This is a rough guess that seems to work fairly well.
3800 static const size_t ComplexityLimit = UINT16_MAX;
3802 /// EstimateSearchSpaceComplexity - Estimate the worst-case number of
3803 /// solutions the solver might have to consider. It almost never considers
3804 /// this many solutions because it prune the search space, but the pruning
3805 /// isn't always sufficient.
3806 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
3808 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(),
3809 E = Uses.end(); I != E; ++I) {
3810 size_t FSize = I->Formulae.size();
3811 if (FSize >= ComplexityLimit) {
3812 Power = ComplexityLimit;
3816 if (Power >= ComplexityLimit)
3822 /// NarrowSearchSpaceByDetectingSupersets - When one formula uses a superset
3823 /// of the registers of another formula, it won't help reduce register
3824 /// pressure (though it may not necessarily hurt register pressure); remove
3825 /// it to simplify the system.
3826 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
3827 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
3828 DEBUG(dbgs() << "The search space is too complex.\n");
3830 DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
3831 "which use a superset of registers used by other "
3834 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3835 LSRUse &LU = Uses[LUIdx];
3837 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
3838 Formula &F = LU.Formulae[i];
3839 // Look for a formula with a constant or GV in a register. If the use
3840 // also has a formula with that same value in an immediate field,
3841 // delete the one that uses a register.
3842 for (SmallVectorImpl<const SCEV *>::const_iterator
3843 I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
3844 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
3846 NewF.BaseOffset += C->getValue()->getSExtValue();
3847 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
3848 (I - F.BaseRegs.begin()));
3849 if (LU.HasFormulaWithSameRegs(NewF)) {
3850 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
3851 LU.DeleteFormula(F);
3857 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
3858 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
3862 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
3863 (I - F.BaseRegs.begin()));
3864 if (LU.HasFormulaWithSameRegs(NewF)) {
3865 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
3867 LU.DeleteFormula(F);
3878 LU.RecomputeRegs(LUIdx, RegUses);
3881 DEBUG(dbgs() << "After pre-selection:\n";
3882 print_uses(dbgs()));
3886 /// NarrowSearchSpaceByCollapsingUnrolledCode - When there are many registers
3887 /// for expressions like A, A+1, A+2, etc., allocate a single register for
3889 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
3890 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
3893 DEBUG(dbgs() << "The search space is too complex.\n"
3894 "Narrowing the search space by assuming that uses separated "
3895 "by a constant offset will use the same registers.\n");
3897 // This is especially useful for unrolled loops.
3899 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3900 LSRUse &LU = Uses[LUIdx];
3901 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
3902 E = LU.Formulae.end(); I != E; ++I) {
3903 const Formula &F = *I;
3904 if (F.BaseOffset == 0 || F.Scale != 0)
3907 LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
3911 if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
3912 LU.Kind, LU.AccessTy))
3915 DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
3917 LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
3919 // Update the relocs to reference the new use.
3920 for (SmallVectorImpl<LSRFixup>::iterator I = Fixups.begin(),
3921 E = Fixups.end(); I != E; ++I) {
3922 LSRFixup &Fixup = *I;
3923 if (Fixup.LUIdx == LUIdx) {
3924 Fixup.LUIdx = LUThatHas - &Uses.front();
3925 Fixup.Offset += F.BaseOffset;
3926 // Add the new offset to LUThatHas' offset list.
3927 if (LUThatHas->Offsets.back() != Fixup.Offset) {
3928 LUThatHas->Offsets.push_back(Fixup.Offset);
3929 if (Fixup.Offset > LUThatHas->MaxOffset)
3930 LUThatHas->MaxOffset = Fixup.Offset;
3931 if (Fixup.Offset < LUThatHas->MinOffset)
3932 LUThatHas->MinOffset = Fixup.Offset;
3934 DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
3936 if (Fixup.LUIdx == NumUses-1)
3937 Fixup.LUIdx = LUIdx;
3940 // Delete formulae from the new use which are no longer legal.
3942 for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
3943 Formula &F = LUThatHas->Formulae[i];
3944 if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
3945 LUThatHas->Kind, LUThatHas->AccessTy, F)) {
3946 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
3948 LUThatHas->DeleteFormula(F);
3956 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
3958 // Delete the old use.
3959 DeleteUse(LU, LUIdx);
3966 DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
3969 /// NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters - Call
3970 /// FilterOutUndesirableDedicatedRegisters again, if necessary, now that
3971 /// we've done more filtering, as it may be able to find more formulae to
3973 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
3974 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
3975 DEBUG(dbgs() << "The search space is too complex.\n");
3977 DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
3978 "undesirable dedicated registers.\n");
3980 FilterOutUndesirableDedicatedRegisters();
3982 DEBUG(dbgs() << "After pre-selection:\n";
3983 print_uses(dbgs()));
3987 /// NarrowSearchSpaceByPickingWinnerRegs - Pick a register which seems likely
3988 /// to be profitable, and then in any use which has any reference to that
3989 /// register, delete all formulae which do not reference that register.
3990 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
3991 // With all other options exhausted, loop until the system is simple
3992 // enough to handle.
3993 SmallPtrSet<const SCEV *, 4> Taken;
3994 while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
3995 // Ok, we have too many of formulae on our hands to conveniently handle.
3996 // Use a rough heuristic to thin out the list.
3997 DEBUG(dbgs() << "The search space is too complex.\n");
3999 // Pick the register which is used by the most LSRUses, which is likely
4000 // to be a good reuse register candidate.
4001 const SCEV *Best = 0;
4002 unsigned BestNum = 0;
4003 for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
4005 const SCEV *Reg = *I;
4006 if (Taken.count(Reg))
4011 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4012 if (Count > BestNum) {
4019 DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4020 << " will yield profitable reuse.\n");
4023 // In any use with formulae which references this register, delete formulae
4024 // which don't reference it.
4025 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4026 LSRUse &LU = Uses[LUIdx];
4027 if (!LU.Regs.count(Best)) continue;
4030 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4031 Formula &F = LU.Formulae[i];
4032 if (!F.referencesReg(Best)) {
4033 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4034 LU.DeleteFormula(F);
4038 assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4044 LU.RecomputeRegs(LUIdx, RegUses);
4047 DEBUG(dbgs() << "After pre-selection:\n";
4048 print_uses(dbgs()));
4052 /// NarrowSearchSpaceUsingHeuristics - If there are an extraordinary number of
4053 /// formulae to choose from, use some rough heuristics to prune down the number
4054 /// of formulae. This keeps the main solver from taking an extraordinary amount
4055 /// of time in some worst-case scenarios.
4056 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4057 NarrowSearchSpaceByDetectingSupersets();
4058 NarrowSearchSpaceByCollapsingUnrolledCode();
4059 NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4060 NarrowSearchSpaceByPickingWinnerRegs();
4063 /// SolveRecurse - This is the recursive solver.
4064 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4066 SmallVectorImpl<const Formula *> &Workspace,
4067 const Cost &CurCost,
4068 const SmallPtrSet<const SCEV *, 16> &CurRegs,
4069 DenseSet<const SCEV *> &VisitedRegs) const {
4072 // - use more aggressive filtering
4073 // - sort the formula so that the most profitable solutions are found first
4074 // - sort the uses too
4076 // - don't compute a cost, and then compare. compare while computing a cost
4078 // - track register sets with SmallBitVector
4080 const LSRUse &LU = Uses[Workspace.size()];
4082 // If this use references any register that's already a part of the
4083 // in-progress solution, consider it a requirement that a formula must
4084 // reference that register in order to be considered. This prunes out
4085 // unprofitable searching.
4086 SmallSetVector<const SCEV *, 4> ReqRegs;
4087 for (SmallPtrSet<const SCEV *, 16>::const_iterator I = CurRegs.begin(),
4088 E = CurRegs.end(); I != E; ++I)
4089 if (LU.Regs.count(*I))
4092 SmallPtrSet<const SCEV *, 16> NewRegs;
4094 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
4095 E = LU.Formulae.end(); I != E; ++I) {
4096 const Formula &F = *I;
4098 // Ignore formulae which do not use any of the required registers.
4099 bool SatisfiedReqReg = true;
4100 for (SmallSetVector<const SCEV *, 4>::const_iterator J = ReqRegs.begin(),
4101 JE = ReqRegs.end(); J != JE; ++J) {
4102 const SCEV *Reg = *J;
4103 if ((!F.ScaledReg || F.ScaledReg != Reg) &&
4104 std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) ==
4106 SatisfiedReqReg = false;
4110 if (!SatisfiedReqReg) {
4111 // If none of the formulae satisfied the required registers, then we could
4112 // clear ReqRegs and try again. Currently, we simply give up in this case.
4116 // Evaluate the cost of the current formula. If it's already worse than
4117 // the current best, prune the search at that point.
4120 NewCost.RateFormula(TTI, F, NewRegs, VisitedRegs, L, LU.Offsets, SE, DT,
4122 if (NewCost < SolutionCost) {
4123 Workspace.push_back(&F);
4124 if (Workspace.size() != Uses.size()) {
4125 SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4126 NewRegs, VisitedRegs);
4127 if (F.getNumRegs() == 1 && Workspace.size() == 1)
4128 VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4130 DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4131 dbgs() << ".\n Regs:";
4132 for (SmallPtrSet<const SCEV *, 16>::const_iterator
4133 I = NewRegs.begin(), E = NewRegs.end(); I != E; ++I)
4134 dbgs() << ' ' << **I;
4137 SolutionCost = NewCost;
4138 Solution = Workspace;
4140 Workspace.pop_back();
4145 /// Solve - Choose one formula from each use. Return the results in the given
4146 /// Solution vector.
4147 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4148 SmallVector<const Formula *, 8> Workspace;
4150 SolutionCost.Loose();
4152 SmallPtrSet<const SCEV *, 16> CurRegs;
4153 DenseSet<const SCEV *> VisitedRegs;
4154 Workspace.reserve(Uses.size());
4156 // SolveRecurse does all the work.
4157 SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4158 CurRegs, VisitedRegs);
4159 if (Solution.empty()) {
4160 DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4164 // Ok, we've now made all our decisions.
4165 DEBUG(dbgs() << "\n"
4166 "The chosen solution requires "; SolutionCost.print(dbgs());
4168 for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4170 Uses[i].print(dbgs());
4173 Solution[i]->print(dbgs());
4177 assert(Solution.size() == Uses.size() && "Malformed solution!");
4180 /// HoistInsertPosition - Helper for AdjustInsertPositionForExpand. Climb up
4181 /// the dominator tree far as we can go while still being dominated by the
4182 /// input positions. This helps canonicalize the insert position, which
4183 /// encourages sharing.
4184 BasicBlock::iterator
4185 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
4186 const SmallVectorImpl<Instruction *> &Inputs)
4189 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
4190 unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
4193 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
4194 if (!Rung) return IP;
4195 Rung = Rung->getIDom();
4196 if (!Rung) return IP;
4197 IDom = Rung->getBlock();
4199 // Don't climb into a loop though.
4200 const Loop *IDomLoop = LI.getLoopFor(IDom);
4201 unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
4202 if (IDomDepth <= IPLoopDepth &&
4203 (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
4207 bool AllDominate = true;
4208 Instruction *BetterPos = 0;
4209 Instruction *Tentative = IDom->getTerminator();
4210 for (SmallVectorImpl<Instruction *>::const_iterator I = Inputs.begin(),
4211 E = Inputs.end(); I != E; ++I) {
4212 Instruction *Inst = *I;
4213 if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
4214 AllDominate = false;
4217 // Attempt to find an insert position in the middle of the block,
4218 // instead of at the end, so that it can be used for other expansions.
4219 if (IDom == Inst->getParent() &&
4220 (!BetterPos || !DT.dominates(Inst, BetterPos)))
4221 BetterPos = llvm::next(BasicBlock::iterator(Inst));
4234 /// AdjustInsertPositionForExpand - Determine an input position which will be
4235 /// dominated by the operands and which will dominate the result.
4236 BasicBlock::iterator
4237 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
4240 SCEVExpander &Rewriter) const {
4241 // Collect some instructions which must be dominated by the
4242 // expanding replacement. These must be dominated by any operands that
4243 // will be required in the expansion.
4244 SmallVector<Instruction *, 4> Inputs;
4245 if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
4246 Inputs.push_back(I);
4247 if (LU.Kind == LSRUse::ICmpZero)
4248 if (Instruction *I =
4249 dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
4250 Inputs.push_back(I);
4251 if (LF.PostIncLoops.count(L)) {
4252 if (LF.isUseFullyOutsideLoop(L))
4253 Inputs.push_back(L->getLoopLatch()->getTerminator());
4255 Inputs.push_back(IVIncInsertPos);
4257 // The expansion must also be dominated by the increment positions of any
4258 // loops it for which it is using post-inc mode.
4259 for (PostIncLoopSet::const_iterator I = LF.PostIncLoops.begin(),
4260 E = LF.PostIncLoops.end(); I != E; ++I) {
4261 const Loop *PIL = *I;
4262 if (PIL == L) continue;
4264 // Be dominated by the loop exit.
4265 SmallVector<BasicBlock *, 4> ExitingBlocks;
4266 PIL->getExitingBlocks(ExitingBlocks);
4267 if (!ExitingBlocks.empty()) {
4268 BasicBlock *BB = ExitingBlocks[0];
4269 for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
4270 BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
4271 Inputs.push_back(BB->getTerminator());
4275 assert(!isa<PHINode>(LowestIP) && !isa<LandingPadInst>(LowestIP)
4276 && !isa<DbgInfoIntrinsic>(LowestIP) &&
4277 "Insertion point must be a normal instruction");
4279 // Then, climb up the immediate dominator tree as far as we can go while
4280 // still being dominated by the input positions.
4281 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
4283 // Don't insert instructions before PHI nodes.
4284 while (isa<PHINode>(IP)) ++IP;
4286 // Ignore landingpad instructions.
4287 while (isa<LandingPadInst>(IP)) ++IP;
4289 // Ignore debug intrinsics.
4290 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
4292 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
4293 // IP consistent across expansions and allows the previously inserted
4294 // instructions to be reused by subsequent expansion.
4295 while (Rewriter.isInsertedInstruction(IP) && IP != LowestIP) ++IP;
4300 /// Expand - Emit instructions for the leading candidate expression for this
4301 /// LSRUse (this is called "expanding").
4302 Value *LSRInstance::Expand(const LSRFixup &LF,
4304 BasicBlock::iterator IP,
4305 SCEVExpander &Rewriter,
4306 SmallVectorImpl<WeakVH> &DeadInsts) const {
4307 const LSRUse &LU = Uses[LF.LUIdx];
4309 // Determine an input position which will be dominated by the operands and
4310 // which will dominate the result.
4311 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
4313 // Inform the Rewriter if we have a post-increment use, so that it can
4314 // perform an advantageous expansion.
4315 Rewriter.setPostInc(LF.PostIncLoops);
4317 // This is the type that the user actually needs.
4318 Type *OpTy = LF.OperandValToReplace->getType();
4319 // This will be the type that we'll initially expand to.
4320 Type *Ty = F.getType();
4322 // No type known; just expand directly to the ultimate type.
4324 else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
4325 // Expand directly to the ultimate type if it's the right size.
4327 // This is the type to do integer arithmetic in.
4328 Type *IntTy = SE.getEffectiveSCEVType(Ty);
4330 // Build up a list of operands to add together to form the full base.
4331 SmallVector<const SCEV *, 8> Ops;
4333 // Expand the BaseRegs portion.
4334 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
4335 E = F.BaseRegs.end(); I != E; ++I) {
4336 const SCEV *Reg = *I;
4337 assert(!Reg->isZero() && "Zero allocated in a base register!");
4339 // If we're expanding for a post-inc user, make the post-inc adjustment.
4340 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4341 Reg = TransformForPostIncUse(Denormalize, Reg,
4342 LF.UserInst, LF.OperandValToReplace,
4345 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, 0, IP)));
4348 // Expand the ScaledReg portion.
4349 Value *ICmpScaledV = 0;
4351 const SCEV *ScaledS = F.ScaledReg;
4353 // If we're expanding for a post-inc user, make the post-inc adjustment.
4354 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4355 ScaledS = TransformForPostIncUse(Denormalize, ScaledS,
4356 LF.UserInst, LF.OperandValToReplace,
4359 if (LU.Kind == LSRUse::ICmpZero) {
4360 // An interesting way of "folding" with an icmp is to use a negated
4361 // scale, which we'll implement by inserting it into the other operand
4363 assert(F.Scale == -1 &&
4364 "The only scale supported by ICmpZero uses is -1!");
4365 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, 0, IP);
4367 // Otherwise just expand the scaled register and an explicit scale,
4368 // which is expected to be matched as part of the address.
4370 // Flush the operand list to suppress SCEVExpander hoisting address modes.
4371 if (!Ops.empty() && LU.Kind == LSRUse::Address) {
4372 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4374 Ops.push_back(SE.getUnknown(FullV));
4376 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, 0, IP));
4377 ScaledS = SE.getMulExpr(ScaledS,
4378 SE.getConstant(ScaledS->getType(), F.Scale));
4379 Ops.push_back(ScaledS);
4383 // Expand the GV portion.
4385 // Flush the operand list to suppress SCEVExpander hoisting.
4387 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4389 Ops.push_back(SE.getUnknown(FullV));
4391 Ops.push_back(SE.getUnknown(F.BaseGV));
4394 // Flush the operand list to suppress SCEVExpander hoisting of both folded and
4395 // unfolded offsets. LSR assumes they both live next to their uses.
4397 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4399 Ops.push_back(SE.getUnknown(FullV));
4402 // Expand the immediate portion.
4403 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
4405 if (LU.Kind == LSRUse::ICmpZero) {
4406 // The other interesting way of "folding" with an ICmpZero is to use a
4407 // negated immediate.
4409 ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
4411 Ops.push_back(SE.getUnknown(ICmpScaledV));
4412 ICmpScaledV = ConstantInt::get(IntTy, Offset);
4415 // Just add the immediate values. These again are expected to be matched
4416 // as part of the address.
4417 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
4421 // Expand the unfolded offset portion.
4422 int64_t UnfoldedOffset = F.UnfoldedOffset;
4423 if (UnfoldedOffset != 0) {
4424 // Just add the immediate values.
4425 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy,
4429 // Emit instructions summing all the operands.
4430 const SCEV *FullS = Ops.empty() ?
4431 SE.getConstant(IntTy, 0) :
4433 Value *FullV = Rewriter.expandCodeFor(FullS, Ty, IP);
4435 // We're done expanding now, so reset the rewriter.
4436 Rewriter.clearPostInc();
4438 // An ICmpZero Formula represents an ICmp which we're handling as a
4439 // comparison against zero. Now that we've expanded an expression for that
4440 // form, update the ICmp's other operand.
4441 if (LU.Kind == LSRUse::ICmpZero) {
4442 ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
4443 DeadInsts.push_back(CI->getOperand(1));
4444 assert(!F.BaseGV && "ICmp does not support folding a global value and "
4445 "a scale at the same time!");
4446 if (F.Scale == -1) {
4447 if (ICmpScaledV->getType() != OpTy) {
4449 CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
4451 ICmpScaledV, OpTy, "tmp", CI);
4454 CI->setOperand(1, ICmpScaledV);
4456 assert(F.Scale == 0 &&
4457 "ICmp does not support folding a global value and "
4458 "a scale at the same time!");
4459 Constant *C = ConstantInt::getSigned(SE.getEffectiveSCEVType(OpTy),
4461 if (C->getType() != OpTy)
4462 C = ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
4466 CI->setOperand(1, C);
4473 /// RewriteForPHI - Helper for Rewrite. PHI nodes are special because the use
4474 /// of their operands effectively happens in their predecessor blocks, so the
4475 /// expression may need to be expanded in multiple places.
4476 void LSRInstance::RewriteForPHI(PHINode *PN,
4479 SCEVExpander &Rewriter,
4480 SmallVectorImpl<WeakVH> &DeadInsts,
4482 DenseMap<BasicBlock *, Value *> Inserted;
4483 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
4484 if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
4485 BasicBlock *BB = PN->getIncomingBlock(i);
4487 // If this is a critical edge, split the edge so that we do not insert
4488 // the code on all predecessor/successor paths. We do this unless this
4489 // is the canonical backedge for this loop, which complicates post-inc
4491 if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
4492 !isa<IndirectBrInst>(BB->getTerminator())) {
4493 BasicBlock *Parent = PN->getParent();
4494 Loop *PNLoop = LI.getLoopFor(Parent);
4495 if (!PNLoop || Parent != PNLoop->getHeader()) {
4496 // Split the critical edge.
4497 BasicBlock *NewBB = 0;
4498 if (!Parent->isLandingPad()) {
4499 NewBB = SplitCriticalEdge(BB, Parent, P,
4500 /*MergeIdenticalEdges=*/true,
4501 /*DontDeleteUselessPhis=*/true);
4503 SmallVector<BasicBlock*, 2> NewBBs;
4504 SplitLandingPadPredecessors(Parent, BB, "", "", P, NewBBs);
4507 // If NewBB==NULL, then SplitCriticalEdge refused to split because all
4508 // phi predecessors are identical. The simple thing to do is skip
4509 // splitting in this case rather than complicate the API.
4511 // If PN is outside of the loop and BB is in the loop, we want to
4512 // move the block to be immediately before the PHI block, not
4513 // immediately after BB.
4514 if (L->contains(BB) && !L->contains(PN))
4515 NewBB->moveBefore(PN->getParent());
4517 // Splitting the edge can reduce the number of PHI entries we have.
4518 e = PN->getNumIncomingValues();
4520 i = PN->getBasicBlockIndex(BB);
4525 std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
4526 Inserted.insert(std::make_pair(BB, static_cast<Value *>(0)));
4528 PN->setIncomingValue(i, Pair.first->second);
4530 Value *FullV = Expand(LF, F, BB->getTerminator(), Rewriter, DeadInsts);
4532 // If this is reuse-by-noop-cast, insert the noop cast.
4533 Type *OpTy = LF.OperandValToReplace->getType();
4534 if (FullV->getType() != OpTy)
4536 CastInst::Create(CastInst::getCastOpcode(FullV, false,
4538 FullV, LF.OperandValToReplace->getType(),
4539 "tmp", BB->getTerminator());
4541 PN->setIncomingValue(i, FullV);
4542 Pair.first->second = FullV;
4547 /// Rewrite - Emit instructions for the leading candidate expression for this
4548 /// LSRUse (this is called "expanding"), and update the UserInst to reference
4549 /// the newly expanded value.
4550 void LSRInstance::Rewrite(const LSRFixup &LF,
4552 SCEVExpander &Rewriter,
4553 SmallVectorImpl<WeakVH> &DeadInsts,
4555 // First, find an insertion point that dominates UserInst. For PHI nodes,
4556 // find the nearest block which dominates all the relevant uses.
4557 if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
4558 RewriteForPHI(PN, LF, F, Rewriter, DeadInsts, P);
4560 Value *FullV = Expand(LF, F, LF.UserInst, Rewriter, DeadInsts);
4562 // If this is reuse-by-noop-cast, insert the noop cast.
4563 Type *OpTy = LF.OperandValToReplace->getType();
4564 if (FullV->getType() != OpTy) {
4566 CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
4567 FullV, OpTy, "tmp", LF.UserInst);
4571 // Update the user. ICmpZero is handled specially here (for now) because
4572 // Expand may have updated one of the operands of the icmp already, and
4573 // its new value may happen to be equal to LF.OperandValToReplace, in
4574 // which case doing replaceUsesOfWith leads to replacing both operands
4575 // with the same value. TODO: Reorganize this.
4576 if (Uses[LF.LUIdx].Kind == LSRUse::ICmpZero)
4577 LF.UserInst->setOperand(0, FullV);
4579 LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
4582 DeadInsts.push_back(LF.OperandValToReplace);
4585 /// ImplementSolution - Rewrite all the fixup locations with new values,
4586 /// following the chosen solution.
4588 LSRInstance::ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
4590 // Keep track of instructions we may have made dead, so that
4591 // we can remove them after we are done working.
4592 SmallVector<WeakVH, 16> DeadInsts;
4594 SCEVExpander Rewriter(SE, "lsr");
4596 Rewriter.setDebugType(DEBUG_TYPE);
4598 Rewriter.disableCanonicalMode();
4599 Rewriter.enableLSRMode();
4600 Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
4602 // Mark phi nodes that terminate chains so the expander tries to reuse them.
4603 for (SmallVectorImpl<IVChain>::const_iterator ChainI = IVChainVec.begin(),
4604 ChainE = IVChainVec.end(); ChainI != ChainE; ++ChainI) {
4605 if (PHINode *PN = dyn_cast<PHINode>(ChainI->tailUserInst()))
4606 Rewriter.setChainedPhi(PN);
4609 // Expand the new value definitions and update the users.
4610 for (SmallVectorImpl<LSRFixup>::const_iterator I = Fixups.begin(),
4611 E = Fixups.end(); I != E; ++I) {
4612 const LSRFixup &Fixup = *I;
4614 Rewrite(Fixup, *Solution[Fixup.LUIdx], Rewriter, DeadInsts, P);
4619 for (SmallVectorImpl<IVChain>::const_iterator ChainI = IVChainVec.begin(),
4620 ChainE = IVChainVec.end(); ChainI != ChainE; ++ChainI) {
4621 GenerateIVChain(*ChainI, Rewriter, DeadInsts);
4624 // Clean up after ourselves. This must be done before deleting any
4628 Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
4631 LSRInstance::LSRInstance(Loop *L, Pass *P)
4632 : IU(P->getAnalysis<IVUsers>()), SE(P->getAnalysis<ScalarEvolution>()),
4633 DT(P->getAnalysis<DominatorTree>()), LI(P->getAnalysis<LoopInfo>()),
4634 TTI(P->getAnalysis<TargetTransformInfo>()), L(L), Changed(false),
4636 // If LoopSimplify form is not available, stay out of trouble.
4637 if (!L->isLoopSimplifyForm())
4640 // If there's no interesting work to be done, bail early.
4641 if (IU.empty()) return;
4643 // If there's too much analysis to be done, bail early. We won't be able to
4644 // model the problem anyway.
4645 unsigned NumUsers = 0;
4646 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
4647 if (++NumUsers > MaxIVUsers) {
4648 DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << *L
4655 // All dominating loops must have preheaders, or SCEVExpander may not be able
4656 // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
4658 // IVUsers analysis should only create users that are dominated by simple loop
4659 // headers. Since this loop should dominate all of its users, its user list
4660 // should be empty if this loop itself is not within a simple loop nest.
4661 for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
4662 Rung; Rung = Rung->getIDom()) {
4663 BasicBlock *BB = Rung->getBlock();
4664 const Loop *DomLoop = LI.getLoopFor(BB);
4665 if (DomLoop && DomLoop->getHeader() == BB) {
4666 assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
4671 DEBUG(dbgs() << "\nLSR on loop ";
4672 WriteAsOperand(dbgs(), L->getHeader(), /*PrintType=*/false);
4675 // First, perform some low-level loop optimizations.
4677 OptimizeLoopTermCond();
4679 // If loop preparation eliminates all interesting IV users, bail.
4680 if (IU.empty()) return;
4682 // Skip nested loops until we can model them better with formulae.
4684 DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
4688 // Start collecting data and preparing for the solver.
4690 CollectInterestingTypesAndFactors();
4691 CollectFixupsAndInitialFormulae();
4692 CollectLoopInvariantFixupsAndFormulae();
4694 assert(!Uses.empty() && "IVUsers reported at least one use");
4695 DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
4696 print_uses(dbgs()));
4698 // Now use the reuse data to generate a bunch of interesting ways
4699 // to formulate the values needed for the uses.
4700 GenerateAllReuseFormulae();
4702 FilterOutUndesirableDedicatedRegisters();
4703 NarrowSearchSpaceUsingHeuristics();
4705 SmallVector<const Formula *, 8> Solution;
4708 // Release memory that is no longer needed.
4713 if (Solution.empty())
4717 // Formulae should be legal.
4718 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(), E = Uses.end();
4720 const LSRUse &LU = *I;
4721 for (SmallVectorImpl<Formula>::const_iterator J = LU.Formulae.begin(),
4722 JE = LU.Formulae.end();
4724 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4725 *J) && "Illegal formula generated!");
4729 // Now that we've decided what we want, make it so.
4730 ImplementSolution(Solution, P);
4733 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
4734 if (Factors.empty() && Types.empty()) return;
4736 OS << "LSR has identified the following interesting factors and types: ";
4739 for (SmallSetVector<int64_t, 8>::const_iterator
4740 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
4741 if (!First) OS << ", ";
4746 for (SmallSetVector<Type *, 4>::const_iterator
4747 I = Types.begin(), E = Types.end(); I != E; ++I) {
4748 if (!First) OS << ", ";
4750 OS << '(' << **I << ')';
4755 void LSRInstance::print_fixups(raw_ostream &OS) const {
4756 OS << "LSR is examining the following fixup sites:\n";
4757 for (SmallVectorImpl<LSRFixup>::const_iterator I = Fixups.begin(),
4758 E = Fixups.end(); I != E; ++I) {
4765 void LSRInstance::print_uses(raw_ostream &OS) const {
4766 OS << "LSR is examining the following uses:\n";
4767 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(),
4768 E = Uses.end(); I != E; ++I) {
4769 const LSRUse &LU = *I;
4773 for (SmallVectorImpl<Formula>::const_iterator J = LU.Formulae.begin(),
4774 JE = LU.Formulae.end(); J != JE; ++J) {
4782 void LSRInstance::print(raw_ostream &OS) const {
4783 print_factors_and_types(OS);
4788 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4789 void LSRInstance::dump() const {
4790 print(errs()); errs() << '\n';
4796 class LoopStrengthReduce : public LoopPass {
4798 static char ID; // Pass ID, replacement for typeid
4799 LoopStrengthReduce();
4802 bool runOnLoop(Loop *L, LPPassManager &LPM);
4803 void getAnalysisUsage(AnalysisUsage &AU) const;
4808 char LoopStrengthReduce::ID = 0;
4809 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
4810 "Loop Strength Reduction", false, false)
4811 INITIALIZE_AG_DEPENDENCY(TargetTransformInfo)
4812 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
4813 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
4814 INITIALIZE_PASS_DEPENDENCY(IVUsers)
4815 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
4816 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
4817 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
4818 "Loop Strength Reduction", false, false)
4821 Pass *llvm::createLoopStrengthReducePass() {
4822 return new LoopStrengthReduce();
4825 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
4826 initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
4829 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
4830 // We split critical edges, so we change the CFG. However, we do update
4831 // many analyses if they are around.
4832 AU.addPreservedID(LoopSimplifyID);
4834 AU.addRequired<LoopInfo>();
4835 AU.addPreserved<LoopInfo>();
4836 AU.addRequiredID(LoopSimplifyID);
4837 AU.addRequired<DominatorTree>();
4838 AU.addPreserved<DominatorTree>();
4839 AU.addRequired<ScalarEvolution>();
4840 AU.addPreserved<ScalarEvolution>();
4841 // Requiring LoopSimplify a second time here prevents IVUsers from running
4842 // twice, since LoopSimplify was invalidated by running ScalarEvolution.
4843 AU.addRequiredID(LoopSimplifyID);
4844 AU.addRequired<IVUsers>();
4845 AU.addPreserved<IVUsers>();
4846 AU.addRequired<TargetTransformInfo>();
4849 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
4850 bool Changed = false;
4852 // Run the main LSR transformation.
4853 Changed |= LSRInstance(L, this).getChanged();
4855 // Remove any extra phis created by processing inner loops.
4856 Changed |= DeleteDeadPHIs(L->getHeader());
4857 if (EnablePhiElim && L->isLoopSimplifyForm()) {
4858 SmallVector<WeakVH, 16> DeadInsts;
4859 SCEVExpander Rewriter(getAnalysis<ScalarEvolution>(), "lsr");
4861 Rewriter.setDebugType(DEBUG_TYPE);
4863 unsigned numFolded =
4864 Rewriter.replaceCongruentIVs(L, &getAnalysis<DominatorTree>(),
4866 &getAnalysis<TargetTransformInfo>());
4869 DeleteTriviallyDeadInstructions(DeadInsts);
4870 DeleteDeadPHIs(L->getHeader());