1 //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Instruction format superclass
12 //===----------------------------------------------------------------------===//
13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
17 let Namespace = "XCore";
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
20 let AsmString = asmstr;
21 let Pattern = pattern;
23 field bits<32> SoftFail = 0;
26 // XCore pseudo instructions format
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
28 : InstXCore<0, outs, ins, asmstr, pattern> {
32 //===----------------------------------------------------------------------===//
33 // Instruction formats
34 //===----------------------------------------------------------------------===//
36 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
37 : InstXCore<2, outs, ins, asmstr, pattern> {
40 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
41 : InstXCore<4, outs, ins, asmstr, pattern> {
44 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
45 : InstXCore<2, outs, ins, asmstr, pattern> {
48 class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
49 : InstXCore<4, outs, ins, asmstr, pattern> {
52 class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
53 : InstXCore<2, outs, ins, asmstr, pattern> {
56 class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
57 : InstXCore<4, outs, ins, asmstr, pattern> {
60 class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
61 : InstXCore<2, outs, ins, asmstr, pattern> {
64 class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
65 : InstXCore<4, outs, ins, asmstr, pattern> {
68 class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
69 : InstXCore<2, outs, ins, asmstr, pattern> {
72 class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
73 : InstXCore<4, outs, ins, asmstr, pattern> {
76 class _F2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
77 : InstXCore<2, outs, ins, asmstr, pattern> {
78 let Inst{15-11} = opc{5-1};
80 let DecoderMethod = "Decode2RInstruction";
83 // 2R with first operand as both a source and a destination.
84 class _F2RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,
85 list<dag> pattern> : _F2R<opc, outs, ins, asmstr, pattern> {
86 let DecoderMethod = "Decode2RSrcDstInstruction";
89 // Same as 2R with last two operands swapped
90 class _FR2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
91 : _F2R<opc, outs, ins, asmstr, pattern> {
92 let DecoderMethod = "DecodeR2RInstruction";
95 class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
96 : InstXCore<2, outs, ins, asmstr, pattern> {
99 class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
100 : InstXCore<4, outs, ins, asmstr, pattern> {
103 class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
104 : InstXCore<2, outs, ins, asmstr, pattern> {
107 let Inst{15-11} = opc{5-1};
108 let Inst{10-5} = 0b111111;
109 let Inst{4} = opc{0};
113 class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
114 : InstXCore<2, outs, ins, asmstr, pattern> {
115 let Inst{15-11} = opc{9-5};
116 let Inst{10-5} = 0b111111;
117 let Inst{4-0} = opc{4-0};
120 class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
121 : InstXCore<4, outs, ins, asmstr, pattern> {
124 class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
125 : InstXCore<4, outs, ins, asmstr, pattern> {
128 class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
129 : InstXCore<4, outs, ins, asmstr, pattern> {