1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
49 switch (TheTriple.getOS()) {
51 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
56 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
58 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack);
62 extern "C" void LLVMInitializeX86Target() {
63 // Register the target.
64 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
65 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
67 // Register the target asm info.
68 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
69 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
71 // Register the code emitter.
72 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
73 createX86_32MCCodeEmitter);
74 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
75 createX86_64MCCodeEmitter);
77 // Register the asm backend.
78 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
79 createX86_32AsmBackend);
80 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
81 createX86_64AsmBackend);
83 // Register the object streamer.
84 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
86 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
91 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
92 const std::string &FS)
93 : X86TargetMachine(T, TT, FS, false),
94 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
95 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
96 (getSubtargetImpl()->isTargetCygMing() ||
97 getSubtargetImpl()->isTargetWindows()) ?
98 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
99 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
107 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
108 const std::string &FS)
109 : X86TargetMachine(T, TT, FS, true),
110 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
117 /// X86TargetMachine ctor - Create an X86 target.
119 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
120 const std::string &FS, bool is64Bit)
121 : LLVMTargetMachine(T, TT),
122 Subtarget(TT, FS, is64Bit),
123 FrameLowering(*this, Subtarget),
124 ELFWriterInfo(is64Bit, true) {
125 DefRelocModel = getRelocationModel();
127 // If no relocation model was picked, default as appropriate for the target.
128 if (getRelocationModel() == Reloc::Default) {
129 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
130 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
131 // use static relocation model by default.
132 if (Subtarget.isTargetDarwin()) {
133 if (Subtarget.is64Bit())
134 setRelocationModel(Reloc::PIC_);
136 setRelocationModel(Reloc::DynamicNoPIC);
137 } else if (Subtarget.isTargetWin64())
138 setRelocationModel(Reloc::PIC_);
140 setRelocationModel(Reloc::Static);
143 assert(getRelocationModel() != Reloc::Default &&
144 "Relocation mode not picked");
146 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
147 // is defined as a model for code which may be used in static or dynamic
148 // executables but not necessarily a shared library. On X86-32 we just
149 // compile in -static mode, in x86-64 we use PIC.
150 if (getRelocationModel() == Reloc::DynamicNoPIC) {
152 setRelocationModel(Reloc::PIC_);
153 else if (!Subtarget.isTargetDarwin())
154 setRelocationModel(Reloc::Static);
157 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
158 // the Mach-O file format doesn't support it.
159 if (getRelocationModel() == Reloc::Static &&
160 Subtarget.isTargetDarwin() &&
162 setRelocationModel(Reloc::PIC_);
164 // Determine the PICStyle based on the target selected.
165 if (getRelocationModel() == Reloc::Static) {
166 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
167 Subtarget.setPICStyle(PICStyles::None);
168 } else if (Subtarget.is64Bit()) {
169 // PIC in 64 bit mode is always rip-rel.
170 Subtarget.setPICStyle(PICStyles::RIPRel);
171 } else if (Subtarget.isTargetCygMing()) {
172 Subtarget.setPICStyle(PICStyles::None);
173 } else if (Subtarget.isTargetDarwin()) {
174 if (getRelocationModel() == Reloc::PIC_)
175 Subtarget.setPICStyle(PICStyles::StubPIC);
177 assert(getRelocationModel() == Reloc::DynamicNoPIC);
178 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
180 } else if (Subtarget.isTargetELF()) {
181 Subtarget.setPICStyle(PICStyles::GOT);
184 // Finally, if we have "none" as our PIC style, force to static mode.
185 if (Subtarget.getPICStyle() == PICStyles::None)
186 setRelocationModel(Reloc::Static);
189 //===----------------------------------------------------------------------===//
190 // Pass Pipeline Configuration
191 //===----------------------------------------------------------------------===//
193 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
194 CodeGenOpt::Level OptLevel) {
195 // Install an instruction selector.
196 PM.add(createX86ISelDag(*this, OptLevel));
198 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
199 if (!Subtarget.is64Bit())
200 PM.add(createGlobalBaseRegPass());
205 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
206 CodeGenOpt::Level OptLevel) {
207 PM.add(createX86MaxStackAlignmentHeuristicPass());
208 return false; // -print-machineinstr shouldn't print after this.
211 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
212 CodeGenOpt::Level OptLevel) {
213 PM.add(createX86FloatingPointStackifierPass());
214 return true; // -print-machineinstr should print after this.
217 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
218 CodeGenOpt::Level OptLevel) {
219 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
220 PM.add(createSSEDomainFixPass());
226 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
227 CodeGenOpt::Level OptLevel,
228 JITCodeEmitter &JCE) {
229 // FIXME: Move this to TargetJITInfo!
230 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
231 if (DefRelocModel == Reloc::Default &&
232 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
233 setRelocationModel(Reloc::Static);
234 Subtarget.setPICStyle(PICStyles::None);
238 PM.add(createX86JITCodeEmitterPass(*this, JCE));
243 void X86TargetMachine::setCodeModelForStatic() {
245 if (getCodeModel() != CodeModel::Default) return;
247 // For static codegen, if we're not already set, use Small codegen.
248 setCodeModel(CodeModel::Small);
252 void X86TargetMachine::setCodeModelForJIT() {
254 if (getCodeModel() != CodeModel::Default) return;
256 // 64-bit JIT places everything in the same buffer except external functions.
257 if (Subtarget.is64Bit())
258 setCodeModel(CodeModel::Large);
260 setCodeModel(CodeModel::Small);