1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/IntrinsicLowering.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "Support/CommandLine.h"
25 #include "Support/Statistic.h"
29 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
30 cl::desc("Use the 'simple' X86 instruction selector"));
31 cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
32 cl::desc("Disable the ssa-based peephole optimizer "
33 "(defaults to disabled)"));
34 cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
35 cl::desc("Disable the X86 asm printer, for use "
36 "when profiling the code generator."));
38 // Register the target.
39 RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
42 unsigned X86TargetMachine::getJITMatchQuality() {
43 #if defined(i386) || defined(__i386__) || defined(__x86__)
50 unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) {
51 if (M.getEndianness() == Module::LittleEndian &&
52 M.getPointerSize() == Module::Pointer32)
53 return 10; // Direct match
54 else if (M.getEndianness() != Module::AnyEndianness ||
55 M.getPointerSize() != Module::AnyPointerSize)
56 return 0; // Match for some other target
58 return getJITMatchQuality()/2;
61 /// X86TargetMachine ctor - Create an ILP32 architecture model
63 X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *IL)
64 : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
65 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, -4),
70 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT
71 // does to emit statically compiled machine code.
72 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
74 // FIXME: Implement efficient support for garbage collection intrinsics.
75 PM.add(createLowerGCPass());
77 // FIXME: Implement the invoke/unwind instructions!
78 PM.add(createLowerInvokePass());
80 // FIXME: Implement the switch instruction in the instruction selector!
81 PM.add(createLowerSwitchPass());
83 // Make sure that no unreachable blocks are instruction selected.
84 PM.add(createUnreachableBlockEliminationPass());
87 PM.add(createX86SimpleInstructionSelector(*this));
89 PM.add(createX86PatternInstructionSelector(*this));
91 // Run optional SSA-based machine code optimizations next...
93 PM.add(createX86SSAPeepholeOptimizerPass());
95 // Print the instruction selected machine code...
97 PM.add(createMachineFunctionPrinterPass(&std::cerr));
99 // Perform register allocation to convert to a concrete x86 representation
100 PM.add(createRegisterAllocator());
102 if (PrintMachineCode)
103 PM.add(createMachineFunctionPrinterPass(&std::cerr));
105 PM.add(createX86FloatingPointStackifierPass());
107 if (PrintMachineCode)
108 PM.add(createMachineFunctionPrinterPass(&std::cerr));
110 // Insert prolog/epilog code. Eliminate abstract frame index references...
111 PM.add(createPrologEpilogCodeInserter());
113 PM.add(createX86PeepholeOptimizerPass());
115 if (PrintMachineCode) // Print the register-allocated code
116 PM.add(createX86CodePrinterPass(std::cerr, *this));
119 PM.add(createX86CodePrinterPass(Out, *this));
121 // Delete machine code for this function
122 PM.add(createMachineCodeDeleter());
124 return false; // success!
127 /// addPassesToJITCompile - Add passes to the specified pass manager to
128 /// implement a fast dynamic compiler for this target. Return true if this is
129 /// not supported for this target.
131 void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
132 // FIXME: Implement efficient support for garbage collection intrinsics.
133 PM.add(createLowerGCPass());
135 // FIXME: Implement the invoke/unwind instructions!
136 PM.add(createLowerInvokePass());
138 // FIXME: Implement the switch instruction in the instruction selector!
139 PM.add(createLowerSwitchPass());
141 // Make sure that no unreachable blocks are instruction selected.
142 PM.add(createUnreachableBlockEliminationPass());
145 PM.add(createX86SimpleInstructionSelector(TM));
147 PM.add(createX86PatternInstructionSelector(TM));
149 // Run optional SSA-based machine code optimizations next...
151 PM.add(createX86SSAPeepholeOptimizerPass());
153 // FIXME: Add SSA based peephole optimizer here.
155 // Print the instruction selected machine code...
156 if (PrintMachineCode)
157 PM.add(createMachineFunctionPrinterPass(&std::cerr));
159 // Perform register allocation to convert to a concrete x86 representation
160 PM.add(createRegisterAllocator());
162 if (PrintMachineCode)
163 PM.add(createMachineFunctionPrinterPass(&std::cerr));
165 PM.add(createX86FloatingPointStackifierPass());
167 if (PrintMachineCode)
168 PM.add(createMachineFunctionPrinterPass(&std::cerr));
170 // Insert prolog/epilog code. Eliminate abstract frame index references...
171 PM.add(createPrologEpilogCodeInserter());
173 PM.add(createX86PeepholeOptimizerPass());
175 if (PrintMachineCode) // Print the register-allocated code
176 PM.add(createX86CodePrinterPass(std::cerr, TM));