1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/IR/Function.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Target/TargetOptions.h"
25 extern "C" void LLVMInitializeX86Target() {
26 // Register the target.
27 RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
28 RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
31 void X86TargetMachine::anchor() { }
33 /// X86TargetMachine ctor - Create an X86 target.
35 X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
36 StringRef FS, const TargetOptions &Options,
37 Reloc::Model RM, CodeModel::Model CM,
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
40 Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
41 // default to hard float ABI
42 if (Options.FloatABIType == FloatABI::Default)
43 this->Options.FloatABIType = FloatABI::Hard;
45 // Windows stack unwinder gets confused when execution flow "falls through"
46 // after a call to 'noreturn' function.
47 // To prevent that, we emit a trap for 'unreachable' IR instructions.
48 // (which on X86, happens to be the 'ud2' instruction)
49 if (Subtarget.isTargetWin64())
50 this->Options.TrapUnreachable = true;
56 X86TargetMachine::getSubtargetImpl(const Function &F) const {
57 AttributeSet FnAttrs = F.getAttributes();
59 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
61 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
63 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
64 ? CPUAttr.getValueAsString().str()
66 std::string FS = !FSAttr.hasAttribute(Attribute::None)
67 ? FSAttr.getValueAsString().str()
70 // FIXME: This is related to the code below to reset the target options,
71 // we need to know whether or not the soft float flag is set on the
72 // function before we can generate a subtarget. We also need to use
73 // it as a key for the subtarget since that can be the only difference
74 // between two functions.
76 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "use-soft-float");
77 bool SoftFloat = !SFAttr.hasAttribute(Attribute::None)
78 ? SFAttr.getValueAsString() == "true"
79 : Options.UseSoftFloat;
81 auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true"
82 : "use-soft-float=false")];
84 // This needs to be done before we create a new subtarget since any
85 // creation will depend on the TM and the code generation flags on the
86 // function that reside in TargetOptions.
87 resetTargetOptions(F);
88 I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
89 Options.StackAlignmentOverride);
94 //===----------------------------------------------------------------------===//
95 // Command line options for x86
96 //===----------------------------------------------------------------------===//
98 UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
99 cl::desc("Minimize AVX to SSE transition penalty"),
102 //===----------------------------------------------------------------------===//
103 // X86 Analysis Pass Setup
104 //===----------------------------------------------------------------------===//
106 void X86TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
107 // Add first the target-independent BasicTTI pass, then our X86 pass. This
108 // allows the X86 pass to delegate to the target independent layer when
110 PM.add(createBasicTargetTransformInfoPass(this));
111 PM.add(createX86TargetTransformInfoPass(this));
115 //===----------------------------------------------------------------------===//
116 // Pass Pipeline Configuration
117 //===----------------------------------------------------------------------===//
120 /// X86 Code Generator Pass Configuration Options.
121 class X86PassConfig : public TargetPassConfig {
123 X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM)
124 : TargetPassConfig(TM, PM) {}
126 X86TargetMachine &getX86TargetMachine() const {
127 return getTM<X86TargetMachine>();
130 const X86Subtarget &getX86Subtarget() const {
131 return *getX86TargetMachine().getSubtargetImpl();
134 void addIRPasses() override;
135 bool addInstSelector() override;
136 bool addILPOpts() override;
137 bool addPreRegAlloc() override;
138 bool addPostRegAlloc() override;
139 bool addPreEmitPass() override;
143 TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) {
144 return new X86PassConfig(this, PM);
147 void X86PassConfig::addIRPasses() {
148 addPass(createAtomicExpandPass(&getX86TargetMachine()));
150 TargetPassConfig::addIRPasses();
153 bool X86PassConfig::addInstSelector() {
154 // Install an instruction selector.
155 addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
157 // For ELF, cleanup any local-dynamic TLS accesses.
158 if (getX86Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None)
159 addPass(createCleanupLocalDynamicTLSPass());
161 addPass(createX86GlobalBaseRegPass());
166 bool X86PassConfig::addILPOpts() {
167 addPass(&EarlyIfConverterID);
171 bool X86PassConfig::addPreRegAlloc() {
172 return false; // -print-machineinstr shouldn't print after this.
175 bool X86PassConfig::addPostRegAlloc() {
176 addPass(createX86FloatingPointStackifierPass());
177 return true; // -print-machineinstr should print after this.
180 bool X86PassConfig::addPreEmitPass() {
181 bool ShouldPrint = false;
182 if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2()) {
183 addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
188 addPass(createX86IssueVZeroUpperPass());
192 if (getOptLevel() != CodeGenOpt::None) {
193 addPass(createX86PadShortFunctions());
194 addPass(createX86FixupLEAs());