1 //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the X86 specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86SUBTARGET_H
15 #define X86SUBTARGET_H
17 #include "llvm/ADT/Triple.h"
18 #include "llvm/Target/TargetSubtargetInfo.h"
19 #include "llvm/CallingConv.h"
22 #define GET_SUBTARGETINFO_HEADER
23 #include "X86GenSubtargetInfo.inc"
30 /// PICStyles - The X86 backend supports a number of different styles of PIC.
34 StubPIC, // Used on i386-darwin in -fPIC mode.
35 StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
36 GOT, // Used on many 32-bit unices in -fPIC mode.
37 RIPRel, // Used on X86-64 when not in -static mode.
38 None // Set when in -static mode (not PIC or DynamicNoPIC mode).
42 class X86Subtarget : public X86GenSubtargetInfo {
45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
49 NoThreeDNow, ThreeDNow, ThreeDNowA
52 /// PICStyle - Which PIC style to use
54 PICStyles::Style PICStyle;
56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
58 X86SSEEnum X86SSELevel;
60 /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
62 X863DNowEnum X863DNowLevel;
64 /// HasCMov - True if this processor has conditional move instructions
65 /// (generally pentium pro+).
68 /// HasX86_64 - True if the processor supports X86-64 instructions.
72 /// HasPOPCNT - True if the processor supports POPCNT.
75 /// HasSSE4A - True if the processor supports SSE4A instructions.
78 /// HasAVX - Target has AVX instructions
81 /// HasAES - Target has AES instructions
84 /// HasCLMUL - Target has carry-less multiplication
87 /// HasFMA3 - Target has 3-operand fused multiply-add
90 /// HasFMA4 - Target has 4-operand fused multiply-add
93 /// HasMOVBE - True if the processor has the MOVBE instruction.
96 /// HasRDRAND - True if the processor has the RDRAND instruction.
99 /// HasF16C - Processor has 16-bit floating point conversion instructions.
102 /// HasLZCNT - Processor has LZCNT instruction.
105 /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
108 /// IsUAMemFast - True if unaligned memory access is fast.
111 /// HasVectorUAMem - True if SIMD operations can have unaligned memory
112 /// operands. This may require setting a feature bit in the processor.
115 /// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction;
116 /// this is true for most x86-64 chips, but not the first AMD chips.
119 /// stackAlignment - The minimum alignment known to hold of the stack frame on
120 /// entry to the function and which must be maintained by every function.
121 unsigned stackAlignment;
123 /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
125 unsigned MaxInlineSizeThreshold;
127 /// TargetTriple - What processor and OS we're targeting.
131 /// In64BitMode - True if compiling for 64-bit, false for 32-bit.
134 /// InNaClMode - True if compiling for Native Client target.
139 /// This constructor initializes the data members to match that
140 /// of the specified triple.
142 X86Subtarget(const std::string &TT, const std::string &CPU,
143 const std::string &FS,
144 unsigned StackAlignOverride, bool is64Bit);
146 /// getStackAlignment - Returns the minimum alignment known to hold of the
147 /// stack frame on entry to the function and which must be maintained by every
148 /// function for this subtarget.
149 unsigned getStackAlignment() const { return stackAlignment; }
151 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
152 /// that still makes it profitable to inline the call.
153 unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
155 /// ParseSubtargetFeatures - Parses features string setting specified
156 /// subtarget options. Definition of function is auto generated by tblgen.
157 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
159 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
161 void AutoDetectSubtargetFeatures();
163 bool is64Bit() const { return In64BitMode; }
165 PICStyles::Style getPICStyle() const { return PICStyle; }
166 void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
168 bool hasCMov() const { return HasCMov; }
169 bool hasMMX() const { return X86SSELevel >= MMX; }
170 bool hasSSE1() const { return X86SSELevel >= SSE1; }
171 bool hasSSE2() const { return X86SSELevel >= SSE2; }
172 bool hasSSE3() const { return X86SSELevel >= SSE3; }
173 bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
174 bool hasSSE41() const { return X86SSELevel >= SSE41; }
175 bool hasSSE42() const { return X86SSELevel >= SSE42; }
176 bool hasSSE4A() const { return HasSSE4A; }
177 bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
178 bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
179 bool hasPOPCNT() const { return HasPOPCNT; }
180 bool hasAVX() const { return HasAVX; }
181 bool hasXMM() const { return hasSSE1() || hasAVX(); }
182 bool hasXMMInt() const { return hasSSE2() || hasAVX(); }
183 bool hasAES() const { return HasAES; }
184 bool hasCLMUL() const { return HasCLMUL; }
185 bool hasFMA3() const { return HasFMA3; }
186 bool hasFMA4() const { return HasFMA4; }
187 bool hasMOVBE() const { return HasMOVBE; }
188 bool hasRDRAND() const { return HasRDRAND; }
189 bool hasF16C() const { return HasF16C; }
190 bool hasLZCNT() const { return HasLZCNT; }
191 bool isBTMemSlow() const { return IsBTMemSlow; }
192 bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
193 bool hasVectorUAMem() const { return HasVectorUAMem; }
194 bool hasCmpxchg16b() const { return HasCmpxchg16b; }
196 const Triple &getTargetTriple() const { return TargetTriple; }
198 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
199 bool isTargetFreeBSD() const {
200 return TargetTriple.getOS() == Triple::FreeBSD;
202 bool isTargetSolaris() const {
203 return TargetTriple.getOS() == Triple::Solaris;
206 // ELF is a reasonably sane default and the only other X86 targets we
207 // support are Darwin and Windows. Just use "not those".
208 bool isTargetELF() const {
209 return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
211 bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
212 bool isTargetNaCl() const {
213 return TargetTriple.getOS() == Triple::NativeClient;
215 bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); }
216 bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); }
218 bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
219 bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
220 bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
221 bool isTargetCygMing() const {
222 return isTargetMingw() || isTargetCygwin();
225 /// isTargetCOFF - Return true if this is any COFF/Windows target variant.
226 bool isTargetCOFF() const {
227 return isTargetMingw() || isTargetCygwin() || isTargetWindows();
230 bool isTargetWin64() const {
231 // FIXME: x86_64-cygwin has not been released yet.
232 return In64BitMode && (isTargetCygMing() || isTargetWindows());
235 bool isTargetEnvMacho() const {
236 return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO);
239 bool isTargetWin32() const {
240 return !In64BitMode && (isTargetMingw() || isTargetWindows());
243 bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
244 bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
245 bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
247 bool isPICStyleStubPIC() const {
248 return PICStyle == PICStyles::StubPIC;
251 bool isPICStyleStubNoDynamic() const {
252 return PICStyle == PICStyles::StubDynamicNoPIC;
254 bool isPICStyleStubAny() const {
255 return PICStyle == PICStyles::StubDynamicNoPIC ||
256 PICStyle == PICStyles::StubPIC; }
258 /// ClassifyGlobalReference - Classify a global variable reference for the
259 /// current subtarget according to how we should reference it in a non-pcrel
261 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
262 const TargetMachine &TM)const;
264 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
265 /// current subtarget according to how we should reference it in a non-pcrel
267 unsigned char ClassifyBlockAddressReference() const;
269 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
270 /// to immediate address.
271 bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
273 /// This function returns the name of a function which has an interface
274 /// like the non-standard bzero function, if such a function exists on
275 /// the current subtarget and it is considered prefereable over
276 /// memset with zero passed as the second argument. Otherwise it
278 const char *getBZeroEntry() const;
280 /// getSpecialAddressLatency - For targets where it is beneficial to
281 /// backschedule instructions that compute addresses, return a value
282 /// indicating the number of scheduling cycles of backscheduling that
283 /// should be attempted.
284 unsigned getSpecialAddressLatency() const;
287 } // End llvm namespace