1 //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the X86 specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86SUBTARGET_H
15 #define X86SUBTARGET_H
17 #include "llvm/ADT/Triple.h"
18 #include "llvm/Target/TargetSubtargetInfo.h"
19 #include "llvm/CallingConv.h"
22 #define GET_SUBTARGETINFO_HEADER
23 #include "X86GenSubtargetInfo.inc"
30 /// PICStyles - The X86 backend supports a number of different styles of PIC.
34 StubPIC, // Used on i386-darwin in -fPIC mode.
35 StubDynamicNoPIC, // Used on i386-darwin in -mdynamic-no-pic mode.
36 GOT, // Used on many 32-bit unices in -fPIC mode.
37 RIPRel, // Used on X86-64 when not in -static mode.
38 None // Set when in -static mode (not PIC or DynamicNoPIC mode).
42 class X86Subtarget : public X86GenSubtargetInfo {
45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
49 NoThreeDNow, ThreeDNow, ThreeDNowA
52 /// PICStyle - Which PIC style to use
54 PICStyles::Style PICStyle;
56 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
58 X86SSEEnum X86SSELevel;
60 /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
62 X863DNowEnum X863DNowLevel;
64 /// HasCMov - True if this processor has conditional move instructions
65 /// (generally pentium pro+).
68 /// HasX86_64 - True if the processor supports X86-64 instructions.
72 /// HasPOPCNT - True if the processor supports POPCNT.
75 /// HasSSE4A - True if the processor supports SSE4A instructions.
78 /// HasAVX - Target has AVX instructions
81 /// HasAES - Target has AES instructions
84 /// HasCLMUL - Target has carry-less multiplication
87 /// HasFMA3 - Target has 3-operand fused multiply-add
90 /// HasFMA4 - Target has 4-operand fused multiply-add
93 /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
96 /// IsUAMemFast - True if unaligned memory access is fast.
99 /// HasVectorUAMem - True if SIMD operations can have unaligned memory
100 /// operands. This may require setting a feature bit in the processor.
103 /// stackAlignment - The minimum alignment known to hold of the stack frame on
104 /// entry to the function and which must be maintained by every function.
105 unsigned stackAlignment;
107 /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
109 unsigned MaxInlineSizeThreshold;
111 /// TargetTriple - What processor and OS we're targeting.
115 /// Is64Bit - True if the processor supports 64-bit instructions and
116 /// pointer size is 64 bit.
121 /// This constructor initializes the data members to match that
122 /// of the specified triple.
124 X86Subtarget(const std::string &TT, const std::string &CPU,
125 const std::string &FS, bool is64Bit,
126 unsigned StackAlignOverride);
128 /// getStackAlignment - Returns the minimum alignment known to hold of the
129 /// stack frame on entry to the function and which must be maintained by every
130 /// function for this subtarget.
131 unsigned getStackAlignment() const { return stackAlignment; }
133 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
134 /// that still makes it profitable to inline the call.
135 unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; }
137 /// ParseSubtargetFeatures - Parses features string setting specified
138 /// subtarget options. Definition of function is auto generated by tblgen.
139 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
141 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
143 void AutoDetectSubtargetFeatures();
145 bool is64Bit() const { return Is64Bit; }
147 PICStyles::Style getPICStyle() const { return PICStyle; }
148 void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
150 bool hasCMov() const { return HasCMov; }
151 bool hasMMX() const { return X86SSELevel >= MMX; }
152 bool hasSSE1() const { return X86SSELevel >= SSE1; }
153 bool hasSSE2() const { return X86SSELevel >= SSE2; }
154 bool hasSSE3() const { return X86SSELevel >= SSE3; }
155 bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
156 bool hasSSE41() const { return X86SSELevel >= SSE41; }
157 bool hasSSE42() const { return X86SSELevel >= SSE42; }
158 bool hasSSE4A() const { return HasSSE4A; }
159 bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
160 bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
161 bool hasPOPCNT() const { return HasPOPCNT; }
162 bool hasAVX() const { return HasAVX; }
163 bool hasXMM() const { return hasSSE1() || hasAVX(); }
164 bool hasXMMInt() const { return hasSSE2() || hasAVX(); }
165 bool hasAES() const { return HasAES; }
166 bool hasCLMUL() const { return HasCLMUL; }
167 bool hasFMA3() const { return HasFMA3; }
168 bool hasFMA4() const { return HasFMA4; }
169 bool isBTMemSlow() const { return IsBTMemSlow; }
170 bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
171 bool hasVectorUAMem() const { return HasVectorUAMem; }
173 const Triple &getTargetTriple() const { return TargetTriple; }
175 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
176 bool isTargetFreeBSD() const {
177 return TargetTriple.getOS() == Triple::FreeBSD;
179 bool isTargetSolaris() const {
180 return TargetTriple.getOS() == Triple::Solaris;
183 // ELF is a reasonably sane default and the only other X86 targets we
184 // support are Darwin and Windows. Just use "not those".
185 bool isTargetELF() const {
186 return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
188 bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
190 bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
191 bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }
192 bool isTargetCygwin() const { return TargetTriple.getOS() == Triple::Cygwin; }
193 bool isTargetCygMing() const {
194 return isTargetMingw() || isTargetCygwin();
197 /// isTargetCOFF - Return true if this is any COFF/Windows target variant.
198 bool isTargetCOFF() const {
199 return isTargetMingw() || isTargetCygwin() || isTargetWindows();
202 bool isTargetWin64() const {
203 return Is64Bit && (isTargetMingw() || isTargetWindows());
206 bool isTargetEnvMacho() const {
207 return isTargetDarwin() || (TargetTriple.getEnvironment() == Triple::MachO);
210 bool isTargetWin32() const {
211 return !Is64Bit && (isTargetMingw() || isTargetWindows());
214 bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
215 bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
216 bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
218 bool isPICStyleStubPIC() const {
219 return PICStyle == PICStyles::StubPIC;
222 bool isPICStyleStubNoDynamic() const {
223 return PICStyle == PICStyles::StubDynamicNoPIC;
225 bool isPICStyleStubAny() const {
226 return PICStyle == PICStyles::StubDynamicNoPIC ||
227 PICStyle == PICStyles::StubPIC; }
229 /// ClassifyGlobalReference - Classify a global variable reference for the
230 /// current subtarget according to how we should reference it in a non-pcrel
232 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
233 const TargetMachine &TM)const;
235 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
236 /// current subtarget according to how we should reference it in a non-pcrel
238 unsigned char ClassifyBlockAddressReference() const;
240 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
241 /// to immediate address.
242 bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
244 /// This function returns the name of a function which has an interface
245 /// like the non-standard bzero function, if such a function exists on
246 /// the current subtarget and it is considered prefereable over
247 /// memset with zero passed as the second argument. Otherwise it
249 const char *getBZeroEntry() const;
251 /// getSpecialAddressLatency - For targets where it is beneficial to
252 /// backschedule instructions that compute addresses, return a value
253 /// indicating the number of scheduling cycles of backscheduling that
254 /// should be attempted.
255 unsigned getSpecialAddressLatency() const;
258 } // End llvm namespace