1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "X86GenSubtarget.inc"
18 #include "llvm/Module.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetOptions.h"
29 static cl::opt<X86Subtarget::AsmWriterFlavorTy>
30 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
31 cl::desc("Choose style of code to emit from X86 backend:"),
33 clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
34 clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
37 /// ClassifyGlobalReference - Classify a global variable reference for the
38 /// current subtarget according to how we should reference it in a non-pcrel
40 unsigned char X86Subtarget::
41 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
42 // DLLImport only exists on windows, it is implemented as a load from a
44 if (GV->hasDLLImportLinkage())
45 return X86II::MO_DLLIMPORT;
47 // GV with ghost linkage (in JIT lazy compilation mode) do not require an
48 // extra load from stub.
49 bool isDecl = GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode();
51 // X86-64 in PIC mode.
52 if (isPICStyleRIPRel()) {
53 // Large model never uses stubs.
54 if (TM.getCodeModel() == CodeModel::Large)
55 return X86II::MO_NO_FLAG;
57 if (isTargetDarwin()) {
58 // If symbol visibility is hidden, the extra load is not needed if
59 // target is x86-64 or the symbol is definitely defined in the current
61 if (GV->hasDefaultVisibility() &&
62 (isDecl || GV->isWeakForLinker()))
63 return X86II::MO_GOTPCREL;
65 assert(isTargetELF() && "Unknown rip-relative target");
67 // Extra load is needed for all externally visible.
68 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
69 return X86II::MO_GOTPCREL;
72 return X86II::MO_NO_FLAG;
75 if (isPICStyleGOT()) { // 32-bit ELF targets.
76 // Extra load is needed for all externally visible.
77 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
78 return X86II::MO_GOTOFF;
82 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
83 // Determine whether we have a stub reference and/or whether the reference
84 // is relative to the PIC base or not.
86 // If this is a strong reference to a definition, it is definitely not
88 if (!isDecl && !GV->isWeakForLinker())
89 return X86II::MO_PIC_BASE_OFFSET;
91 // Unless we have a symbol with hidden visibility, we have to go through a
92 // normal $non_lazy_ptr stub because this symbol might be resolved late.
93 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
94 return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
96 // If symbol visibility is hidden, we have a stub for common symbol
97 // references and external declarations.
98 if (isDecl || GV->hasCommonLinkage()) {
99 // Hidden $non_lazy_ptr reference.
100 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
103 // Otherwise, no stub.
104 return X86II::MO_PIC_BASE_OFFSET;
107 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
108 // Determine whether we have a stub reference.
110 // If this is a strong reference to a definition, it is definitely not
112 if (!isDecl && !GV->isWeakForLinker())
113 return X86II::MO_NO_FLAG;
115 // Unless we have a symbol with hidden visibility, we have to go through a
116 // normal $non_lazy_ptr stub because this symbol might be resolved late.
117 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
118 return X86II::MO_DARWIN_NONLAZY;
120 // If symbol visibility is hidden, we have a stub for common symbol
121 // references and external declarations.
122 if (isDecl || GV->hasCommonLinkage()) {
123 // Hidden $non_lazy_ptr reference.
124 return X86II::MO_DARWIN_HIDDEN_NONLAZY;
127 // Otherwise, no stub.
128 return X86II::MO_NO_FLAG;
131 // Direct static reference to global.
132 return X86II::MO_NO_FLAG;
136 /// getBZeroEntry - This function returns the name of a function which has an
137 /// interface like the non-standard bzero function, if such a function exists on
138 /// the current subtarget and it is considered prefereable over memset with zero
139 /// passed as the second argument. Otherwise it returns null.
140 const char *X86Subtarget::getBZeroEntry() const {
141 // Darwin 10 has a __bzero entry point for this purpose.
142 if (getDarwinVers() >= 10)
148 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
149 /// to immediate address.
150 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
153 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
156 /// getSpecialAddressLatency - For targets where it is beneficial to
157 /// backschedule instructions that compute addresses, return a value
158 /// indicating the number of scheduling cycles of backscheduling that
159 /// should be attempted.
160 unsigned X86Subtarget::getSpecialAddressLatency() const {
161 // For x86 out-of-order targets, back-schedule address computations so
162 // that loads and stores aren't blocked.
163 // This value was chosen arbitrarily.
167 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
168 /// specified arguments. If we can't run cpuid on the host, return true.
169 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
170 unsigned *rECX, unsigned *rEDX) {
171 #if defined(__x86_64__) || defined(_M_AMD64)
172 #if defined(__GNUC__)
173 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
174 asm ("movq\t%%rbx, %%rsi\n\t"
176 "xchgq\t%%rbx, %%rsi\n\t"
183 #elif defined(_MSC_VER)
185 __cpuid(registers, value);
186 *rEAX = registers[0];
187 *rEBX = registers[1];
188 *rECX = registers[2];
189 *rEDX = registers[3];
192 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
193 #if defined(__GNUC__)
194 asm ("movl\t%%ebx, %%esi\n\t"
196 "xchgl\t%%ebx, %%esi\n\t"
203 #elif defined(_MSC_VER)
208 mov dword ptr [esi],eax
210 mov dword ptr [esi],ebx
212 mov dword ptr [esi],ecx
214 mov dword ptr [esi],edx
222 static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
223 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
224 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
225 if (Family == 6 || Family == 0xf) {
227 // Examine extended family ID if family ID is F.
228 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
229 // Examine extended model ID if family ID is 6 or F.
230 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
234 void X86Subtarget::AutoDetectSubtargetFeatures() {
235 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
241 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
244 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
246 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
247 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
248 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
249 if (ECX & 0x1) X86SSELevel = SSE3;
250 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
251 if ((ECX >> 19) & 0x1) X86SSELevel = SSE41;
252 if ((ECX >> 20) & 0x1) X86SSELevel = SSE42;
254 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
255 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
257 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
258 HasAVX = ((ECX >> 28) & 0x1);
260 if (IsIntel || IsAMD) {
261 // Determine if bit test memory instructions are slow.
264 DetectFamilyModel(EAX, Family, Model);
265 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13);
267 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
268 HasX86_64 = (EDX >> 29) & 0x1;
269 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
270 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1);
274 static const char *GetCurrentX86CPU() {
275 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
276 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
280 DetectFamilyModel(EAX, Family, Model);
282 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
283 bool Em64T = (EDX >> 29) & 0x1;
284 bool HasSSE3 = (ECX & 0x1);
291 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
292 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
300 case 4: return "pentium-mmx";
301 default: return "pentium";
305 case 1: return "pentiumpro";
308 case 6: return "pentium2";
312 case 11: return "pentium3";
314 case 13: return "pentium-m";
315 case 14: return "yonah";
317 case 22: // Celeron M 540
319 case 23: // 45nm: Penryn , Wolfdale, Yorkfield (XE)
321 default: return "i686";
327 case 6: // same as 4, but 65nm
328 return (Em64T) ? "nocona" : "prescott";
334 return (Em64T) ? "x86-64" : "pentium4";
341 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
342 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
343 // appears to be no way to generate the wide variety of AMD-specific targets
344 // from the information returned from CPUID.
352 case 8: return "k6-2";
354 case 13: return "k6-3";
355 default: return "pentium";
359 case 4: return "athlon-tbird";
362 case 8: return "athlon-mp";
363 case 10: return "athlon-xp";
364 default: return "athlon";
371 case 1: return "opteron";
372 case 5: return "athlon-fx"; // also opteron
373 default: return "athlon64";
386 X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
387 : AsmFlavor(AsmWriterFlavor)
388 , PICStyle(PICStyles::None)
389 , X86SSELevel(NoMMXSSE)
390 , X863DNowLevel(NoThreeDNow)
400 // FIXME: this is a known good value for Yonah. How about others?
401 , MaxInlineSizeThreshold(128)
403 , TargetType(isELF) { // Default to ELF unless otherwise specified.
405 // default to hard float ABI
406 if (FloatABIType == FloatABI::Default)
407 FloatABIType = FloatABI::Hard;
409 // Determine default and user specified characteristics
411 // If feature string is not empty, parse features string.
412 std::string CPU = GetCurrentX86CPU();
413 ParseSubtargetFeatures(FS, CPU);
414 // All X86-64 CPUs also have SSE2, however user might request no SSE via
415 // -mattr, so don't force SSELevel here.
417 // Otherwise, use CPUID to auto-detect feature set.
418 AutoDetectSubtargetFeatures();
419 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.
420 if (Is64Bit && X86SSELevel < SSE2)
424 // If requesting codegen for X86-64, make sure that 64-bit features
429 DOUT << "Subtarget features: SSELevel " << X86SSELevel
430 << ", 3DNowLevel " << X863DNowLevel
431 << ", 64bit " << HasX86_64 << "\n";
432 assert((!Is64Bit || HasX86_64) &&
433 "64-bit code requested on a subtarget that doesn't support it!");
435 // Set the boolean corresponding to the current target triple, or the default
436 // if one cannot be determined, to true.
437 const std::string& TT = M.getTargetTriple();
438 if (TT.length() > 5) {
440 if ((Pos = TT.find("-darwin")) != std::string::npos) {
441 TargetType = isDarwin;
443 // Compute the darwin version number.
444 if (isdigit(TT[Pos+7]))
445 DarwinVers = atoi(&TT[Pos+7]);
447 DarwinVers = 8; // Minimum supported darwin is Tiger.
448 } else if (TT.find("linux") != std::string::npos) {
449 // Linux doesn't imply ELF, but we don't currently support anything else.
452 } else if (TT.find("cygwin") != std::string::npos) {
453 TargetType = isCygwin;
454 } else if (TT.find("mingw") != std::string::npos) {
455 TargetType = isMingw;
456 } else if (TT.find("win32") != std::string::npos) {
457 TargetType = isWindows;
458 } else if (TT.find("windows") != std::string::npos) {
459 TargetType = isWindows;
461 else if (TT.find("-cl") != std::string::npos) {
462 TargetType = isDarwin;
465 } else if (TT.empty()) {
466 #if defined(__CYGWIN__)
467 TargetType = isCygwin;
468 #elif defined(__MINGW32__) || defined(__MINGW64__)
469 TargetType = isMingw;
470 #elif defined(__APPLE__)
471 TargetType = isDarwin;
472 #if __APPLE_CC__ > 5400
473 DarwinVers = 9; // GCC 5400+ is Leopard.
475 DarwinVers = 8; // Minimum supported darwin is Tiger.
478 #elif defined(_WIN32) || defined(_WIN64)
479 TargetType = isWindows;
480 #elif defined(__linux__)
481 // Linux doesn't imply ELF, but we don't currently support anything else.
487 // If the asm syntax hasn't been overridden on the command line, use whatever
489 if (AsmFlavor == X86Subtarget::Unset) {
490 AsmFlavor = (TargetType == isWindows)
491 ? X86Subtarget::Intel : X86Subtarget::ATT;
494 // Stack alignment is 16 bytes on Darwin (both 32 and 64 bit) and for all 64
496 if (TargetType == isDarwin || Is64Bit)
500 stackAlignment = StackAlignment;