1 //===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "X86GenSubtarget.inc"
18 #include "llvm/GlobalValue.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetOptions.h"
30 static cl::opt<X86Subtarget::AsmWriterFlavorTy>
31 AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
32 cl::desc("Choose style of code to emit from X86 backend:"),
34 clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
35 clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
38 /// ClassifyGlobalReference - Classify a global variable reference for the
39 /// current subtarget according to how we should reference it in a non-pcrel
41 unsigned char X86Subtarget::
42 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
43 // DLLImport only exists on windows, it is implemented as a load from a
45 if (GV->hasDLLImportLinkage())
46 return X86II::MO_DLLIMPORT;
48 // GV with ghost linkage (in JIT lazy compilation mode) do not require an
49 // extra load from stub.
50 bool isDecl = GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode();
52 // X86-64 in PIC mode.
53 if (isPICStyleRIPRel()) {
54 // Large model never uses stubs.
55 if (TM.getCodeModel() == CodeModel::Large)
56 return X86II::MO_NO_FLAG;
58 if (isTargetDarwin()) {
59 // If symbol visibility is hidden, the extra load is not needed if
60 // target is x86-64 or the symbol is definitely defined in the current
62 if (GV->hasDefaultVisibility() &&
63 (isDecl || GV->isWeakForLinker()))
64 return X86II::MO_GOTPCREL;
66 assert(isTargetELF() && "Unknown rip-relative target");
68 // Extra load is needed for all externally visible.
69 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
70 return X86II::MO_GOTPCREL;
73 return X86II::MO_NO_FLAG;
76 if (isPICStyleGOT()) { // 32-bit ELF targets.
77 // Extra load is needed for all externally visible.
78 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
79 return X86II::MO_GOTOFF;
83 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
84 // Determine whether we have a stub reference and/or whether the reference
85 // is relative to the PIC base or not.
87 // If this is a strong reference to a definition, it is definitely not
89 if (!isDecl && !GV->isWeakForLinker())
90 return X86II::MO_PIC_BASE_OFFSET;
92 // Unless we have a symbol with hidden visibility, we have to go through a
93 // normal $non_lazy_ptr stub because this symbol might be resolved late.
94 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
95 return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
97 // If symbol visibility is hidden, we have a stub for common symbol
98 // references and external declarations.
99 if (isDecl || GV->hasCommonLinkage()) {
100 // Hidden $non_lazy_ptr reference.
101 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
104 // Otherwise, no stub.
105 return X86II::MO_PIC_BASE_OFFSET;
108 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
109 // Determine whether we have a stub reference.
111 // If this is a strong reference to a definition, it is definitely not
113 if (!isDecl && !GV->isWeakForLinker())
114 return X86II::MO_NO_FLAG;
116 // Unless we have a symbol with hidden visibility, we have to go through a
117 // normal $non_lazy_ptr stub because this symbol might be resolved late.
118 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
119 return X86II::MO_DARWIN_NONLAZY;
121 // If symbol visibility is hidden, we have a stub for common symbol
122 // references and external declarations.
123 if (isDecl || GV->hasCommonLinkage()) {
124 // Hidden $non_lazy_ptr reference.
125 return X86II::MO_DARWIN_HIDDEN_NONLAZY;
128 // Otherwise, no stub.
129 return X86II::MO_NO_FLAG;
132 // Direct static reference to global.
133 return X86II::MO_NO_FLAG;
137 /// getBZeroEntry - This function returns the name of a function which has an
138 /// interface like the non-standard bzero function, if such a function exists on
139 /// the current subtarget and it is considered prefereable over memset with zero
140 /// passed as the second argument. Otherwise it returns null.
141 const char *X86Subtarget::getBZeroEntry() const {
142 // Darwin 10 has a __bzero entry point for this purpose.
143 if (getDarwinVers() >= 10)
149 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
150 /// to immediate address.
151 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
154 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
157 /// getSpecialAddressLatency - For targets where it is beneficial to
158 /// backschedule instructions that compute addresses, return a value
159 /// indicating the number of scheduling cycles of backscheduling that
160 /// should be attempted.
161 unsigned X86Subtarget::getSpecialAddressLatency() const {
162 // For x86 out-of-order targets, back-schedule address computations so
163 // that loads and stores aren't blocked.
164 // This value was chosen arbitrarily.
168 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
169 /// specified arguments. If we can't run cpuid on the host, return true.
170 bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
171 unsigned *rECX, unsigned *rEDX) {
172 #if defined(__x86_64__) || defined(_M_AMD64)
173 #if defined(__GNUC__)
174 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
175 asm ("movq\t%%rbx, %%rsi\n\t"
177 "xchgq\t%%rbx, %%rsi\n\t"
184 #elif defined(_MSC_VER)
186 __cpuid(registers, value);
187 *rEAX = registers[0];
188 *rEBX = registers[1];
189 *rECX = registers[2];
190 *rEDX = registers[3];
193 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
194 #if defined(__GNUC__)
195 asm ("movl\t%%ebx, %%esi\n\t"
197 "xchgl\t%%ebx, %%esi\n\t"
204 #elif defined(_MSC_VER)
209 mov dword ptr [esi],eax
211 mov dword ptr [esi],ebx
213 mov dword ptr [esi],ecx
215 mov dword ptr [esi],edx
223 static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
224 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
225 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
226 if (Family == 6 || Family == 0xf) {
228 // Examine extended family ID if family ID is F.
229 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
230 // Examine extended model ID if family ID is 6 or F.
231 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
235 void X86Subtarget::AutoDetectSubtargetFeatures() {
236 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
242 if (X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
245 X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
247 if ((EDX >> 23) & 0x1) X86SSELevel = MMX;
248 if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
249 if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
250 if (ECX & 0x1) X86SSELevel = SSE3;
251 if ((ECX >> 9) & 0x1) X86SSELevel = SSSE3;
252 if ((ECX >> 19) & 0x1) X86SSELevel = SSE41;
253 if ((ECX >> 20) & 0x1) X86SSELevel = SSE42;
255 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
256 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
258 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
259 HasAVX = ((ECX >> 28) & 0x1);
261 if (IsIntel || IsAMD) {
262 // Determine if bit test memory instructions are slow.
265 DetectFamilyModel(EAX, Family, Model);
266 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13);
268 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
269 HasX86_64 = (EDX >> 29) & 0x1;
270 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
271 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1);
275 static const char *GetCurrentX86CPU() {
276 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
277 if (X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
281 DetectFamilyModel(EAX, Family, Model);
283 X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
284 bool Em64T = (EDX >> 29) & 0x1;
285 bool HasSSE3 = (ECX & 0x1);
292 X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
293 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
301 case 4: return "pentium-mmx";
302 default: return "pentium";
306 case 1: return "pentiumpro";
309 case 6: return "pentium2";
313 case 11: return "pentium3";
315 case 13: return "pentium-m";
316 case 14: return "yonah";
318 case 22: // Celeron M 540
320 case 23: // 45nm: Penryn , Wolfdale, Yorkfield (XE)
322 default: return "i686";
328 case 6: // same as 4, but 65nm
329 return (Em64T) ? "nocona" : "prescott";
335 return (Em64T) ? "x86-64" : "pentium4";
342 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
343 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
344 // appears to be no way to generate the wide variety of AMD-specific targets
345 // from the information returned from CPUID.
353 case 8: return "k6-2";
355 case 13: return "k6-3";
356 default: return "pentium";
360 case 4: return "athlon-tbird";
363 case 8: return "athlon-mp";
364 case 10: return "athlon-xp";
365 default: return "athlon";
372 case 1: return "opteron";
373 case 5: return "athlon-fx"; // also opteron
374 default: return "athlon64";
387 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
389 : AsmFlavor(AsmWriterFlavor)
390 , PICStyle(PICStyles::None)
391 , X86SSELevel(NoMMXSSE)
392 , X863DNowLevel(NoThreeDNow)
402 // FIXME: this is a known good value for Yonah. How about others?
403 , MaxInlineSizeThreshold(128)
405 , TargetType(isELF) { // Default to ELF unless otherwise specified.
407 // default to hard float ABI
408 if (FloatABIType == FloatABI::Default)
409 FloatABIType = FloatABI::Hard;
411 // Determine default and user specified characteristics
413 // If feature string is not empty, parse features string.
414 std::string CPU = GetCurrentX86CPU();
415 ParseSubtargetFeatures(FS, CPU);
416 // All X86-64 CPUs also have SSE2, however user might request no SSE via
417 // -mattr, so don't force SSELevel here.
419 // Otherwise, use CPUID to auto-detect feature set.
420 AutoDetectSubtargetFeatures();
421 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.
422 if (Is64Bit && X86SSELevel < SSE2)
426 // If requesting codegen for X86-64, make sure that 64-bit features
431 DEBUG(errs() << "Subtarget features: SSELevel " << X86SSELevel
432 << ", 3DNowLevel " << X863DNowLevel
433 << ", 64bit " << HasX86_64 << "\n");
434 assert((!Is64Bit || HasX86_64) &&
435 "64-bit code requested on a subtarget that doesn't support it!");
437 // Set the boolean corresponding to the current target triple, or the default
438 // if one cannot be determined, to true.
439 if (TT.length() > 5) {
441 if ((Pos = TT.find("-darwin")) != std::string::npos) {
442 TargetType = isDarwin;
444 // Compute the darwin version number.
445 if (isdigit(TT[Pos+7]))
446 DarwinVers = atoi(&TT[Pos+7]);
448 DarwinVers = 8; // Minimum supported darwin is Tiger.
449 } else if (TT.find("linux") != std::string::npos) {
450 // Linux doesn't imply ELF, but we don't currently support anything else.
453 } else if (TT.find("cygwin") != std::string::npos) {
454 TargetType = isCygwin;
455 } else if (TT.find("mingw") != std::string::npos) {
456 TargetType = isMingw;
457 } else if (TT.find("win32") != std::string::npos) {
458 TargetType = isWindows;
459 } else if (TT.find("windows") != std::string::npos) {
460 TargetType = isWindows;
462 else if (TT.find("-cl") != std::string::npos) {
463 TargetType = isDarwin;
466 } else if (TT.empty()) {
467 #if defined(__CYGWIN__)
468 TargetType = isCygwin;
469 #elif defined(__MINGW32__) || defined(__MINGW64__)
470 TargetType = isMingw;
471 #elif defined(__APPLE__)
472 TargetType = isDarwin;
473 #if __APPLE_CC__ > 5400
474 DarwinVers = 9; // GCC 5400+ is Leopard.
476 DarwinVers = 8; // Minimum supported darwin is Tiger.
479 #elif defined(_WIN32) || defined(_WIN64)
480 TargetType = isWindows;
481 #elif defined(__linux__)
482 // Linux doesn't imply ELF, but we don't currently support anything else.
488 // If the asm syntax hasn't been overridden on the command line, use whatever
490 if (AsmFlavor == X86Subtarget::Unset) {
491 AsmFlavor = (TargetType == isWindows)
492 ? X86Subtarget::Intel : X86Subtarget::ATT;
495 // Stack alignment is 16 bytes on Darwin (both 32 and 64 bit) and for all 64
497 if (TargetType == isDarwin || Is64Bit)
501 stackAlignment = StackAlignment;