1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "subtarget"
15 #include "X86Subtarget.h"
16 #include "X86InstrInfo.h"
17 #include "X86GenSubtarget.inc"
18 #include "llvm/GlobalValue.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Support/Host.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/ADT/SmallVector.h"
31 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
32 /// current subtarget according to how we should reference it in a non-pcrel
34 unsigned char X86Subtarget::
35 ClassifyBlockAddressReference() const {
36 if (isPICStyleGOT()) // 32-bit ELF targets.
37 return X86II::MO_GOTOFF;
39 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode.
40 return X86II::MO_PIC_BASE_OFFSET;
42 // Direct static reference to label.
43 return X86II::MO_NO_FLAG;
46 /// ClassifyGlobalReference - Classify a global variable reference for the
47 /// current subtarget according to how we should reference it in a non-pcrel
49 unsigned char X86Subtarget::
50 ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
51 // DLLImport only exists on windows, it is implemented as a load from a
53 if (GV->hasDLLImportLinkage())
54 return X86II::MO_DLLIMPORT;
56 // Determine whether this is a reference to a definition or a declaration.
57 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
59 bool isDecl = GV->hasAvailableExternallyLinkage();
60 if (GV->isDeclaration() && !GV->isMaterializable())
63 // X86-64 in PIC mode.
64 if (isPICStyleRIPRel()) {
65 // Large model never uses stubs.
66 if (TM.getCodeModel() == CodeModel::Large)
67 return X86II::MO_NO_FLAG;
69 if (isTargetDarwin()) {
70 // If symbol visibility is hidden, the extra load is not needed if
71 // target is x86-64 or the symbol is definitely defined in the current
73 if (GV->hasDefaultVisibility() &&
74 (isDecl || GV->isWeakForLinker()))
75 return X86II::MO_GOTPCREL;
76 } else if (!isTargetWin64()) {
77 assert(isTargetELF() && "Unknown rip-relative target");
79 // Extra load is needed for all externally visible.
80 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
81 return X86II::MO_GOTPCREL;
84 return X86II::MO_NO_FLAG;
87 if (isPICStyleGOT()) { // 32-bit ELF targets.
88 // Extra load is needed for all externally visible.
89 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
90 return X86II::MO_GOTOFF;
94 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
95 // Determine whether we have a stub reference and/or whether the reference
96 // is relative to the PIC base or not.
98 // If this is a strong reference to a definition, it is definitely not
100 if (!isDecl && !GV->isWeakForLinker())
101 return X86II::MO_PIC_BASE_OFFSET;
103 // Unless we have a symbol with hidden visibility, we have to go through a
104 // normal $non_lazy_ptr stub because this symbol might be resolved late.
105 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
106 return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
108 // If symbol visibility is hidden, we have a stub for common symbol
109 // references and external declarations.
110 if (isDecl || GV->hasCommonLinkage()) {
111 // Hidden $non_lazy_ptr reference.
112 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
115 // Otherwise, no stub.
116 return X86II::MO_PIC_BASE_OFFSET;
119 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
120 // Determine whether we have a stub reference.
122 // If this is a strong reference to a definition, it is definitely not
124 if (!isDecl && !GV->isWeakForLinker())
125 return X86II::MO_NO_FLAG;
127 // Unless we have a symbol with hidden visibility, we have to go through a
128 // normal $non_lazy_ptr stub because this symbol might be resolved late.
129 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
130 return X86II::MO_DARWIN_NONLAZY;
132 // Otherwise, no stub.
133 return X86II::MO_NO_FLAG;
136 // Direct static reference to global.
137 return X86II::MO_NO_FLAG;
141 /// getBZeroEntry - This function returns the name of a function which has an
142 /// interface like the non-standard bzero function, if such a function exists on
143 /// the current subtarget and it is considered prefereable over memset with zero
144 /// passed as the second argument. Otherwise it returns null.
145 const char *X86Subtarget::getBZeroEntry() const {
146 // Darwin 10 has a __bzero entry point for this purpose.
147 if (getTargetTriple().isMacOSX() &&
148 !getTargetTriple().isMacOSXVersionLT(10, 6))
154 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
155 /// to immediate address.
156 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
159 return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
162 /// getSpecialAddressLatency - For targets where it is beneficial to
163 /// backschedule instructions that compute addresses, return a value
164 /// indicating the number of scheduling cycles of backscheduling that
165 /// should be attempted.
166 unsigned X86Subtarget::getSpecialAddressLatency() const {
167 // For x86 out-of-order targets, back-schedule address computations so
168 // that loads and stores aren't blocked.
169 // This value was chosen arbitrarily.
173 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
174 /// specified arguments. If we can't run cpuid on the host, return true.
175 static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX,
176 unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
177 #if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
178 #if defined(__GNUC__)
179 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
180 asm ("movq\t%%rbx, %%rsi\n\t"
182 "xchgq\t%%rbx, %%rsi\n\t"
189 #elif defined(_MSC_VER)
191 __cpuid(registers, value);
192 *rEAX = registers[0];
193 *rEBX = registers[1];
194 *rECX = registers[2];
195 *rEDX = registers[3];
198 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
199 #if defined(__GNUC__)
200 asm ("movl\t%%ebx, %%esi\n\t"
202 "xchgl\t%%ebx, %%esi\n\t"
209 #elif defined(_MSC_VER)
214 mov dword ptr [esi],eax
216 mov dword ptr [esi],ebx
218 mov dword ptr [esi],ecx
220 mov dword ptr [esi],edx
228 static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
229 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
230 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
231 if (Family == 6 || Family == 0xf) {
233 // Examine extended family ID if family ID is F.
234 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
235 // Examine extended model ID if family ID is 6 or F.
236 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
240 void X86Subtarget::AutoDetectSubtargetFeatures() {
241 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
247 if (GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1))
250 GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
252 if ((EDX >> 15) & 1) HasCMov = true;
253 if ((EDX >> 23) & 1) X86SSELevel = MMX;
254 if ((EDX >> 25) & 1) X86SSELevel = SSE1;
255 if ((EDX >> 26) & 1) X86SSELevel = SSE2;
256 if (ECX & 0x1) X86SSELevel = SSE3;
257 if ((ECX >> 9) & 1) X86SSELevel = SSSE3;
258 if ((ECX >> 19) & 1) X86SSELevel = SSE41;
259 if ((ECX >> 20) & 1) X86SSELevel = SSE42;
260 // FIXME: AVX codegen support is not ready.
261 //if ((ECX >> 28) & 1) { HasAVX = true; X86SSELevel = NoMMXSSE; }
263 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
264 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
266 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1);
267 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
268 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1);
269 HasAES = IsIntel && ((ECX >> 25) & 0x1);
271 if (IsIntel || IsAMD) {
272 // Determine if bit test memory instructions are slow.
275 DetectFamilyModel(EAX, Family, Model);
276 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13);
277 // If it's Nehalem, unaligned memory access is fast.
278 if (Family == 15 && Model == 26)
281 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
282 HasX86_64 = (EDX >> 29) & 0x1;
283 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
284 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1);
288 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
290 : PICStyle(PICStyles::None)
291 , X86SSELevel(NoMMXSSE)
292 , X863DNowLevel(NoThreeDNow)
304 , HasVectorUAMem(false)
306 // FIXME: this is a known good value for Yonah. How about others?
307 , MaxInlineSizeThreshold(128)
311 // default to hard float ABI
312 if (FloatABIType == FloatABI::Default)
313 FloatABIType = FloatABI::Hard;
315 // Determine default and user specified characteristics
317 // If feature string is not empty, parse features string.
318 std::string CPU = sys::getHostCPUName();
319 ParseSubtargetFeatures(FS, CPU);
320 // All X86-64 CPUs also have SSE2, however user might request no SSE via
321 // -mattr, so don't force SSELevel here.
323 X86SSELevel = NoMMXSSE;
325 // Otherwise, use CPUID to auto-detect feature set.
326 AutoDetectSubtargetFeatures();
327 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs.
328 if (Is64Bit && !HasAVX && X86SSELevel < SSE2)
332 // If requesting codegen for X86-64, make sure that 64-bit features
337 // All 64-bit cpus have cmov support.
341 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
342 << ", 3DNowLevel " << X863DNowLevel
343 << ", 64bit " << HasX86_64 << "\n");
344 assert((!Is64Bit || HasX86_64) &&
345 "64-bit code requested on a subtarget that doesn't support it!");
347 // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both
348 // 32 and 64 bit) and for all 64-bit targets.
349 if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() ||
350 isTargetSolaris() || Is64Bit)
354 stackAlignment = StackAlignment;
357 /// IsCalleePop - Determines whether the callee is required to pop its
358 /// own arguments. Callee pop is necessary to support tail calls.
359 bool X86Subtarget::IsCalleePop(bool IsVarArg,
360 CallingConv::ID CallingConv) const {
364 switch (CallingConv) {
367 case CallingConv::X86_StdCall:
369 case CallingConv::X86_FastCall:
371 case CallingConv::X86_ThisCall:
373 case CallingConv::Fast:
374 return GuaranteedTailCallOpt;
375 case CallingConv::GHC:
376 return GuaranteedTailCallOpt;