1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the X86SelectionDAGInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "X86InstrInfo.h"
15 #include "X86ISelLowering.h"
16 #include "X86RegisterInfo.h"
17 #include "X86Subtarget.h"
18 #include "X86SelectionDAGInfo.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/Target/TargetLowering.h"
25 #define DEBUG_TYPE "x86-selectiondag-info"
27 X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
28 : TargetSelectionDAGInfo(&DL) {}
30 X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
32 bool X86SelectionDAGInfo::isBaseRegConflictPossible(
33 SelectionDAG &DAG, ArrayRef<unsigned> ClobberSet) const {
34 // We cannot use TRI->hasBasePointer() until *after* we select all basic
35 // blocks. Legalization may introduce new stack temporaries with large
36 // alignment requirements. Fall back to generic code if there are any
37 // dynamic stack adjustments (hopefully rare) and the base pointer would
38 // conflict if we had to use it.
39 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
40 if (!MFI->hasVarSizedObjects() && !MFI->hasInlineAsmWithSPAdjust())
43 const X86RegisterInfo *TRI = static_cast<const X86RegisterInfo *>(
44 DAG.getSubtarget().getRegisterInfo());
45 unsigned BaseReg = TRI->getBaseRegister();
46 for (unsigned R : ClobberSet)
53 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
55 SDValue Dst, SDValue Src,
56 SDValue Size, unsigned Align,
58 MachinePointerInfo DstPtrInfo) const {
59 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
60 const X86Subtarget &Subtarget =
61 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
64 // If the base register might conflict with our physical registers, bail out.
65 unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
66 X86::ECX, X86::EAX, X86::EDI};
67 assert(!isBaseRegConflictPossible(DAG, ClobberSet));
70 // If to a segment-relative address space, use the default lowering.
71 if (DstPtrInfo.getAddrSpace() >= 256)
74 // If not DWORD aligned or size is more than the threshold, call the library.
75 // The libc version is likely to be faster for these cases. It can use the
76 // address value and run time information about the CPU.
77 if ((Align & 3) != 0 || !ConstantSize ||
78 ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
79 // Check to see if there is a specialized entry-point for memory zeroing.
80 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
82 if (const char *bzeroEntry = V &&
83 V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
84 EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
85 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
86 TargetLowering::ArgListTy Args;
87 TargetLowering::ArgListEntry Entry;
90 Args.push_back(Entry);
92 Args.push_back(Entry);
94 TargetLowering::CallLoweringInfo CLI(DAG);
95 CLI.setDebugLoc(dl).setChain(Chain)
96 .setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
97 DAG.getExternalSymbol(bzeroEntry, IntPtr), std::move(Args),
101 std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
102 return CallResult.second;
105 // Otherwise have the target-independent code call memset.
109 uint64_t SizeVal = ConstantSize->getZExtValue();
113 ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
114 unsigned BytesLeft = 0;
115 bool TwoRepStos = false;
118 uint64_t Val = ValC->getZExtValue() & 255;
120 // If the value is a constant, then we can potentially use larger sets.
122 case 2: // WORD aligned
125 Val = (Val << 8) | Val;
127 case 0: // DWORD aligned
130 Val = (Val << 8) | Val;
131 Val = (Val << 16) | Val;
132 if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
135 Val = (Val << 32) | Val;
138 default: // Byte aligned
141 Count = DAG.getIntPtrConstant(SizeVal);
145 if (AVT.bitsGT(MVT::i8)) {
146 unsigned UBytes = AVT.getSizeInBits() / 8;
147 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
148 BytesLeft = SizeVal % UBytes;
151 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
153 InFlag = Chain.getValue(1);
156 Count = DAG.getIntPtrConstant(SizeVal);
157 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
158 InFlag = Chain.getValue(1);
161 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
163 InFlag = Chain.getValue(1);
164 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
166 InFlag = Chain.getValue(1);
168 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
169 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
170 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
173 InFlag = Chain.getValue(1);
175 EVT CVT = Count.getValueType();
176 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
177 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
178 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
181 InFlag = Chain.getValue(1);
182 Tys = DAG.getVTList(MVT::Other, MVT::Glue);
183 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
184 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
185 } else if (BytesLeft) {
186 // Handle the last 1 - 7 bytes.
187 unsigned Offset = SizeVal - BytesLeft;
188 EVT AddrVT = Dst.getValueType();
189 EVT SizeVT = Size.getValueType();
191 Chain = DAG.getMemset(Chain, dl,
192 DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
193 DAG.getConstant(Offset, AddrVT)),
195 DAG.getConstant(BytesLeft, SizeVT),
196 Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
199 // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
203 SDValue X86SelectionDAGInfo::EmitTargetCodeForMemcpy(
204 SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src,
205 SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline,
206 MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
207 // This requires the copy size to be a constant, preferably
208 // within a subtarget-specific limit.
209 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
210 const X86Subtarget &Subtarget =
211 DAG.getMachineFunction().getSubtarget<X86Subtarget>();
214 uint64_t SizeVal = ConstantSize->getZExtValue();
215 if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
218 /// If not DWORD aligned, it is more efficient to call the library. However
219 /// if calling the library is not allowed (AlwaysInline), then soldier on as
220 /// the code generated here is better than the long load-store sequence we
221 /// would otherwise get.
222 if (!AlwaysInline && (Align & 3) != 0)
225 // If to a segment-relative address space, use the default lowering.
226 if (DstPtrInfo.getAddrSpace() >= 256 ||
227 SrcPtrInfo.getAddrSpace() >= 256)
230 // If the base register might conflict with our physical registers, bail out.
231 unsigned ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI,
232 X86::ECX, X86::ESI, X86::EDI};
233 if (isBaseRegConflictPossible(DAG, ClobberSet))
246 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
248 unsigned UBytes = AVT.getSizeInBits() / 8;
249 unsigned CountVal = SizeVal / UBytes;
250 SDValue Count = DAG.getIntPtrConstant(CountVal);
251 unsigned BytesLeft = SizeVal % UBytes;
254 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
257 InFlag = Chain.getValue(1);
258 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
261 InFlag = Chain.getValue(1);
262 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
265 InFlag = Chain.getValue(1);
267 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
268 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
269 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
271 SmallVector<SDValue, 4> Results;
272 Results.push_back(RepMovs);
274 // Handle the last 1 - 7 bytes.
275 unsigned Offset = SizeVal - BytesLeft;
276 EVT DstVT = Dst.getValueType();
277 EVT SrcVT = Src.getValueType();
278 EVT SizeVT = Size.getValueType();
279 Results.push_back(DAG.getMemcpy(Chain, dl,
280 DAG.getNode(ISD::ADD, dl, DstVT, Dst,
281 DAG.getConstant(Offset, DstVT)),
282 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
283 DAG.getConstant(Offset, SrcVT)),
284 DAG.getConstant(BytesLeft, SizeVT),
285 Align, isVolatile, AlwaysInline,
286 DstPtrInfo.getWithOffset(Offset),
287 SrcPtrInfo.getWithOffset(Offset)));
290 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);