1 //===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86REGISTERINFO_H
15 #define X86REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "X86GenRegisterInfo.inc"
24 class TargetInstrInfo;
25 class X86TargetMachine;
27 /// N86 namespace - Native X86 register numbers
31 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
35 /// DWARFFlavour - Flavour of dwarf regnumbers
37 namespace DWARFFlavour {
39 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
43 class X86RegisterInfo : public X86GenRegisterInfo {
46 const TargetInstrInfo &TII;
49 /// Is64Bit - Is the target 64-bits.
53 /// IsWin64 - Is the target on of win64 flavours
57 /// SlotSize - Stack slot size in bytes.
61 /// StackPtr - X86 physical register used as stack ptr.
65 /// FramePtr - X86 physical register used as frame ptr.
70 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
72 /// getX86RegNum - Returns the native X86 register number for the given LLVM
73 /// register identifier.
74 static unsigned getX86RegNum(unsigned RegNo);
76 /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
77 /// (created by TableGen) for target dependencies.
78 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
79 int getLLVMRegNum(unsigned RegNum, bool isEH) const;
81 // FIXME: This should be tablegen'd like getDwarfRegNum is
82 int getSEHRegNum(unsigned i) const;
84 /// Code Generation virtual methods...
87 /// getMatchingSuperRegClass - Return a subclass of the specified register
88 /// class A so that each register in it has a sub-register of the
89 /// specified sub-register index which is in the specified register class B.
90 virtual const TargetRegisterClass *
91 getMatchingSuperRegClass(const TargetRegisterClass *A,
92 const TargetRegisterClass *B, unsigned Idx) const;
94 const TargetRegisterClass*
95 getLargestLegalSuperClass(const TargetRegisterClass *RC) const;
97 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
99 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
101 /// getCrossCopyRegClass - Returns a legal register class to copy a register
102 /// in the specified class to or from. Returns NULL if it is possible to copy
103 /// between a two registers of the specified class.
104 const TargetRegisterClass *
105 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
107 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
108 MachineFunction &MF) const;
110 /// getCalleeSavedRegs - Return a null-terminated list of all of the
111 /// callee-save registers on this target.
112 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
114 /// getReservedRegs - Returns a bitset indexed by physical register number
115 /// indicating if a register is a special register that has particular uses and
116 /// should be considered unavailable at all times, e.g. SP, RA. This is used by
117 /// register scavenger to determine what registers are free.
118 BitVector getReservedRegs(const MachineFunction &MF) const;
120 bool canRealignStack(const MachineFunction &MF) const;
122 bool needsStackRealignment(const MachineFunction &MF) const;
124 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
125 int &FrameIdx) const;
127 void eliminateCallFramePseudoInstr(MachineFunction &MF,
128 MachineBasicBlock &MBB,
129 MachineBasicBlock::iterator MI) const;
131 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
132 int SPAdj, RegScavenger *RS = NULL) const;
134 // Debug information queries.
135 unsigned getRARegister() const;
136 unsigned getFrameRegister(const MachineFunction &MF) const;
137 unsigned getStackRegister() const { return StackPtr; }
138 // FIXME: Move to FrameInfok
139 unsigned getSlotSize() const { return SlotSize; }
141 // Exception handling queries.
142 unsigned getEHExceptionRegister() const;
143 unsigned getEHHandlerRegister() const;
146 // getX86SubSuperRegister - X86 utility function. It returns the sub or super
147 // register of a specific X86 register.
148 // e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX
149 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
151 } // End llvm namespace