1 //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the MRegisterInfo class. This
11 // file is responsible for the frame pointer elimination optimization on X86.
13 //===----------------------------------------------------------------------===//
16 #include "X86RegisterInfo.h"
17 #include "X86InstrBuilder.h"
18 #include "llvm/Constants.h"
19 #include "llvm/Type.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetFrameInfo.h"
26 #include "Support/CommandLine.h"
27 #include "Support/STLExtras.h"
32 NoFPElim("disable-fp-elim",
33 cl::desc("Disable frame pointer elimination optimization"));
36 X86RegisterInfo::X86RegisterInfo()
37 : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
39 static unsigned getIdx(const TargetRegisterClass *RC) {
40 switch (RC->getSize()) {
41 default: assert(0 && "Invalid data size!");
49 int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator MI,
51 unsigned SrcReg, int FrameIdx,
52 const TargetRegisterClass *RC) const {
53 static const unsigned Opcode[] =
54 { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
55 MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
56 FrameIdx).addReg(SrcReg);
61 int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator MI,
63 unsigned DestReg, int FrameIdx,
64 const TargetRegisterClass *RC) const{
65 static const unsigned Opcode[] =
66 { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
67 unsigned OC = Opcode[getIdx(RC)];
68 MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
72 int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
73 MachineBasicBlock::iterator MI,
74 unsigned DestReg, unsigned SrcReg,
75 const TargetRegisterClass *RC) const {
76 static const unsigned Opcode[] =
77 { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
78 MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
82 bool X86RegisterInfo::canFoldMemoryOperand(MachineInstr* MI,
85 switch(MI->getOpcode()) {
86 case X86::ADDrr8: case X86::ADDrr16: case X86::ADDrr32:
87 case X86::ADDri8: case X86::ADDri16: case X86::ADDri32:
88 case X86::MOVrr8: case X86::MOVrr16: case X86::MOVrr32:
95 int X86RegisterInfo::foldMemoryOperand(MachineInstr* MI,
99 MachineBasicBlock& MBB = *MI->getParent();
100 MachineInstr* NI = 0;
102 switch(MI->getOpcode()) {
104 NI = addFrameReference(BuildMI(X86::MOVmr8, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
107 NI = addFrameReference(BuildMI(X86::MOVmr16, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
110 NI = addFrameReference(BuildMI(X86::MOVmr32, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
113 NI = addFrameReference(BuildMI(X86::ADDmr8, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
116 NI = addFrameReference(BuildMI(X86::ADDmr16, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
119 NI = addFrameReference(BuildMI(X86::ADDmr32, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
122 NI = addFrameReference(BuildMI(X86::ADDmi8, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
125 NI = addFrameReference(BuildMI(X86::ADDmi16, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
128 NI = addFrameReference(BuildMI(X86::ADDmi32, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
131 assert(0 && "Operand cannot be folded");
134 switch(MI->getOpcode()) {
136 NI = addFrameReference(BuildMI(X86::MOVrm8, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
139 NI = addFrameReference(BuildMI(X86::MOVrm16, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
142 NI = addFrameReference(BuildMI(X86::MOVrm32, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
145 NI = addFrameReference(BuildMI(X86::ADDrm8, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
148 NI = addFrameReference(BuildMI(X86::ADDrm16, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
151 NI = addFrameReference(BuildMI(X86::ADDrm32, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
154 assert(0 && "Operand cannot be folded");
157 assert(0 && "Operand cannot be folded");
159 MBB.insert(MBB.erase(MI), NI);
163 //===----------------------------------------------------------------------===//
164 // Stack Frame Processing methods
165 //===----------------------------------------------------------------------===//
167 // hasFP - Return true if the specified function should have a dedicated frame
168 // pointer register. This is true if the function has variable sized allocas or
169 // if frame pointer elimination is disabled.
171 static bool hasFP(MachineFunction &MF) {
172 return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
175 void X86RegisterInfo::
176 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
177 MachineBasicBlock::iterator I) const {
179 // If we have a frame pointer, turn the adjcallstackup instruction into a
180 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
182 MachineInstr *Old = I;
183 unsigned Amount = Old->getOperand(0).getImmedValue();
185 // We need to keep the stack aligned properly. To do this, we round the
186 // amount of space needed for the outgoing arguments up to the next
187 // alignment boundary.
188 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
189 Amount = (Amount+Align-1)/Align*Align;
192 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
193 New=BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
195 assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
196 New=BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
199 // Replace the pseudo instruction with a new instruction...
207 void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
208 MachineBasicBlock::iterator II) const {
210 MachineInstr &MI = *II;
211 while (!MI.getOperand(i).isFrameIndex()) {
213 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
216 int FrameIndex = MI.getOperand(i).getFrameIndex();
218 // This must be part of a four operand memory reference. Replace the
219 // FrameIndex with base register with EBP. Add add an offset to the offset.
220 MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
222 // Now add the frame object offset to the offset from EBP.
223 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
224 MI.getOperand(i+3).getImmedValue()+4;
227 Offset += MF.getFrameInfo()->getStackSize();
229 Offset += 4; // Skip the saved EBP
231 MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
235 X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const{
237 // Create a frame entry for the EBP register that must be saved.
238 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, -8);
239 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
240 "Slot for EBP register must be last in order to be found!");
244 void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
245 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
246 MachineBasicBlock::iterator MBBI = MBB.begin();
247 MachineFrameInfo *MFI = MF.getFrameInfo();
250 // Get the number of bytes to allocate from the FrameInfo
251 unsigned NumBytes = MFI->getStackSize();
253 // Get the offset of the stack slot for the EBP register... which is
254 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
255 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexBegin())+4;
257 if (NumBytes) { // adjust stack pointer: ESP -= numbytes
258 MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
259 MBB.insert(MBBI, MI);
262 // Save EBP into the appropriate stack slot...
263 MI = addRegOffset(BuildMI(X86::MOVrm32, 5), // mov [ESP-<offset>], EBP
264 X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
265 MBB.insert(MBBI, MI);
267 // Update EBP with the new base value...
268 if (NumBytes == 4) // mov EBP, ESP
269 MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP);
270 else // lea EBP, [ESP+StackSize]
271 MI = addRegOffset(BuildMI(X86::LEAr32, 5, X86::EBP), X86::ESP,NumBytes-4);
273 MBB.insert(MBBI, MI);
276 if (MFI->hasCalls()) {
277 // When we have no frame pointer, we reserve argument space for call sites
278 // in the function immediately on entry to the current function. This
279 // eliminates the need for add/sub ESP brackets around call sites.
281 NumBytes += MFI->getMaxCallFrameSize();
283 // Round the size to a multiple of the alignment (don't forget the 4 byte
285 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
286 NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
289 // Update frame info to pretend that this is part of the stack...
290 MFI->setStackSize(NumBytes);
293 // adjust stack pointer: ESP -= numbytes
294 MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
295 MBB.insert(MBBI, MI);
300 void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
301 MachineBasicBlock &MBB) const {
302 const MachineFrameInfo *MFI = MF.getFrameInfo();
303 MachineBasicBlock::iterator MBBI = prior(MBB.end());
305 assert(MBBI->getOpcode() == X86::RET &&
306 "Can only insert epilog into returning blocks");
309 // Get the offset of the stack slot for the EBP register... which is
310 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
311 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
314 MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
315 MBB.insert(MBBI, MI);
318 MI = BuildMI(X86::POPr32, 0, X86::EBP);
319 MBB.insert(MBBI, MI);
321 // Get the number of bytes allocated from the FrameInfo...
322 unsigned NumBytes = MFI->getStackSize();
324 if (NumBytes) { // adjust stack pointer back: ESP += numbytes
325 MI =BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
326 MBB.insert(MBBI, MI);
331 #include "X86GenRegisterInfo.inc"
333 const TargetRegisterClass*
334 X86RegisterInfo::getRegClassForType(const Type* Ty) const {
335 switch (Ty->getPrimitiveID()) {
337 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
338 default: assert(0 && "Invalid type to getClass!");
340 case Type::SByteTyID:
341 case Type::UByteTyID: return &R8Instance;
342 case Type::ShortTyID:
343 case Type::UShortTyID: return &R16Instance;
346 case Type::PointerTyID: return &R32Instance;
348 case Type::FloatTyID:
349 case Type::DoubleTyID: return &RFPInstance;