1 //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of the MRegisterInfo class. This
11 // file is responsible for the frame pointer elimination optimization on X86.
13 //===----------------------------------------------------------------------===//
16 #include "X86RegisterInfo.h"
17 #include "X86InstrBuilder.h"
18 #include "llvm/Constants.h"
19 #include "llvm/Type.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetFrameInfo.h"
26 #include "Support/CommandLine.h"
27 #include "Support/STLExtras.h"
33 NoFPElim("disable-fp-elim",
34 cl::desc("Disable frame pointer elimination optimization"));
37 X86RegisterInfo::X86RegisterInfo()
38 : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
40 static unsigned getIdx(const TargetRegisterClass *RC) {
41 switch (RC->getSize()) {
42 default: assert(0 && "Invalid data size!");
50 int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
51 MachineBasicBlock::iterator MI,
52 unsigned SrcReg, int FrameIdx,
53 const TargetRegisterClass *RC) const {
54 static const unsigned Opcode[] =
55 { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
56 MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
57 FrameIdx).addReg(SrcReg);
62 int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator MI,
64 unsigned DestReg, int FrameIdx,
65 const TargetRegisterClass *RC) const{
66 static const unsigned Opcode[] =
67 { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
68 unsigned OC = Opcode[getIdx(RC)];
69 MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
73 int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
74 MachineBasicBlock::iterator MI,
75 unsigned DestReg, unsigned SrcReg,
76 const TargetRegisterClass *RC) const {
77 static const unsigned Opcode[] =
78 { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
79 MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
83 //===----------------------------------------------------------------------===//
84 // Stack Frame Processing methods
85 //===----------------------------------------------------------------------===//
87 // hasFP - Return true if the specified function should have a dedicated frame
88 // pointer register. This is true if the function has variable sized allocas or
89 // if frame pointer elimination is disabled.
91 static bool hasFP(MachineFunction &MF) {
92 return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
95 int X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
96 MachineBasicBlock &MBB,
97 MachineBasicBlock::iterator I) const {
98 MachineInstr *New = 0, *Old = I;
100 // If we have a frame pointer, turn the adjcallstackup instruction into a
101 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
103 unsigned Amount = Old->getOperand(0).getImmedValue();
105 // We need to keep the stack aligned properly. To do this, we round the
106 // amount of space needed for the outgoing arguments up to the next
107 // alignment boundary.
108 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
109 Amount = (Amount+Align-1)/Align*Align;
111 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
112 New=BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
114 assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
115 New=BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
121 // Replace the pseudo instruction with a new instruction...
122 MBB.insert(MBB.erase(I), New);
130 int X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
131 MachineBasicBlock::iterator II) const {
133 MachineInstr &MI = *II;
134 while (!MI.getOperand(i).isFrameIndex()) {
136 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
139 int FrameIndex = MI.getOperand(i).getFrameIndex();
141 // This must be part of a four operand memory reference. Replace the
142 // FrameIndex with base register with EBP. Add add an offset to the offset.
143 MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
145 // Now add the frame object offset to the offset from EBP.
146 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
147 MI.getOperand(i+3).getImmedValue()+4;
150 Offset += MF.getFrameInfo()->getStackSize();
152 MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
156 int X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
159 // Create a frame entry for the EBP register that must be saved.
160 int FrameIdx = MF.getFrameInfo()->CreateStackObject(4, 4);
161 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 &&
162 "Slot for EBP register must be last in order to be found!");
167 int X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
168 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
169 MachineBasicBlock::iterator MBBI = MBB.begin();
170 MachineFrameInfo *MFI = MF.getFrameInfo();
173 unsigned oldSize = MBB.size();
174 // Get the number of bytes to allocate from the FrameInfo
175 unsigned NumBytes = MFI->getStackSize();
177 // Get the offset of the stack slot for the EBP register... which is
178 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
179 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
181 if (NumBytes) { // adjust stack pointer: ESP -= numbytes
182 MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
183 MBB.insert(MBBI, MI);
186 // Save EBP into the appropriate stack slot...
187 MI = addRegOffset(BuildMI(X86::MOVrm32, 5), // mov [ESP-<offset>], EBP
188 X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
189 MBB.insert(MBBI, MI);
191 // Update EBP with the new base value...
192 if (NumBytes == 0) // mov EBP, ESP
193 MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP);
194 else // lea EBP, [ESP+StackSize]
195 MI = addRegOffset(BuildMI(X86::LEAr32, 5, X86::EBP), X86::ESP, NumBytes);
197 MBB.insert(MBBI, MI);
200 // When we have no frame pointer, we reserve argument space for call sites
201 // in the function immediately on entry to the current function. This
202 // eliminates the need for add/sub ESP brackets around call sites.
204 NumBytes += MFI->getMaxCallFrameSize();
206 // Round the size to a multiple of the alignment (don't forget the 4 byte
208 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
209 NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
211 // Update frame info to pretend that this is part of the stack...
212 MFI->setStackSize(NumBytes);
215 // adjust stack pointer: ESP -= numbytes
216 MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
217 MBB.insert(MBBI, MI);
220 return MBB.size() - oldSize;
223 int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
224 MachineBasicBlock &MBB) const {
225 unsigned oldSize = MBB.size();
226 const MachineFrameInfo *MFI = MF.getFrameInfo();
227 MachineBasicBlock::iterator MBBI = prior(MBB.end());
229 assert(MBBI->getOpcode() == X86::RET &&
230 "Can only insert epilog into returning blocks");
233 // Get the offset of the stack slot for the EBP register... which is
234 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
235 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
238 MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
239 MBB.insert(MBBI, MI);
241 // mov EBP, [ESP-<offset>]
242 MI = addRegOffset(BuildMI(X86::MOVmr32, 5, X86::EBP), X86::ESP, EBPOffset);
243 MBB.insert(MBBI, MI);
245 // Get the number of bytes allocated from the FrameInfo...
246 unsigned NumBytes = MFI->getStackSize();
248 if (NumBytes) { // adjust stack pointer back: ESP += numbytes
249 MI =BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
250 MBB.insert(MBBI, MI);
253 return MBB.size() - oldSize;
256 #include "X86GenRegisterInfo.inc"
258 const TargetRegisterClass*
259 X86RegisterInfo::getRegClassForType(const Type* Ty) const {
260 switch (Ty->getPrimitiveID()) {
262 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
263 default: assert(0 && "Invalid type to getClass!");
265 case Type::SByteTyID:
266 case Type::UByteTyID: return &R8Instance;
267 case Type::ShortTyID:
268 case Type::UShortTyID: return &R16Instance;
271 case Type::PointerTyID: return &R32Instance;
273 case Type::FloatTyID:
274 case Type::DoubleTyID: return &RFPInstance;