1 //===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Intel assembly code printer class.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86INTELASMPRINTER_H
15 #define X86INTELASMPRINTER_H
17 #include "X86AsmPrinter.h"
18 #include "llvm/CodeGen/ValueTypes.h"
19 #include "llvm/Target/TargetMachine.h"
20 #include "llvm/Target/MRegisterInfo.h"
25 struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
26 X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM)
27 : X86SharedAsmPrinter(O, TM) { }
29 virtual const char *getPassName() const {
30 return "X86 Intel-Style Assembly Printer";
33 /// printInstruction - This method is automatically generated by tablegen
34 /// from the instruction set description. This method returns true if the
35 /// machine instruction was sufficiently described to print it, otherwise it
37 bool printInstruction(const MachineInstr *MI);
39 // This method is used by the tablegen'erated instruction printer.
40 void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
41 const MachineOperand &MO = MI->getOperand(OpNo);
42 if (MO.getType() == MachineOperand::MO_MachineRegister) {
43 assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
44 // Bug Workaround: See note in Printer::doInitialization about %.
45 O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
51 void printCallOperand(const MachineInstr *MI, unsigned OpNo,
53 printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
56 void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
59 default: assert(0 && "Unknown arg size!");
60 case MVT::i8: O << "BYTE PTR "; break;
61 case MVT::i16: O << "WORD PTR "; break;
63 case MVT::f32: O << "DWORD PTR "; break;
65 case MVT::f64: O << "QWORD PTR "; break;
66 case MVT::f80: O << "XWORD PTR "; break;
68 printMemReference(MI, OpNo);
71 void printMachineInstruction(const MachineInstr *MI);
72 void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
73 void printMemReference(const MachineInstr *MI, unsigned Op);
74 bool runOnMachineFunction(MachineFunction &F);
75 bool doInitialization(Module &M);
78 } // end namespace x86
79 } // end namespace llvm