1 //===-- X86IntelAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to Intel format assembly language.
12 // This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86IntelAsmPrinter.h"
17 #include "X86TargetAsmInfo.h"
19 #include "llvm/Constants.h"
20 #include "llvm/Module.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/Support/Mangler.h"
23 #include "llvm/Target/TargetAsmInfo.h"
24 #include "llvm/Target/TargetOptions.h"
27 /// runOnMachineFunction - This uses the printMachineInstruction()
28 /// method to print assembly for each instruction.
30 bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
31 SetupMachineFunction(MF);
34 // Print out constants referenced by the function
35 EmitConstantPool(MF.getConstantPool());
37 // Print out labels for the function.
38 SwitchToTextSection("_text", MF.getFunction());
40 if (MF.getFunction()->getLinkage() == GlobalValue::ExternalLinkage)
41 O << "\tpublic " << CurrentFnName << "\n";
42 O << CurrentFnName << "\tproc near\n";
44 // Print out code for the function.
45 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
47 // Print a label for the basic block if there are any predecessors.
48 if (I->pred_begin() != I->pred_end()) {
49 printBasicBlockLabel(I, true);
52 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
54 // Print the assembly for the instruction.
56 printMachineInstruction(II);
60 O << CurrentFnName << "\tendp\n";
62 // We didn't modify anything.
66 void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
67 unsigned char value = MI->getOperand(Op).getImmedValue();
68 assert(value <= 7 && "Invalid ssecc argument!");
70 case 0: O << "eq"; break;
71 case 1: O << "lt"; break;
72 case 2: O << "le"; break;
73 case 3: O << "unord"; break;
74 case 4: O << "neq"; break;
75 case 5: O << "nlt"; break;
76 case 6: O << "nle"; break;
77 case 7: O << "ord"; break;
81 void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
82 const char *Modifier) {
83 const MRegisterInfo &RI = *TM.getRegisterInfo();
84 switch (MO.getType()) {
85 case MachineOperand::MO_Register:
86 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
87 unsigned Reg = MO.getReg();
88 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
89 MVT::ValueType VT = (strcmp(Modifier,"subreg64") == 0) ?
90 MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
91 ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
92 Reg = getX86SubSuperRegister(Reg, VT);
94 O << RI.get(Reg).Name;
96 O << "reg" << MO.getReg();
99 case MachineOperand::MO_Immediate:
100 O << MO.getImmedValue();
102 case MachineOperand::MO_MachineBasicBlock:
103 printBasicBlockLabel(MO.getMachineBasicBlock());
105 case MachineOperand::MO_ConstantPoolIndex: {
106 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
107 if (!isMemOp) O << "OFFSET ";
108 O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
109 << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
110 int Offset = MO.getOffset();
112 O << " + " << Offset;
118 case MachineOperand::MO_GlobalAddress: {
119 bool isCallOp = Modifier && !strcmp(Modifier, "call");
120 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
121 if (!isMemOp && !isCallOp) O << "OFFSET ";
122 O << Mang->getValueName(MO.getGlobal());
123 int Offset = MO.getOffset();
125 O << " + " << Offset;
130 case MachineOperand::MO_ExternalSymbol: {
131 bool isCallOp = Modifier && !strcmp(Modifier, "call");
132 if (!isCallOp) O << "OFFSET ";
133 O << TAI->getGlobalPrefix() << MO.getSymbolName();
137 O << "<unknown operand type>"; return;
141 void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
142 const char *Modifier) {
143 assert(isMem(MI, Op) && "Invalid memory reference!");
145 const MachineOperand &BaseReg = MI->getOperand(Op);
146 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
147 const MachineOperand &IndexReg = MI->getOperand(Op+2);
148 const MachineOperand &DispSpec = MI->getOperand(Op+3);
150 if (BaseReg.isFrameIndex()) {
151 O << "[frame slot #" << BaseReg.getFrameIndex();
152 if (DispSpec.getImmedValue())
153 O << " + " << DispSpec.getImmedValue();
159 bool NeedPlus = false;
160 if (BaseReg.getReg()) {
161 printOp(BaseReg, Modifier);
165 if (IndexReg.getReg()) {
166 if (NeedPlus) O << " + ";
168 O << ScaleVal << "*";
169 printOp(IndexReg, Modifier);
173 if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
176 printOp(DispSpec, "mem");
178 int DispVal = DispSpec.getImmedValue();
179 if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
193 void X86IntelAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
194 O << "\"L" << getFunctionNumber() << "$pb\"\n";
195 O << "\"L" << getFunctionNumber() << "$pb\":";
198 bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
200 const MRegisterInfo &RI = *TM.getRegisterInfo();
201 unsigned Reg = MO.getReg();
203 default: return true; // Unknown mode.
204 case 'b': // Print QImode register
205 Reg = getX86SubSuperRegister(Reg, MVT::i8);
207 case 'h': // Print QImode high register
208 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
210 case 'w': // Print HImode register
211 Reg = getX86SubSuperRegister(Reg, MVT::i16);
213 case 'k': // Print SImode register
214 Reg = getX86SubSuperRegister(Reg, MVT::i32);
218 O << '%' << RI.get(Reg).Name;
222 /// PrintAsmOperand - Print out an operand for an inline asm expression.
224 bool X86IntelAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
226 const char *ExtraCode) {
227 // Does this asm operand have a single letter operand modifier?
228 if (ExtraCode && ExtraCode[0]) {
229 if (ExtraCode[1] != 0) return true; // Unknown modifier.
231 switch (ExtraCode[0]) {
232 default: return true; // Unknown modifier.
233 case 'b': // Print QImode register
234 case 'h': // Print QImode high register
235 case 'w': // Print HImode register
236 case 'k': // Print SImode register
237 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
241 printOperand(MI, OpNo);
245 bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
248 const char *ExtraCode) {
249 if (ExtraCode && ExtraCode[0])
250 return true; // Unknown modifier.
251 printMemReference(MI, OpNo);
255 /// printMachineInstruction -- Print out a single X86 LLVM instruction
256 /// MI in Intel syntax to the current output stream.
258 void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
261 // See if a truncate instruction can be turned into a nop.
262 switch (MI->getOpcode()) {
264 case X86::TRUNC_64to32:
265 case X86::TRUNC_64to16:
266 case X86::TRUNC_32to16:
267 case X86::TRUNC_32to8:
268 case X86::TRUNC_16to8:
269 case X86::TRUNC_32_to8:
270 case X86::TRUNC_16_to8: {
271 const MachineOperand &MO0 = MI->getOperand(0);
272 const MachineOperand &MO1 = MI->getOperand(1);
273 unsigned Reg0 = MO0.getReg();
274 unsigned Reg1 = MO1.getReg();
275 unsigned Opc = MI->getOpcode();
276 if (Opc == X86::TRUNC_64to32)
277 Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
278 else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
279 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
281 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
282 O << TAI->getCommentString() << " TRUNCATE ";
287 case X86::PsMOVZX64rr32:
288 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
292 // Call the autogenerated instruction printer routines.
293 printInstruction(MI);
296 bool X86IntelAsmPrinter::doInitialization(Module &M) {
297 X86SharedAsmPrinter::doInitialization(M);
299 Mang->markCharUnacceptable('.');
301 O << "\t.686\n\t.model flat\n\n";
303 // Emit declarations for external functions.
304 for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
306 O << "\textern " << Mang->getValueName(I) << ":near\n";
308 // Emit declarations for external globals. Note that VC++ always declares
309 // external globals to have type byte, and if that's good enough for VC++...
310 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
313 O << "\textern " << Mang->getValueName(I) << ":byte\n";
319 bool X86IntelAsmPrinter::doFinalization(Module &M) {
320 const TargetData *TD = TM.getTargetData();
322 // Print out module-level global variables here.
323 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
325 if (I->isExternal()) continue; // External global require no code
327 // Check to see if this is a special global used by LLVM, if so, emit it.
328 if (EmitSpecialLLVMGlobal(I))
331 std::string name = Mang->getValueName(I);
332 Constant *C = I->getInitializer();
333 unsigned Size = TD->getTypeSize(C->getType());
334 unsigned Align = getPreferredAlignmentLog(I);
335 bool bCustomSegment = false;
337 switch (I->getLinkage()) {
338 case GlobalValue::LinkOnceLinkage:
339 case GlobalValue::WeakLinkage:
340 SwitchToDataSection("", 0);
341 O << name << "?\tsegment common 'COMMON'\n";
342 bCustomSegment = true;
343 // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
344 // are also available.
346 case GlobalValue::AppendingLinkage:
347 SwitchToDataSection("", 0);
348 O << name << "?\tsegment public 'DATA'\n";
349 bCustomSegment = true;
350 // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
351 // are also available.
353 case GlobalValue::ExternalLinkage:
354 O << "\tpublic " << name << "\n";
356 case GlobalValue::InternalLinkage:
357 SwitchToDataSection(TAI->getDataSection(), I);
360 assert(0 && "Unknown linkage type!");
364 EmitAlignment(Align, I);
366 O << name << ":\t\t\t\t" << TAI->getCommentString()
367 << " " << I->getName() << '\n';
369 EmitGlobalConstant(C);
372 O << name << "?\tends\n";
375 // Bypass X86SharedAsmPrinter::doFinalization().
376 AsmPrinter::doFinalization(M);
377 SwitchToDataSection("", 0);
379 return false; // success
382 void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {
383 unsigned NumElts = CVA->getNumOperands();
385 // ML does not have escape sequences except '' for '. It also has a maximum
386 // string length of 255.
388 bool inString = false;
389 for (unsigned i = 0; i < NumElts; i++) {
390 int n = cast<ConstantInt>(CVA->getOperand(i))->getRawValue() & 255;
394 if (n >= 32 && n <= 127) {
421 len += 1 + (n > 9) + (n > 99);
442 // Include the auto-generated portion of the assembly writer.
443 #include "X86GenAsmWriter1.inc"