Add instruction annotation about whether it has a 0x0F opcode prefix
[oota-llvm.git] / lib / Target / X86 / X86InstrInfo.h
1 //===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===//
2 //
3 // This file contains the X86 implementation of the MachineInstrInfo class.
4 //
5 //===----------------------------------------------------------------------===//
6
7 #ifndef X86INSTRUCTIONINFO_H
8 #define X86INSTRUCTIONINFO_H
9
10 #include "llvm/Target/MachineInstrInfo.h"
11 #include "X86RegisterInfo.h"
12
13 /// X86II - This namespace holds all of the target specific flags that
14 /// instruction info tracks.
15 ///
16 namespace X86II {
17   enum {
18     /// Void - Set if this instruction produces no value
19     Void        = 1 << 0,
20
21     // TB - TwoByte - Set if this instruction has a two byte opcode, which
22     // starts with a 0x0F byte before the real opcode.
23     TB          = 1 << 1,
24
25     
26   };
27 }
28
29 class X86InstrInfo : public MachineInstrInfo {
30   const X86RegisterInfo RI;
31 public:
32   X86InstrInfo();
33
34   /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info.  As
35   /// such, whenever a client has an instance of instruction info, it should
36   /// always be able to get register info as well (through this method).
37   ///
38   virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
39
40   /// print - Print out an x86 instruction in intel syntax
41   ///
42   virtual void print(const MachineInstr *MI, std::ostream &O,
43                      const TargetMachine &TM) const;
44
45
46   //===--------------------------------------------------------------------===//
47   //
48   // These are stubs for pure virtual methods that should be factored out of
49   // MachineInstrInfo.  We never call them, we don't want them, but we need
50   // stubs so that we can instatiate our class.
51   //
52   MachineOpCode getNOPOpCode() const { abort(); }
53   void CreateCodeToLoadConst(const TargetMachine& target, Function* F,
54                              Value *V, Instruction *I,
55                              std::vector<MachineInstr*>& mvec,
56                              MachineCodeForInstruction& mcfi) const { abort(); }
57   void CreateCodeToCopyIntToFloat(const TargetMachine& target,
58                                   Function* F, Value* val, Instruction* dest,
59                                   std::vector<MachineInstr*>& mvec,
60                                   MachineCodeForInstruction& mcfi) const {
61     abort();
62   }
63   void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F,
64                                   Value* val, Instruction* dest,
65                                   std::vector<MachineInstr*>& mvec,
66                                   MachineCodeForInstruction& mcfi)const {
67     abort();
68   }
69   void CreateCopyInstructionsByType(const TargetMachine& target,
70                                     Function* F, Value* src,
71                                     Instruction* dest,
72                                     std::vector<MachineInstr*>& mvec,
73                                     MachineCodeForInstruction& mcfi)const {
74     abort();
75   }
76   
77   void CreateSignExtensionInstructions(const TargetMachine& target,
78                                        Function* F, Value* srcVal,
79                                        Value* destVal, unsigned numLowBits,
80                                        std::vector<MachineInstr*>& mvec,
81                                        MachineCodeForInstruction& mcfi) const {
82     abort();
83   }
84
85   void CreateZeroExtensionInstructions(const TargetMachine& target,
86                                        Function* F, Value* srcVal,
87                                        Value* destVal, unsigned srcSizeInBits,
88                                        std::vector<MachineInstr*>& mvec,
89                                        MachineCodeForInstruction& mcfi) const {
90     abort();
91   }
92 };
93
94
95 #endif