1 //===-- X86ISelLowering.h - X86 DAG Lowering Interface ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that X86 uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef X86ISELLOWERING_H
16 #define X86ISELLOWERING_H
18 #include "llvm/Target/TargetLowering.h"
19 #include "llvm/CodeGen/SelectionDAG.h"
23 // X86 Specific DAG Nodes
25 // Start the numbering where the builtin ops leave off.
26 FIRST_NUMBER = ISD::BUILTIN_OP_END+X86::INSTRUCTION_LIST_END,
28 /// ADD_FLAG, SUB_FLAG - Same as ISD::ADD and ISD::SUB except it also
29 /// produces a flag result.
33 /// ADC, SBB - Add with carry and subtraction with borrow. These
34 /// correspond to X86::ADCxx and X86::SBBxx instructions.
38 /// SHLD, SHRD - Double shift instructions. These correspond to
39 /// X86::SHLDxx and X86::SHRDxx instructions.
43 /// FILD - This instruction implements SINT_TO_FP with the integer source
44 /// in memory and FP reg result. This corresponds to the X86::FILD*m
45 /// instructions. It has three inputs (token chain, address, and source
46 /// type) and two outputs (FP value and token chain).
49 /// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
50 /// integer destination in memory and a FP reg source. This corresponds
51 /// to the X86::FIST*m instructions and the rounding mode change stuff. It
52 /// has two inputs (token chain and address) and two outputs (int value and
58 /// FLD - This instruction implements an extending load to FP stack slots.
59 /// This corresponds to the X86::FLD32m / X86::FLD64m. It takes a chain
60 /// operand, ptr to load from, and a ValueType node indicating the type
64 /// FST - This instruction implements a truncating store to FP stack
65 /// slots. This corresponds to the X86::FST32m / X86::FST64m. It takes a
66 /// chain operand, value to store, address, and a ValueType to store it
70 /// FP_SET_RESULT - This corresponds to FpGETRESULT pseudo instrcuction
71 /// which copies from ST(0) to the destination. It takes a chain and writes
72 /// a RFP result and a chain.
75 /// FP_SET_RESULT - This corresponds to FpSETRESULT pseudo instrcuction
76 /// which copies the source operand to ST(0). It takes a chain and writes
77 /// a chain and a flag.
80 /// CALL/TAILCALL - These operations represent an abstract X86 call
81 /// instruction, which includes a bunch of information. In particular the
82 /// operands of these node are:
84 /// #0 - The incoming token chain
86 /// #2 - The number of arg bytes the caller pushes on the stack.
87 /// #3 - The number of arg bytes the callee pops off the stack.
88 /// #4 - The value to pass in AL/AX/EAX (optional)
89 /// #5 - The value to pass in DL/DX/EDX (optional)
91 /// The result values of these nodes are:
93 /// #0 - The outgoing token chain
94 /// #1 - The first register result value (optional)
95 /// #2 - The second register result value (optional)
97 /// The CALL vs TAILCALL distinction boils down to whether the callee is
98 /// known not to modify the caller's stack frame, as is standard with
103 /// RDTSC_DAG - This operation implements the lowering for
107 /// X86 compare and logical compare instructions.
110 /// X86 SetCC. Operand 1 is condition code, and operand 2 is the flag
111 /// operand produced by a CMP instruction.
114 /// X86 conditional moves. Operand 1 and operand 2 are the two values
115 /// to select from (operand 1 is a R/W operand). Operand 3 is the condition
116 /// code, and operand 4 is the flag operand produced by a CMP or TEST
117 /// instruction. It also writes a flag result.
120 /// X86 conditional branches. Operand 1 is the chain operand, operand 2
121 /// is the block to branch if condition is true, operand 3 is the
122 /// condition code, and operand 4 is the flag operand produced by a CMP
123 /// or TEST instruction.
126 /// Return with a flag operand. Operand 1 is the chain operand, operand
127 /// 2 is the number of bytes of stack to pop.
130 /// REP_STOS - Repeat fill, corresponds to X86::REP_STOSx.
133 /// REP_MOVS - Repeat move, corresponds to X86::REP_MOVSx.
137 // X86 specific condition code. These correspond to X86_*_COND in
138 // X86InstrInfo.td. They must be kept in synch.
160 //===----------------------------------------------------------------------===//
161 // X86TargetLowering - X86 Implementation of the TargetLowering interface
162 class X86TargetLowering : public TargetLowering {
163 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
164 int ReturnAddrIndex; // FrameIndex for return slot.
165 int BytesToPopOnReturn; // Number of arg bytes ret should pop.
166 int BytesCallerReserves; // Number of arg bytes caller makes.
168 X86TargetLowering(TargetMachine &TM);
170 // Return the number of bytes that a function should pop when it returns (in
171 // addition to the space used by the return address).
173 unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; }
175 // Return the number of bytes that the caller reserves for arguments passed
177 unsigned getBytesCallerReserves() const { return BytesCallerReserves; }
179 /// LowerOperation - Provide custom lowering hooks for some operations.
181 virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
183 /// LowerArguments - This hook must be implemented to indicate how we should
184 /// lower the arguments for the specified function, into the specified DAG.
185 virtual std::vector<SDOperand>
186 LowerArguments(Function &F, SelectionDAG &DAG);
188 /// LowerCallTo - This hook lowers an abstract call to a function into an
190 virtual std::pair<SDOperand, SDOperand>
191 LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, unsigned CC,
192 bool isTailCall, SDOperand Callee, ArgListTy &Args,
195 virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op,
198 virtual std::pair<SDOperand, SDOperand>
199 LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
202 virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
203 MachineBasicBlock *MBB);
205 /// getTargetNodeName - This method returns the name of a target specific
207 virtual const char *getTargetNodeName(unsigned Opcode) const;
209 /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to
210 /// be zero. Op is expected to be a target specific node. Used by DAG
212 virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,
213 uint64_t Mask) const;
215 SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);
218 // C Calling Convention implementation.
219 std::vector<SDOperand> LowerCCCArguments(Function &F, SelectionDAG &DAG);
220 std::pair<SDOperand, SDOperand>
221 LowerCCCCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
223 SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
225 // Fast Calling Convention implementation.
226 std::vector<SDOperand> LowerFastCCArguments(Function &F, SelectionDAG &DAG);
227 std::pair<SDOperand, SDOperand>
228 LowerFastCCCallTo(SDOperand Chain, const Type *RetTy, bool isTailCall,
229 SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
233 #endif // X86ISELLOWERING_H