1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
21 #include "llvm/Analysis/LibCallSemantics.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/WinEHFuncInfo.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/Support/Debug.h"
38 X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
39 unsigned StackAlignOverride)
40 : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41 STI.is64Bit() ? -8 : -4),
42 STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43 // Cache a bunch of frame-related predicates for this subtarget.
44 SlotSize = TRI->getSlotSize();
45 Is64Bit = STI.is64Bit();
46 IsLP64 = STI.isTarget64BitLP64();
47 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
48 Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();
49 StackPtr = TRI->getStackRegister();
52 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
53 return !MF.getFrameInfo()->hasVarSizedObjects() &&
54 !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
62 X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
63 return hasReservedCallFrame(MF) ||
64 (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65 TRI->hasBasePointer(MF);
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
76 X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const {
77 return MF.getFrameInfo()->hasStackObjects() ||
78 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
84 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
85 const MachineFrameInfo *MFI = MF.getFrameInfo();
86 const MachineModuleInfo &MMI = MF.getMMI();
88 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
89 TRI->needsStackRealignment(MF) ||
90 MFI->hasVarSizedObjects() ||
91 MFI->isFrameAddressTaken() || MFI->hasOpaqueSPAdjustment() ||
92 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
93 MMI.callsUnwindInit() || MMI.hasEHFunclets() || MMI.callsEHReturn() ||
94 MFI->hasStackMap() || MFI->hasPatchPoint());
97 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
100 return X86::SUB64ri8;
101 return X86::SUB64ri32;
104 return X86::SUB32ri8;
109 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
112 return X86::ADD64ri8;
113 return X86::ADD64ri32;
116 return X86::ADD32ri8;
121 static unsigned getSUBrrOpcode(unsigned isLP64) {
122 return isLP64 ? X86::SUB64rr : X86::SUB32rr;
125 static unsigned getADDrrOpcode(unsigned isLP64) {
126 return isLP64 ? X86::ADD64rr : X86::ADD32rr;
129 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
132 return X86::AND64ri8;
133 return X86::AND64ri32;
136 return X86::AND32ri8;
140 static unsigned getLEArOpcode(unsigned IsLP64) {
141 return IsLP64 ? X86::LEA64r : X86::LEA32r;
144 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
145 /// when it reaches the "return" instruction. We can then pop a stack object
146 /// to this register without worry about clobbering it.
147 static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB,
148 MachineBasicBlock::iterator &MBBI,
149 const TargetRegisterInfo *TRI,
151 const MachineFunction *MF = MBB.getParent();
152 const Function *F = MF->getFunction();
153 if (!F || MF->getMMI().callsEHReturn())
156 static const uint16_t CallerSavedRegs32Bit[] = {
157 X86::EAX, X86::EDX, X86::ECX, 0
160 static const uint16_t CallerSavedRegs64Bit[] = {
161 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI,
162 X86::R8, X86::R9, X86::R10, X86::R11, 0
165 unsigned Opc = MBBI->getOpcode();
172 case X86::TCRETURNdi:
173 case X86::TCRETURNri:
174 case X86::TCRETURNmi:
175 case X86::TCRETURNdi64:
176 case X86::TCRETURNri64:
177 case X86::TCRETURNmi64:
179 case X86::EH_RETURN64: {
180 SmallSet<uint16_t, 8> Uses;
181 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
182 MachineOperand &MO = MBBI->getOperand(i);
183 if (!MO.isReg() || MO.isDef())
185 unsigned Reg = MO.getReg();
188 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
192 const uint16_t *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit;
194 if (!Uses.count(*CS))
202 static bool isEAXLiveIn(MachineFunction &MF) {
203 for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(),
204 EE = MF.getRegInfo().livein_end(); II != EE; ++II) {
205 unsigned Reg = II->first;
207 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
208 Reg == X86::AH || Reg == X86::AL)
215 /// Check whether or not the terminators of \p MBB needs to read EFLAGS.
216 static bool terminatorsNeedFlagsAsInput(const MachineBasicBlock &MBB) {
217 for (const MachineInstr &MI : MBB.terminators()) {
218 bool BreakNext = false;
219 for (const MachineOperand &MO : MI.operands()) {
222 unsigned Reg = MO.getReg();
223 if (Reg != X86::EFLAGS)
226 // This terminator needs an eflag that is not defined
227 // by a previous terminator.
238 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
239 /// stack pointer by a constant value.
240 void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
241 MachineBasicBlock::iterator &MBBI,
242 int64_t NumBytes, bool InEpilogue) const {
243 bool isSub = NumBytes < 0;
244 uint64_t Offset = isSub ? -NumBytes : NumBytes;
246 uint64_t Chunk = (1LL << 31) - 1;
247 DebugLoc DL = MBB.findDebugLoc(MBBI);
250 if (Offset > Chunk) {
251 // Rather than emit a long series of instructions for large offsets,
252 // load the offset into a register and do one sub/add
255 if (isSub && !isEAXLiveIn(*MBB.getParent()))
256 Reg = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
258 Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
261 unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
262 BuildMI(MBB, MBBI, DL, TII.get(Opc), Reg)
265 ? getSUBrrOpcode(Is64Bit)
266 : getADDrrOpcode(Is64Bit);
267 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
270 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
276 uint64_t ThisVal = std::min(Offset, Chunk);
277 if (ThisVal == (Is64Bit ? 8 : 4)) {
278 // Use push / pop instead.
280 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
281 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
284 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
285 : (Is64Bit ? X86::POP64r : X86::POP32r);
286 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
287 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
289 MI->setFlag(MachineInstr::FrameSetup);
291 MI->setFlag(MachineInstr::FrameDestroy);
297 MachineInstrBuilder MI = BuildStackAdjustment(
298 MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue);
300 MI.setMIFlag(MachineInstr::FrameSetup);
302 MI.setMIFlag(MachineInstr::FrameDestroy);
308 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
309 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc DL,
310 int64_t Offset, bool InEpilogue) const {
311 assert(Offset != 0 && "zero offset stack adjustment requested");
313 // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
317 UseLEA = STI.useLeaForSP();
319 // If we can use LEA for SP but we shouldn't, check that none
320 // of the terminators uses the eflags. Otherwise we will insert
321 // a ADD that will redefine the eflags and break the condition.
322 // Alternatively, we could move the ADD, but this may not be possible
323 // and is an optimization anyway.
324 UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
325 if (UseLEA && !STI.useLeaForSP())
326 UseLEA = terminatorsNeedFlagsAsInput(MBB);
327 // If that assert breaks, that means we do not do the right thing
328 // in canUseAsEpilogue.
329 assert((UseLEA || !terminatorsNeedFlagsAsInput(MBB)) &&
330 "We shouldn't have allowed this insertion point");
333 MachineInstrBuilder MI;
335 MI = addRegOffset(BuildMI(MBB, MBBI, DL,
336 TII.get(getLEArOpcode(Uses64BitFramePtr)),
338 StackPtr, false, Offset);
340 bool IsSub = Offset < 0;
341 uint64_t AbsOffset = IsSub ? -Offset : Offset;
342 unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
343 : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
344 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
347 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
352 int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
353 MachineBasicBlock::iterator &MBBI,
354 bool doMergeWithPrevious) const {
355 if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
356 (!doMergeWithPrevious && MBBI == MBB.end()))
359 MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
360 MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
362 unsigned Opc = PI->getOpcode();
365 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
366 Opc == X86::ADD32ri || Opc == X86::ADD32ri8 ||
367 Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
368 PI->getOperand(0).getReg() == StackPtr){
369 Offset += PI->getOperand(2).getImm();
371 if (!doMergeWithPrevious) MBBI = NI;
372 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
373 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
374 PI->getOperand(0).getReg() == StackPtr) {
375 Offset -= PI->getOperand(2).getImm();
377 if (!doMergeWithPrevious) MBBI = NI;
383 void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB,
384 MachineBasicBlock::iterator MBBI, DebugLoc DL,
385 MCCFIInstruction CFIInst) const {
386 MachineFunction &MF = *MBB.getParent();
387 unsigned CFIIndex = MF.getMMI().addFrameInst(CFIInst);
388 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
389 .addCFIIndex(CFIIndex);
393 X86FrameLowering::emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
394 MachineBasicBlock::iterator MBBI,
396 MachineFunction &MF = *MBB.getParent();
397 MachineFrameInfo *MFI = MF.getFrameInfo();
398 MachineModuleInfo &MMI = MF.getMMI();
399 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
401 // Add callee saved registers to move list.
402 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
403 if (CSI.empty()) return;
405 // Calculate offsets.
406 for (std::vector<CalleeSavedInfo>::const_iterator
407 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
408 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
409 unsigned Reg = I->getReg();
411 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
412 BuildCFI(MBB, MBBI, DL,
413 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
417 /// usesTheStack - This function checks if any of the users of EFLAGS
418 /// copies the EFLAGS. We know that the code that lowers COPY of EFLAGS has
419 /// to use the stack, and if we don't adjust the stack we clobber the first
421 /// See X86InstrInfo::copyPhysReg.
422 static bool usesTheStack(const MachineFunction &MF) {
423 const MachineRegisterInfo &MRI = MF.getRegInfo();
425 for (MachineRegisterInfo::reg_instr_iterator
426 ri = MRI.reg_instr_begin(X86::EFLAGS), re = MRI.reg_instr_end();
434 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
435 MachineBasicBlock &MBB,
436 MachineBasicBlock::iterator MBBI,
438 bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
442 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
444 CallOp = X86::CALLpcrel32;
448 if (STI.isTargetCygMing()) {
449 Symbol = "___chkstk_ms";
453 } else if (STI.isTargetCygMing())
458 MachineInstrBuilder CI;
460 // All current stack probes take AX and SP as input, clobber flags, and
461 // preserve all registers. x86_64 probes leave RSP unmodified.
462 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
463 // For the large code model, we have to call through a register. Use R11,
464 // as it is scratch in all supported calling conventions.
465 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
466 .addExternalSymbol(Symbol);
467 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
469 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol);
472 unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
473 unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
474 CI.addReg(AX, RegState::Implicit)
475 .addReg(SP, RegState::Implicit)
476 .addReg(AX, RegState::Define | RegState::Implicit)
477 .addReg(SP, RegState::Define | RegState::Implicit)
478 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
481 // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
482 // themselves. It also does not clobber %rax so we can reuse it when
484 BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
490 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
491 // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
492 // and might require smaller successive adjustments.
493 const uint64_t Win64MaxSEHOffset = 128;
494 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
495 // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
496 return SEHFrameOffset & -16;
499 // If we're forcing a stack realignment we can't rely on just the frame
500 // info, we need to know the ABI stack alignment as well in case we
501 // have a call out. Otherwise just make sure we have some alignment - we'll
502 // go with the minimum SlotSize.
503 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
504 const MachineFrameInfo *MFI = MF.getFrameInfo();
505 uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment.
506 unsigned StackAlign = getStackAlignment();
507 if (MF.getFunction()->hasFnAttribute("stackrealign")) {
509 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
510 else if (MaxAlign < SlotSize)
516 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
517 MachineBasicBlock::iterator MBBI,
518 DebugLoc DL, unsigned Reg,
519 uint64_t MaxAlign) const {
520 uint64_t Val = -MaxAlign;
521 unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
522 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
525 .setMIFlag(MachineInstr::FrameSetup);
527 // The EFLAGS implicit def is dead.
528 MI->getOperand(3).setIsDead();
531 /// emitPrologue - Push callee-saved registers onto the stack, which
532 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
533 /// space for local variables. Also emit labels used by the exception handler to
534 /// generate the exception handling frames.
537 Here's a gist of what gets emitted:
539 ; Establish frame pointer, if needed
542 .cfi_def_cfa_offset 16
543 .cfi_offset %rbp, -16
546 .cfi_def_cfa_register %rbp
548 ; Spill general-purpose registers
549 [for all callee-saved GPRs]
552 .cfi_def_cfa_offset (offset from RETADDR)
555 ; If the required stack alignment > default stack alignment
556 ; rsp needs to be re-aligned. This creates a "re-alignment gap"
557 ; of unknown size in the stack frame.
558 [if stack needs re-alignment]
561 ; Allocate space for locals
562 [if target is Windows and allocated space > 4096 bytes]
563 ; Windows needs special care for allocations larger
566 call ___chkstk_ms/___chkstk
572 .seh_stackalloc (size of XMM spill slots)
573 .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
578 ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
579 ; they may get spilled on any platform, if the current function
580 ; calls @llvm.eh.unwind.init
582 [for all callee-saved XMM registers]
583 movaps %<xmm reg>, -MMM(%rbp)
584 [for all callee-saved XMM registers]
585 .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
586 ; i.e. the offset relative to (%rbp - SEHFrameOffset)
588 [for all callee-saved XMM registers]
589 movaps %<xmm reg>, KKK(%rsp)
590 [for all callee-saved XMM registers]
591 .seh_savexmm %<xmm reg>, KKK
595 [if needs base pointer]
597 [if needs to restore base pointer]
602 [for all callee-saved registers]
603 .cfi_offset %<reg>, (offset from %rbp)
605 .cfi_def_cfa_offset (offset from RETADDR)
606 [for all callee-saved registers]
607 .cfi_offset %<reg>, (offset from %rsp)
610 - .seh directives are emitted only for Windows 64 ABI
611 - .cfi directives are emitted for all other ABIs
612 - for 32-bit code, substitute %e?? registers for %r??
615 void X86FrameLowering::emitPrologue(MachineFunction &MF,
616 MachineBasicBlock &MBB) const {
617 assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
618 "MF used frame lowering for wrong subtarget");
619 MachineBasicBlock::iterator MBBI = MBB.begin();
620 MachineFrameInfo *MFI = MF.getFrameInfo();
621 const Function *Fn = MF.getFunction();
622 MachineModuleInfo &MMI = MF.getMMI();
623 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
624 uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
625 uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate.
626 bool IsFunclet = MBB.isEHFuncletEntry();
629 classifyEHPersonality(Fn->getPersonalityFn()) == EHPersonality::CoreCLR;
630 bool HasFP = hasFP(MF);
631 bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
632 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
633 bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
635 !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
636 unsigned FramePtr = TRI->getFrameRegister(MF);
637 const unsigned MachineFramePtr =
638 STI.isTarget64BitILP32()
639 ? getX86SubSuperRegister(FramePtr, MVT::i64, false)
641 unsigned BasePtr = TRI->getBaseRegister();
643 // Debug location must be unknown since the first debug location is used
644 // to determine the end of the prologue.
647 // Add RETADDR move area to callee saved frame size.
648 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
649 if (TailCallReturnAddrDelta && IsWin64Prologue)
650 report_fatal_error("Can't handle guaranteed tail call under win64 yet");
652 if (TailCallReturnAddrDelta < 0)
653 X86FI->setCalleeSavedFrameSize(
654 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
656 bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO());
658 // The default stack probe size is 4096 if the function has no stackprobesize
660 unsigned StackProbeSize = 4096;
661 if (Fn->hasFnAttribute("stack-probe-size"))
662 Fn->getFnAttribute("stack-probe-size")
664 .getAsInteger(0, StackProbeSize);
666 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
667 // function, and use up to 128 bytes of stack space, don't have a frame
668 // pointer, calls, or dynamic alloca then we do not need to adjust the
669 // stack pointer (we fit in the Red Zone). We also check that we don't
670 // push and pop from the stack.
671 if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
672 !TRI->needsStackRealignment(MF) &&
673 !MFI->hasVarSizedObjects() && // No dynamic alloca.
674 !MFI->adjustsStack() && // No calls.
675 !IsWin64CC && // Win64 has no Red Zone
676 !usesTheStack(MF) && // Don't push and pop.
677 !MF.shouldSplitStack()) { // Regular stack
678 uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
679 if (HasFP) MinSize += SlotSize;
680 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
681 MFI->setStackSize(StackSize);
684 // Insert stack pointer adjustment for later moving of return addr. Only
685 // applies to tail call optimized functions where the callee argument stack
686 // size is bigger than the callers.
687 if (TailCallReturnAddrDelta < 0) {
688 BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
689 /*InEpilogue=*/false)
690 .setMIFlag(MachineInstr::FrameSetup);
693 // Mapping for machine moves:
695 // DST: VirtualFP AND
696 // SRC: VirtualFP => DW_CFA_def_cfa_offset
697 // ELSE => DW_CFA_def_cfa
699 // SRC: VirtualFP AND
700 // DST: Register => DW_CFA_def_cfa_register
703 // OFFSET < 0 => DW_CFA_offset_extended_sf
704 // REG < 64 => DW_CFA_offset + Reg
705 // ELSE => DW_CFA_offset_extended
707 uint64_t NumBytes = 0;
708 int stackGrowth = -SlotSize;
710 // Find the funclet establisher parameter
711 unsigned Establisher = X86::NoRegister;
713 Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
715 Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
717 if (IsWin64Prologue && IsFunclet & !IsClrFunclet) {
718 // Immediately spill establisher into the home slot.
719 // The runtime cares about this.
720 // MOV64mr %rdx, 16(%rsp)
721 unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
722 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
724 .setMIFlag(MachineInstr::FrameSetup);
728 // Calculate required stack adjustment.
729 uint64_t FrameSize = StackSize - SlotSize;
730 // If required, include space for extra hidden slot for stashing base pointer.
731 if (X86FI->getRestoreBasePointer())
732 FrameSize += SlotSize;
734 NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
736 // Callee-saved registers are pushed on stack before the stack is realigned.
737 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
738 NumBytes = RoundUpToAlignment(NumBytes, MaxAlign);
740 // Get the offset of the stack slot for the EBP register, which is
741 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
742 // Update the frame offset adjustment.
744 MFI->setOffsetAdjustment(-NumBytes);
746 assert(MFI->getOffsetAdjustment() == -(int)NumBytes &&
747 "should calculate same local variable offset for funclets");
749 // Save EBP/RBP into the appropriate stack slot.
750 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
751 .addReg(MachineFramePtr, RegState::Kill)
752 .setMIFlag(MachineInstr::FrameSetup);
755 // Mark the place where EBP/RBP was saved.
756 // Define the current CFA rule to use the provided offset.
758 BuildCFI(MBB, MBBI, DL,
759 MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
761 // Change the rule for the FramePtr to be an "offset" rule.
762 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
763 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset(
764 nullptr, DwarfFramePtr, 2 * stackGrowth));
768 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
770 .setMIFlag(MachineInstr::FrameSetup);
773 if (!IsWin64Prologue && !IsFunclet) {
774 // Update EBP with the new base value.
775 BuildMI(MBB, MBBI, DL,
776 TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
779 .setMIFlag(MachineInstr::FrameSetup);
782 // Mark effective beginning of when frame pointer becomes valid.
783 // Define the current CFA to use the EBP/RBP register.
784 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
785 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaRegister(
786 nullptr, DwarfFramePtr));
790 // Mark the FramePtr as live-in in every block.
791 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
792 I->addLiveIn(MachineFramePtr);
794 assert(!IsFunclet && "funclets without FPs not yet implemented");
795 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
798 // For EH funclets, only allocate enough space for outgoing calls. Save the
799 // NumBytes value that we would've used for the parent frame.
800 unsigned ParentFrameNumBytes = NumBytes;
802 NumBytes = getWinEHFuncletFrameSize(MF);
804 // Skip the callee-saved push instructions.
805 bool PushedRegs = false;
806 int StackOffset = 2 * stackGrowth;
808 while (MBBI != MBB.end() &&
809 MBBI->getFlag(MachineInstr::FrameSetup) &&
810 (MBBI->getOpcode() == X86::PUSH32r ||
811 MBBI->getOpcode() == X86::PUSH64r)) {
813 unsigned Reg = MBBI->getOperand(0).getReg();
816 if (!HasFP && NeedsDwarfCFI) {
817 // Mark callee-saved push instruction.
818 // Define the current CFA rule to use the provided offset.
820 BuildCFI(MBB, MBBI, DL,
821 MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
822 StackOffset += stackGrowth;
826 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag(
827 MachineInstr::FrameSetup);
831 // Realign stack after we pushed callee-saved registers (so that we'll be
832 // able to calculate their offsets from the frame pointer).
833 // Don't do this for Win64, it needs to realign the stack after the prologue.
834 if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
835 assert(HasFP && "There should be a frame pointer if stack is realigned.");
836 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
839 // If there is an SUB32ri of ESP immediately before this instruction, merge
840 // the two. This can be the case when tail call elimination is enabled and
841 // the callee has more arguments then the caller.
842 NumBytes -= mergeSPUpdates(MBB, MBBI, true);
844 // Adjust stack pointer: ESP -= numbytes.
846 // Windows and cygwin/mingw require a prologue helper routine when allocating
847 // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
848 // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
849 // stack and adjust the stack pointer in one go. The 64-bit version of
850 // __chkstk is only responsible for probing the stack. The 64-bit prologue is
851 // responsible for adjusting the stack pointer. Touching the stack at 4K
852 // increments is necessary to ensure that the guard pages used by the OS
853 // virtual memory manager are allocated in correct sequence.
854 uint64_t AlignedNumBytes = NumBytes;
855 if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
856 AlignedNumBytes = RoundUpToAlignment(AlignedNumBytes, MaxAlign);
857 if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
858 // Check whether EAX is livein for this function.
859 bool isEAXAlive = isEAXLiveIn(MF);
862 // Sanity check that EAX is not livein for this function.
863 // It should not be, so throw an assert.
864 assert(!Is64Bit && "EAX is livein in x64 case!");
867 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
868 .addReg(X86::EAX, RegState::Kill)
869 .setMIFlag(MachineInstr::FrameSetup);
873 // Handle the 64-bit Windows ABI case where we need to call __chkstk.
874 // Function prologue is responsible for adjusting the stack pointer.
875 if (isUInt<32>(NumBytes)) {
876 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
878 .setMIFlag(MachineInstr::FrameSetup);
879 } else if (isInt<32>(NumBytes)) {
880 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
882 .setMIFlag(MachineInstr::FrameSetup);
884 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
886 .setMIFlag(MachineInstr::FrameSetup);
889 // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
890 // We'll also use 4 already allocated bytes for EAX.
891 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
892 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
893 .setMIFlag(MachineInstr::FrameSetup);
896 // Save a pointer to the MI where we set AX.
897 MachineBasicBlock::iterator SetRAX = MBBI;
900 // Call __chkstk, __chkstk_ms, or __alloca.
901 emitStackProbeCall(MF, MBB, MBBI, DL);
903 // Apply the frame setup flag to all inserted instrs.
904 for (; SetRAX != MBBI; ++SetRAX)
905 SetRAX->setFlag(MachineInstr::FrameSetup);
909 MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm),
911 StackPtr, false, NumBytes - 4);
912 MI->setFlag(MachineInstr::FrameSetup);
913 MBB.insert(MBBI, MI);
915 } else if (NumBytes) {
916 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
919 if (NeedsWinCFI && NumBytes)
920 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
922 .setMIFlag(MachineInstr::FrameSetup);
924 int SEHFrameOffset = 0;
925 unsigned SPOrEstablisher = IsFunclet ? Establisher : StackPtr;
926 if (IsWin64Prologue && HasFP) {
927 // Set RBP to a small fixed offset from RSP. In the funclet case, we base
928 // this calculation on the incoming establisher, which holds the value of
929 // RSP from the parent frame at the end of the prologue.
930 SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
932 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
933 SPOrEstablisher, false, SEHFrameOffset);
935 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
936 .addReg(SPOrEstablisher);
938 // If this is not a funclet, emit the CFI describing our frame pointer.
939 if (NeedsWinCFI && !IsFunclet)
940 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
942 .addImm(SEHFrameOffset)
943 .setMIFlag(MachineInstr::FrameSetup);
944 } else if (IsFunclet && STI.is32Bit()) {
945 // Reset EBP / ESI to something good for funclets.
946 MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
949 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
950 const MachineInstr *FrameInstr = &*MBBI;
955 if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
956 if (X86::FR64RegClass.contains(Reg)) {
957 unsigned IgnoredFrameReg;
958 int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
959 Offset += SEHFrameOffset;
961 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
964 .setMIFlag(MachineInstr::FrameSetup);
971 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
972 .setMIFlag(MachineInstr::FrameSetup);
974 // Realign stack after we spilled callee-saved registers (so that we'll be
975 // able to calculate their offsets from the frame pointer).
976 // Win64 requires aligning the stack after the prologue.
977 if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
978 assert(HasFP && "There should be a frame pointer if stack is realigned.");
979 BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
982 // We already dealt with stack realignment and funclets above.
983 if (IsFunclet && STI.is32Bit())
986 // If we need a base pointer, set it up here. It's whatever the value
987 // of the stack pointer is at this point. Any variable size objects
988 // will be allocated after this, so we can still use the base pointer
989 // to reference locals.
990 if (TRI->hasBasePointer(MF)) {
991 // Update the base pointer with the current stack pointer.
992 unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
993 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
994 .addReg(SPOrEstablisher)
995 .setMIFlag(MachineInstr::FrameSetup);
996 if (X86FI->getRestoreBasePointer()) {
997 // Stash value of base pointer. Saving RSP instead of EBP shortens
998 // dependence chain. Used by SjLj EH.
999 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1000 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1001 FramePtr, true, X86FI->getRestoreBasePointerOffset())
1002 .addReg(SPOrEstablisher)
1003 .setMIFlag(MachineInstr::FrameSetup);
1006 if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1007 // Stash the value of the frame pointer relative to the base pointer for
1008 // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1009 // it recovers the frame pointer from the base pointer rather than the
1010 // other way around.
1011 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1014 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1015 assert(UsedReg == BasePtr);
1016 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1018 .setMIFlag(MachineInstr::FrameSetup);
1022 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1023 // Mark end of stack pointer adjustment.
1024 if (!HasFP && NumBytes) {
1025 // Define the current CFA rule to use the provided offset.
1027 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaOffset(
1028 nullptr, -StackSize + stackGrowth));
1031 // Emit DWARF info specifying the offsets of the callee-saved registers.
1033 emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1037 bool X86FrameLowering::canUseLEAForSPInEpilogue(
1038 const MachineFunction &MF) const {
1039 // We can't use LEA instructions for adjusting the stack pointer if this is a
1040 // leaf function in the Win64 ABI. Only ADD instructions may be used to
1041 // deallocate the stack.
1042 // This means that we can use LEA for SP in two situations:
1043 // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1044 // 2. We *have* a frame pointer which means we are permitted to use LEA.
1045 return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1048 static bool isFuncletReturnInstr(MachineInstr *MI) {
1049 switch (MI->getOpcode()) {
1051 case X86::CLEANUPRET:
1056 llvm_unreachable("impossible");
1059 unsigned X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1060 // This is the size of the pushed CSRs.
1062 MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1063 // This is the amount of stack a funclet needs to allocate.
1064 unsigned MaxCallSize = MF.getFrameInfo()->getMaxCallFrameSize();
1065 // RBP is not included in the callee saved register block. After pushing RBP,
1066 // everything is 16 byte aligned. Everything we allocate before an outgoing
1067 // call must also be 16 byte aligned.
1068 unsigned FrameSizeMinusRBP =
1069 RoundUpToAlignment(CSSize + MaxCallSize, getStackAlignment());
1070 // Subtract out the size of the callee saved registers. This is how much stack
1071 // each funclet will allocate.
1072 return FrameSizeMinusRBP - CSSize;
1075 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
1076 MachineBasicBlock &MBB) const {
1077 const MachineFrameInfo *MFI = MF.getFrameInfo();
1078 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1079 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
1081 if (MBBI != MBB.end())
1082 DL = MBBI->getDebugLoc();
1083 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1084 const bool Is64BitILP32 = STI.isTarget64BitILP32();
1085 unsigned FramePtr = TRI->getFrameRegister(MF);
1086 unsigned MachineFramePtr =
1087 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, MVT::i64, false)
1090 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1092 IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
1093 bool IsFunclet = isFuncletReturnInstr(MBBI);
1094 MachineBasicBlock *RestoreMBB = nullptr;
1096 // Get the number of bytes to allocate from the FrameInfo.
1097 uint64_t StackSize = MFI->getStackSize();
1098 uint64_t MaxAlign = calculateMaxStackAlign(MF);
1099 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1100 uint64_t NumBytes = 0;
1102 if (MBBI->getOpcode() == X86::CATCHRET) {
1103 NumBytes = getWinEHFuncletFrameSize(MF);
1104 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1105 MachineBasicBlock *TargetMBB = MBBI->getOperand(0).getMBB();
1107 // If this is SEH, this isn't really a funclet return.
1108 bool IsSEH = isAsynchronousEHPersonality(
1109 classifyEHPersonality(MF.getFunction()->getPersonalityFn()));
1112 restoreWin32EHStackPointers(MBB, MBBI, DL, /*RestoreSP=*/true);
1113 BuildMI(MBB, MBBI, DL, TII.get(X86::JMP_4)).addMBB(TargetMBB);
1114 MBBI->eraseFromParent();
1118 // For 32-bit, create a new block for the restore code.
1119 RestoreMBB = TargetMBB;
1120 if (STI.is32Bit()) {
1121 RestoreMBB = MF.CreateMachineBasicBlock(MBB.getBasicBlock());
1122 MF.insert(TargetMBB->getIterator(), RestoreMBB);
1123 MBB.removeSuccessor(TargetMBB);
1124 MBB.addSuccessor(RestoreMBB);
1125 RestoreMBB->addSuccessor(TargetMBB);
1126 MBBI->getOperand(0).setMBB(RestoreMBB);
1130 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1132 .setMIFlag(MachineInstr::FrameDestroy);
1134 // Insert frame restoration code in a new block.
1135 if (STI.is32Bit()) {
1136 auto RestoreMBBI = RestoreMBB->begin();
1137 restoreWin32EHStackPointers(*RestoreMBB, RestoreMBBI, DL,
1138 /*RestoreSP=*/true);
1139 BuildMI(*RestoreMBB, RestoreMBBI, DL, TII.get(X86::JMP_4))
1142 } else if (MBBI->getOpcode() == X86::CLEANUPRET) {
1143 NumBytes = getWinEHFuncletFrameSize(MF);
1144 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1145 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1147 .setMIFlag(MachineInstr::FrameDestroy);
1148 } else if (hasFP(MF)) {
1149 // Calculate required stack adjustment.
1150 uint64_t FrameSize = StackSize - SlotSize;
1151 NumBytes = FrameSize - CSSize;
1153 // Callee-saved registers were pushed on stack before the stack was
1155 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1156 NumBytes = RoundUpToAlignment(FrameSize, MaxAlign);
1159 BuildMI(MBB, MBBI, DL,
1160 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
1161 .setMIFlag(MachineInstr::FrameDestroy);
1163 NumBytes = StackSize - CSSize;
1165 uint64_t SEHStackAllocAmt = NumBytes;
1167 // Skip the callee-saved pop instructions.
1168 while (MBBI != MBB.begin()) {
1169 MachineBasicBlock::iterator PI = std::prev(MBBI);
1170 unsigned Opc = PI->getOpcode();
1172 if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1173 (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1174 Opc != X86::DBG_VALUE && !PI->isTerminator())
1179 MachineBasicBlock::iterator FirstCSPop = MBBI;
1182 // Fill EAX/RAX with the address of the target block.
1183 unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX;
1184 if (STI.is64Bit()) {
1185 // LEA64r RestoreMBB(%rip), %rax
1186 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg)
1193 // MOV32ri $RestoreMBB, %eax
1194 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri))
1196 .addMBB(RestoreMBB);
1198 // Record that we've taken the address of RestoreMBB and no longer just
1199 // reference it in a terminator.
1200 RestoreMBB->setHasAddressTaken();
1203 if (MBBI != MBB.end())
1204 DL = MBBI->getDebugLoc();
1206 // If there is an ADD32ri or SUB32ri of ESP immediately before this
1207 // instruction, merge the two instructions.
1208 if (NumBytes || MFI->hasVarSizedObjects())
1209 NumBytes += mergeSPUpdates(MBB, MBBI, true);
1211 // If dynamic alloca is used, then reset esp to point to the last callee-saved
1212 // slot before popping them off! Same applies for the case, when stack was
1213 // realigned. Don't do this if this was a funclet epilogue, since the funclets
1214 // will not do realignment or dynamic stack allocation.
1215 if ((TRI->needsStackRealignment(MF) || MFI->hasVarSizedObjects()) &&
1217 if (TRI->needsStackRealignment(MF))
1219 unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1220 uint64_t LEAAmount =
1221 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1223 // There are only two legal forms of epilogue:
1224 // - add SEHAllocationSize, %rsp
1225 // - lea SEHAllocationSize(%FramePtr), %rsp
1227 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1228 // However, we may use this sequence if we have a frame pointer because the
1229 // effects of the prologue can safely be undone.
1230 if (LEAAmount != 0) {
1231 unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1232 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1233 FramePtr, false, LEAAmount);
1236 unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1237 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1241 } else if (NumBytes) {
1242 // Adjust stack pointer back: ESP += numbytes.
1243 emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1247 // Windows unwinder will not invoke function's exception handler if IP is
1248 // either in prologue or in epilogue. This behavior causes a problem when a
1249 // call immediately precedes an epilogue, because the return address points
1250 // into the epilogue. To cope with that, we insert an epilogue marker here,
1251 // then replace it with a 'nop' if it ends up immediately after a CALL in the
1252 // final emitted code.
1254 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1256 // Add the return addr area delta back since we are not tail calling.
1257 int Offset = -1 * X86FI->getTCReturnAddrDelta();
1258 assert(Offset >= 0 && "TCDelta should never be positive");
1260 MBBI = MBB.getFirstTerminator();
1262 // Check for possible merge with preceding ADD instruction.
1263 Offset += mergeSPUpdates(MBB, MBBI, true);
1264 emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true);
1268 // NOTE: this only has a subset of the full frame index logic. In
1269 // particular, the FI < 0 and AfterFPPop logic is handled in
1270 // X86RegisterInfo::eliminateFrameIndex, but not here. Possibly
1271 // (probably?) it should be moved into here.
1272 int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
1273 unsigned &FrameReg) const {
1274 const MachineFrameInfo *MFI = MF.getFrameInfo();
1276 // We can't calculate offset from frame pointer if the stack is realigned,
1277 // so enforce usage of stack/base pointer. The base pointer is used when we
1278 // have dynamic allocas in addition to dynamic realignment.
1279 if (TRI->hasBasePointer(MF))
1280 FrameReg = TRI->getBaseRegister();
1281 else if (TRI->needsStackRealignment(MF))
1282 FrameReg = TRI->getStackRegister();
1284 FrameReg = TRI->getFrameRegister(MF);
1286 // Offset will hold the offset from the stack pointer at function entry to the
1288 // We need to factor in additional offsets applied during the prologue to the
1289 // frame, base, and stack pointer depending on which is used.
1290 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();
1291 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1292 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1293 uint64_t StackSize = MFI->getStackSize();
1294 bool HasFP = hasFP(MF);
1295 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1296 int64_t FPDelta = 0;
1298 if (IsWin64Prologue) {
1299 assert(!MFI->hasCalls() || (StackSize % 16) == 8);
1301 // Calculate required stack adjustment.
1302 uint64_t FrameSize = StackSize - SlotSize;
1303 // If required, include space for extra hidden slot for stashing base pointer.
1304 if (X86FI->getRestoreBasePointer())
1305 FrameSize += SlotSize;
1306 uint64_t NumBytes = FrameSize - CSSize;
1308 uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1309 if (FI && FI == X86FI->getFAIndex())
1310 return -SEHFrameOffset;
1312 // FPDelta is the offset from the "traditional" FP location of the old base
1313 // pointer followed by return address and the location required by the
1314 // restricted Win64 prologue.
1315 // Add FPDelta to all offsets below that go through the frame pointer.
1316 FPDelta = FrameSize - SEHFrameOffset;
1317 assert((!MFI->hasCalls() || (FPDelta % 16) == 0) &&
1318 "FPDelta isn't aligned per the Win64 ABI!");
1322 if (TRI->hasBasePointer(MF)) {
1323 assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1325 // Skip the saved EBP.
1326 return Offset + SlotSize + FPDelta;
1328 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
1329 return Offset + StackSize;
1331 } else if (TRI->needsStackRealignment(MF)) {
1333 // Skip the saved EBP.
1334 return Offset + SlotSize + FPDelta;
1336 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
1337 return Offset + StackSize;
1339 // FIXME: Support tail calls
1342 return Offset + StackSize;
1344 // Skip the saved EBP.
1347 // Skip the RETADDR move area
1348 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1349 if (TailCallReturnAddrDelta < 0)
1350 Offset -= TailCallReturnAddrDelta;
1353 return Offset + FPDelta;
1356 // Simplified from getFrameIndexReference keeping only StackPointer cases
1357 int X86FrameLowering::getFrameIndexReferenceFromSP(const MachineFunction &MF,
1359 unsigned &FrameReg) const {
1360 const MachineFrameInfo *MFI = MF.getFrameInfo();
1361 // Does not include any dynamic realign.
1362 const uint64_t StackSize = MFI->getStackSize();
1365 // LLVM arranges the stack as follows:
1370 // PUSH RBP <-- RBP points here
1372 // ~~~~~~~ <-- optional stack realignment dynamic adjustment
1375 // ... <-- RSP after prologue points here
1377 // if (hasVarSizedObjects()):
1378 // ... <-- "base pointer" (ESI/RBX) points here
1380 // ... <-- RSP points here
1382 // Case 1: In the simple case of no stack realignment and no dynamic
1383 // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1384 // with fixed offsets from RSP.
1386 // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1387 // stack objects are addressed with RBP and regular stack objects with RSP.
1389 // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1390 // to address stack arguments for outgoing calls and nothing else. The "base
1391 // pointer" points to local variables, and RBP points to fixed objects.
1393 // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1394 // answer we give is relative to the SP after the prologue, and not the
1395 // SP in the middle of the function.
1397 assert((!TRI->needsStackRealignment(MF) || !MFI->isFixedObjectIndex(FI)) &&
1398 "offset from fixed object to SP is not static");
1400 // We don't handle tail calls, and shouldn't be seeing them either.
1401 int TailCallReturnAddrDelta =
1402 MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta();
1403 assert(!(TailCallReturnAddrDelta < 0) && "we don't handle this case!");
1407 // Fill in FrameReg output argument.
1408 FrameReg = TRI->getStackRegister();
1410 // This is how the math works out:
1412 // %rsp grows (i.e. gets lower) left to right. Each box below is
1413 // one word (eight bytes). Obj0 is the stack slot we're trying to
1416 // ----------------------------------
1417 // | BP | Obj0 | Obj1 | ... | ObjN |
1418 // ----------------------------------
1422 // A is the incoming stack pointer.
1423 // (B - A) is the local area offset (-8 for x86-64) [1]
1424 // (C - A) is the Offset returned by MFI->getObjectOffset for Obj0 [2]
1426 // |(E - B)| is the StackSize (absolute value, positive). For a
1427 // stack that grown down, this works out to be (B - E). [3]
1429 // E is also the value of %rsp after stack has been set up, and we
1430 // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1431 // (C - E) == (C - A) - (B - A) + (B - E)
1432 // { Using [1], [2] and [3] above }
1433 // == getObjectOffset - LocalAreaOffset + StackSize
1436 // Get the Offset from the StackPointer
1437 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();
1439 return Offset + StackSize;
1442 bool X86FrameLowering::assignCalleeSavedSpillSlots(
1443 MachineFunction &MF, const TargetRegisterInfo *TRI,
1444 std::vector<CalleeSavedInfo> &CSI) const {
1445 MachineFrameInfo *MFI = MF.getFrameInfo();
1446 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1448 unsigned CalleeSavedFrameSize = 0;
1449 int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1452 // emitPrologue always spills frame register the first thing.
1453 SpillSlotOffset -= SlotSize;
1454 MFI->CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1456 // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1457 // the frame register, we can delete it from CSI list and not have to worry
1458 // about avoiding it later.
1459 unsigned FPReg = TRI->getFrameRegister(MF);
1460 for (unsigned i = 0; i < CSI.size(); ++i) {
1461 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1462 CSI.erase(CSI.begin() + i);
1468 // Assign slots for GPRs. It increases frame size.
1469 for (unsigned i = CSI.size(); i != 0; --i) {
1470 unsigned Reg = CSI[i - 1].getReg();
1472 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1475 SpillSlotOffset -= SlotSize;
1476 CalleeSavedFrameSize += SlotSize;
1478 int SlotIndex = MFI->CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1479 CSI[i - 1].setFrameIdx(SlotIndex);
1482 X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1484 // Assign slots for XMMs.
1485 for (unsigned i = CSI.size(); i != 0; --i) {
1486 unsigned Reg = CSI[i - 1].getReg();
1487 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1490 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1492 SpillSlotOffset -= std::abs(SpillSlotOffset) % RC->getAlignment();
1494 SpillSlotOffset -= RC->getSize();
1496 MFI->CreateFixedSpillStackObject(RC->getSize(), SpillSlotOffset);
1497 CSI[i - 1].setFrameIdx(SlotIndex);
1498 MFI->ensureMaxAlignment(RC->getAlignment());
1504 bool X86FrameLowering::spillCalleeSavedRegisters(
1505 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
1506 const std::vector<CalleeSavedInfo> &CSI,
1507 const TargetRegisterInfo *TRI) const {
1508 DebugLoc DL = MBB.findDebugLoc(MI);
1510 // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1511 // for us, and there are no XMM CSRs on Win32.
1512 if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1515 // Push GPRs. It increases frame size.
1516 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1517 for (unsigned i = CSI.size(); i != 0; --i) {
1518 unsigned Reg = CSI[i - 1].getReg();
1520 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1522 // Add the callee-saved register as live-in. It's killed at the spill.
1525 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill)
1526 .setMIFlag(MachineInstr::FrameSetup);
1529 // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1530 // It can be done by spilling XMMs to stack frame.
1531 for (unsigned i = CSI.size(); i != 0; --i) {
1532 unsigned Reg = CSI[i-1].getReg();
1533 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1535 // Add the callee-saved register as live-in. It's killed at the spill.
1537 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1539 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
1542 MI->setFlag(MachineInstr::FrameSetup);
1549 bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
1550 MachineBasicBlock::iterator MI,
1551 const std::vector<CalleeSavedInfo> &CSI,
1552 const TargetRegisterInfo *TRI) const {
1556 if (isFuncletReturnInstr(MI) && STI.isOSWindows()) {
1557 // Don't restore CSRs in 32-bit EH funclets. Matches
1558 // spillCalleeSavedRegisters.
1561 // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
1562 // funclets. emitEpilogue transforms these to normal jumps.
1563 if (MI->getOpcode() == X86::CATCHRET) {
1564 const Function *Func = MBB.getParent()->getFunction();
1565 bool IsSEH = isAsynchronousEHPersonality(
1566 classifyEHPersonality(Func->getPersonalityFn()));
1572 DebugLoc DL = MBB.findDebugLoc(MI);
1574 // Reload XMMs from stack frame.
1575 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
1576 unsigned Reg = CSI[i].getReg();
1577 if (X86::GR64RegClass.contains(Reg) ||
1578 X86::GR32RegClass.contains(Reg))
1581 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1582 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
1586 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
1587 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
1588 unsigned Reg = CSI[i].getReg();
1589 if (!X86::GR64RegClass.contains(Reg) &&
1590 !X86::GR32RegClass.contains(Reg))
1593 BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
1594 .setMIFlag(MachineInstr::FrameDestroy);
1599 void X86FrameLowering::determineCalleeSaves(MachineFunction &MF,
1600 BitVector &SavedRegs,
1601 RegScavenger *RS) const {
1602 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
1604 MachineFrameInfo *MFI = MF.getFrameInfo();
1606 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1607 int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1609 if (TailCallReturnAddrDelta < 0) {
1610 // create RETURNADDR area
1619 MFI->CreateFixedObject(-TailCallReturnAddrDelta,
1620 TailCallReturnAddrDelta - SlotSize, true);
1623 // Spill the BasePtr if it's used.
1624 if (TRI->hasBasePointer(MF)) {
1625 SavedRegs.set(TRI->getBaseRegister());
1627 // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
1628 if (MF.getMMI().hasEHFunclets()) {
1629 int FI = MFI->CreateSpillStackObject(SlotSize, SlotSize);
1630 X86FI->setHasSEHFramePtrSave(true);
1631 X86FI->setSEHFramePtrSaveIndex(FI);
1637 HasNestArgument(const MachineFunction *MF) {
1638 const Function *F = MF->getFunction();
1639 for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
1641 if (I->hasNestAttr())
1647 /// GetScratchRegister - Get a temp register for performing work in the
1648 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
1649 /// and the properties of the function either one or two registers will be
1650 /// needed. Set primary to true for the first register, false for the second.
1652 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
1653 CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv();
1656 if (CallingConvention == CallingConv::HiPE) {
1658 return Primary ? X86::R14 : X86::R13;
1660 return Primary ? X86::EBX : X86::EDI;
1665 return Primary ? X86::R11 : X86::R12;
1667 return Primary ? X86::R11D : X86::R12D;
1670 bool IsNested = HasNestArgument(&MF);
1672 if (CallingConvention == CallingConv::X86_FastCall ||
1673 CallingConvention == CallingConv::Fast) {
1675 report_fatal_error("Segmented stacks does not support fastcall with "
1676 "nested function.");
1677 return Primary ? X86::EAX : X86::ECX;
1680 return Primary ? X86::EDX : X86::EAX;
1681 return Primary ? X86::ECX : X86::EAX;
1684 // The stack limit in the TCB is set to this many bytes above the actual stack
1686 static const uint64_t kSplitStackAvailable = 256;
1688 void X86FrameLowering::adjustForSegmentedStacks(
1689 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
1690 MachineFrameInfo *MFI = MF.getFrameInfo();
1692 unsigned TlsReg, TlsOffset;
1695 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
1696 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
1697 "Scratch register is live-in");
1699 if (MF.getFunction()->isVarArg())
1700 report_fatal_error("Segmented stacks do not support vararg functions.");
1701 if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
1702 !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
1703 !STI.isTargetDragonFly())
1704 report_fatal_error("Segmented stacks not supported on this platform.");
1706 // Eventually StackSize will be calculated by a link-time pass; which will
1707 // also decide whether checking code needs to be injected into this particular
1709 StackSize = MFI->getStackSize();
1711 // Do not generate a prologue for functions with a stack of size zero
1715 MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
1716 MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
1717 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1718 bool IsNested = false;
1720 // We need to know if the function has a nest argument only in 64 bit mode.
1722 IsNested = HasNestArgument(&MF);
1724 // The MOV R10, RAX needs to be in a different block, since the RET we emit in
1725 // allocMBB needs to be last (terminating) instruction.
1727 for (const auto &LI : PrologueMBB.liveins()) {
1728 allocMBB->addLiveIn(LI);
1729 checkMBB->addLiveIn(LI);
1733 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
1735 MF.push_front(allocMBB);
1736 MF.push_front(checkMBB);
1738 // When the frame size is less than 256 we just compare the stack
1739 // boundary directly to the value of the stack pointer, per gcc.
1740 bool CompareStackPointer = StackSize < kSplitStackAvailable;
1742 // Read the limit off the current stacklet off the stack_guard location.
1744 if (STI.isTargetLinux()) {
1746 TlsOffset = IsLP64 ? 0x70 : 0x40;
1747 } else if (STI.isTargetDarwin()) {
1749 TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
1750 } else if (STI.isTargetWin64()) {
1752 TlsOffset = 0x28; // pvArbitrary, reserved for application use
1753 } else if (STI.isTargetFreeBSD()) {
1756 } else if (STI.isTargetDragonFly()) {
1758 TlsOffset = 0x20; // use tls_tcb.tcb_segstack
1760 report_fatal_error("Segmented stacks not supported on this platform.");
1763 if (CompareStackPointer)
1764 ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
1766 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
1767 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
1769 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
1770 .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
1772 if (STI.isTargetLinux()) {
1775 } else if (STI.isTargetDarwin()) {
1777 TlsOffset = 0x48 + 90*4;
1778 } else if (STI.isTargetWin32()) {
1780 TlsOffset = 0x14; // pvArbitrary, reserved for application use
1781 } else if (STI.isTargetDragonFly()) {
1783 TlsOffset = 0x10; // use tls_tcb.tcb_segstack
1784 } else if (STI.isTargetFreeBSD()) {
1785 report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
1787 report_fatal_error("Segmented stacks not supported on this platform.");
1790 if (CompareStackPointer)
1791 ScratchReg = X86::ESP;
1793 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
1794 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
1796 if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
1797 STI.isTargetDragonFly()) {
1798 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
1799 .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
1800 } else if (STI.isTargetDarwin()) {
1802 // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
1803 unsigned ScratchReg2;
1805 if (CompareStackPointer) {
1806 // The primary scratch register is available for holding the TLS offset.
1807 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
1808 SaveScratch2 = false;
1810 // Need to use a second register to hold the TLS offset
1811 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
1813 // Unfortunately, with fastcc the second scratch register may hold an
1815 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
1818 // If Scratch2 is live-in then it needs to be saved.
1819 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
1820 "Scratch register is live-in and not saved");
1823 BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
1824 .addReg(ScratchReg2, RegState::Kill);
1826 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
1828 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
1830 .addReg(ScratchReg2).addImm(1).addReg(0)
1835 BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
1839 // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
1840 // It jumps to normal execution of the function body.
1841 BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
1843 // On 32 bit we first push the arguments size and then the frame size. On 64
1844 // bit, we pass the stack frame size in r10 and the argument size in r11.
1846 // Functions with nested arguments use R10, so it needs to be saved across
1847 // the call to _morestack
1849 const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
1850 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
1851 const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
1852 const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
1853 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
1856 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
1858 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
1860 BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
1861 .addImm(X86FI->getArgumentStackSize());
1863 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
1864 .addImm(X86FI->getArgumentStackSize());
1865 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
1869 // __morestack is in libgcc
1870 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
1871 // Under the large code model, we cannot assume that __morestack lives
1872 // within 2^31 bytes of the call site, so we cannot use pc-relative
1873 // addressing. We cannot perform the call via a temporary register,
1874 // as the rax register may be used to store the static chain, and all
1875 // other suitable registers may be either callee-save or used for
1876 // parameter passing. We cannot use the stack at this point either
1877 // because __morestack manipulates the stack directly.
1879 // To avoid these issues, perform an indirect call via a read-only memory
1880 // location containing the address.
1882 // This solution is not perfect, as it assumes that the .rodata section
1883 // is laid out within 2^31 bytes of each function body, but this seems
1884 // to be sufficient for JIT.
1885 BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
1889 .addExternalSymbol("__morestack_addr")
1891 MF.getMMI().setUsesMorestackAddr(true);
1894 BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
1895 .addExternalSymbol("__morestack");
1897 BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
1898 .addExternalSymbol("__morestack");
1902 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
1904 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
1906 allocMBB->addSuccessor(&PrologueMBB);
1908 checkMBB->addSuccessor(allocMBB);
1909 checkMBB->addSuccessor(&PrologueMBB);
1916 /// Erlang programs may need a special prologue to handle the stack size they
1917 /// might need at runtime. That is because Erlang/OTP does not implement a C
1918 /// stack but uses a custom implementation of hybrid stack/heap architecture.
1919 /// (for more information see Eric Stenman's Ph.D. thesis:
1920 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
1923 /// temp0 = sp - MaxStack
1924 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
1928 /// call inc_stack # doubles the stack space
1929 /// temp0 = sp - MaxStack
1930 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
1931 void X86FrameLowering::adjustForHiPEPrologue(
1932 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
1933 MachineFrameInfo *MFI = MF.getFrameInfo();
1935 // HiPE-specific values
1936 const unsigned HipeLeafWords = 24;
1937 const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
1938 const unsigned Guaranteed = HipeLeafWords * SlotSize;
1939 unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
1940 MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
1941 unsigned MaxStack = MFI->getStackSize() + CallerStkArity*SlotSize + SlotSize;
1943 assert(STI.isTargetLinux() &&
1944 "HiPE prologue is only supported on Linux operating systems.");
1946 // Compute the largest caller's frame that is needed to fit the callees'
1947 // frames. This 'MaxStack' is computed from:
1949 // a) the fixed frame size, which is the space needed for all spilled temps,
1950 // b) outgoing on-stack parameter areas, and
1951 // c) the minimum stack space this function needs to make available for the
1952 // functions it calls (a tunable ABI property).
1953 if (MFI->hasCalls()) {
1954 unsigned MoreStackForCalls = 0;
1956 for (MachineFunction::iterator MBBI = MF.begin(), MBBE = MF.end();
1957 MBBI != MBBE; ++MBBI)
1958 for (MachineBasicBlock::iterator MI = MBBI->begin(), ME = MBBI->end();
1963 // Get callee operand.
1964 const MachineOperand &MO = MI->getOperand(0);
1966 // Only take account of global function calls (no closures etc.).
1970 const Function *F = dyn_cast<Function>(MO.getGlobal());
1974 // Do not update 'MaxStack' for primitive and built-in functions
1975 // (encoded with names either starting with "erlang."/"bif_" or not
1976 // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
1977 // "_", such as the BIF "suspend_0") as they are executed on another
1979 if (F->getName().find("erlang.") != StringRef::npos ||
1980 F->getName().find("bif_") != StringRef::npos ||
1981 F->getName().find_first_of("._") == StringRef::npos)
1984 unsigned CalleeStkArity =
1985 F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
1986 if (HipeLeafWords - 1 > CalleeStkArity)
1987 MoreStackForCalls = std::max(MoreStackForCalls,
1988 (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
1990 MaxStack += MoreStackForCalls;
1993 // If the stack frame needed is larger than the guaranteed then runtime checks
1994 // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
1995 if (MaxStack > Guaranteed) {
1996 MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
1997 MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
1999 for (const auto &LI : PrologueMBB.liveins()) {
2000 stackCheckMBB->addLiveIn(LI);
2001 incStackMBB->addLiveIn(LI);
2004 MF.push_front(incStackMBB);
2005 MF.push_front(stackCheckMBB);
2007 unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2008 unsigned LEAop, CMPop, CALLop;
2012 LEAop = X86::LEA64r;
2013 CMPop = X86::CMP64rm;
2014 CALLop = X86::CALL64pcrel32;
2015 SPLimitOffset = 0x90;
2019 LEAop = X86::LEA32r;
2020 CMPop = X86::CMP32rm;
2021 CALLop = X86::CALLpcrel32;
2022 SPLimitOffset = 0x4c;
2025 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2026 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2027 "HiPE prologue scratch register is live-in");
2029 // Create new MBB for StackCheck:
2030 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2031 SPReg, false, -MaxStack);
2032 // SPLimitOffset is in a fixed heap location (pointed by BP).
2033 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2034 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2035 BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2037 // Create new MBB for IncStack:
2038 BuildMI(incStackMBB, DL, TII.get(CALLop)).
2039 addExternalSymbol("inc_stack_0");
2040 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2041 SPReg, false, -MaxStack);
2042 addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2043 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2044 BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2046 stackCheckMBB->addSuccessor(&PrologueMBB, 99);
2047 stackCheckMBB->addSuccessor(incStackMBB, 1);
2048 incStackMBB->addSuccessor(&PrologueMBB, 99);
2049 incStackMBB->addSuccessor(incStackMBB, 1);
2056 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2057 MachineBasicBlock::iterator MBBI, DebugLoc DL, int Offset) const {
2062 if (Offset % SlotSize)
2065 int NumPops = Offset / SlotSize;
2066 // This is only worth it if we have at most 2 pops.
2067 if (NumPops != 1 && NumPops != 2)
2070 // Handle only the trivial case where the adjustment directly follows
2071 // a call. This is the most common one, anyway.
2072 if (MBBI == MBB.begin())
2074 MachineBasicBlock::iterator Prev = std::prev(MBBI);
2075 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2079 unsigned FoundRegs = 0;
2081 auto RegMask = Prev->getOperand(1);
2084 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2085 // Try to find up to NumPops free registers.
2086 for (auto Candidate : RegClass) {
2088 // Poor man's liveness:
2089 // Since we're immediately after a call, any register that is clobbered
2090 // by the call and not defined by it can be considered dead.
2091 if (!RegMask.clobbersPhysReg(Candidate))
2095 for (const MachineOperand &MO : Prev->implicit_operands()) {
2096 if (MO.isReg() && MO.isDef() && MO.getReg() == Candidate) {
2105 Regs[FoundRegs++] = Candidate;
2106 if (FoundRegs == (unsigned)NumPops)
2113 // If we found only one free register, but need two, reuse the same one twice.
2114 while (FoundRegs < (unsigned)NumPops)
2115 Regs[FoundRegs++] = Regs[0];
2117 for (int i = 0; i < NumPops; ++i)
2118 BuildMI(MBB, MBBI, DL,
2119 TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2124 void X86FrameLowering::
2125 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
2126 MachineBasicBlock::iterator I) const {
2127 bool reserveCallFrame = hasReservedCallFrame(MF);
2128 unsigned Opcode = I->getOpcode();
2129 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2130 DebugLoc DL = I->getDebugLoc();
2131 uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0;
2132 uint64_t InternalAmt = (isDestroy || Amount) ? I->getOperand(1).getImm() : 0;
2135 if (!reserveCallFrame) {
2136 // If the stack pointer can be changed after prologue, turn the
2137 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2138 // adjcallstackdown instruction into 'add ESP, <amt>'
2140 // We need to keep the stack aligned properly. To do this, we round the
2141 // amount of space needed for the outgoing arguments up to the next
2142 // alignment boundary.
2143 unsigned StackAlign = getStackAlignment();
2144 Amount = RoundUpToAlignment(Amount, StackAlign);
2146 MachineModuleInfo &MMI = MF.getMMI();
2147 const Function *Fn = MF.getFunction();
2148 bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2149 bool DwarfCFI = !WindowsCFI &&
2150 (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
2152 // If we have any exception handlers in this function, and we adjust
2153 // the SP before calls, we may need to indicate this to the unwinder
2154 // using GNU_ARGS_SIZE. Note that this may be necessary even when
2155 // Amount == 0, because the preceding function may have set a non-0
2157 // TODO: We don't need to reset this between subsequent functions,
2158 // if it didn't change.
2159 bool HasDwarfEHHandlers = !WindowsCFI &&
2160 !MF.getMMI().getLandingPads().empty();
2162 if (HasDwarfEHHandlers && !isDestroy &&
2163 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences())
2164 BuildCFI(MBB, I, DL,
2165 MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2170 // Factor out the amount that gets handled inside the sequence
2171 // (Pushes of argument for frame setup, callee pops for frame destroy)
2172 Amount -= InternalAmt;
2174 // If this is a callee-pop calling convention, and we're emitting precise
2175 // SP-based CFI, emit a CFA adjust for the amount the callee popped.
2176 if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF) &&
2177 MMI.usePreciseUnwindInfo())
2178 BuildCFI(MBB, I, DL,
2179 MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2182 // Add Amount to SP to destroy a frame, and subtract to setup.
2183 int Offset = isDestroy ? Amount : -Amount;
2185 if (!(Fn->optForMinSize() &&
2186 adjustStackWithPops(MBB, I, DL, Offset)))
2187 BuildStackAdjustment(MBB, I, DL, Offset, /*InEpilogue=*/false);
2190 if (DwarfCFI && !hasFP(MF)) {
2191 // If we don't have FP, but need to generate unwind information,
2192 // we need to set the correct CFA offset after the stack adjustment.
2193 // How much we adjust the CFA offset depends on whether we're emitting
2194 // CFI only for EH purposes or for debugging. EH only requires the CFA
2195 // offset to be correct at each call site, while for debugging we want
2196 // it to be more precise.
2197 int CFAOffset = Amount;
2198 if (!MMI.usePreciseUnwindInfo())
2199 CFAOffset += InternalAmt;
2200 CFAOffset = isDestroy ? -CFAOffset : CFAOffset;
2201 BuildCFI(MBB, I, DL,
2202 MCCFIInstruction::createAdjustCfaOffset(nullptr, CFAOffset));
2208 if (isDestroy && InternalAmt) {
2209 // If we are performing frame pointer elimination and if the callee pops
2210 // something off the stack pointer, add it back. We do this until we have
2211 // more advanced stack pointer tracking ability.
2212 // We are not tracking the stack pointer adjustment by the callee, so make
2213 // sure we restore the stack pointer immediately after the call, there may
2214 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2215 MachineBasicBlock::iterator B = MBB.begin();
2216 while (I != B && !std::prev(I)->isCall())
2218 BuildStackAdjustment(MBB, I, DL, -InternalAmt, /*InEpilogue=*/false);
2222 bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
2223 assert(MBB.getParent() && "Block is not attached to a function!");
2225 // Win64 has strict requirements in terms of epilogue and we are
2226 // not taking a chance at messing with them.
2227 // I.e., unless this block is already an exit block, we can't use
2228 // it as an epilogue.
2229 if (MBB.getParent()->getSubtarget<X86Subtarget>().isTargetWin64() &&
2230 !MBB.succ_empty() && !MBB.isReturnBlock())
2233 if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2236 // If we cannot use LEA to adjust SP, we may need to use ADD, which
2237 // clobbers the EFLAGS. Check that none of the terminators reads the
2238 // EFLAGS, and if one uses it, conservatively assume this is not
2239 // safe to insert the epilogue here.
2240 return !terminatorsNeedFlagsAsInput(MBB);
2243 MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
2244 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
2245 DebugLoc DL, bool RestoreSP) const {
2246 assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2247 assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2248 assert(STI.is32Bit() && !Uses64BitFramePtr &&
2249 "restoring EBP/ESI on non-32-bit target");
2251 MachineFunction &MF = *MBB.getParent();
2252 unsigned FramePtr = TRI->getFrameRegister(MF);
2253 unsigned BasePtr = TRI->getBaseRegister();
2254 MachineModuleInfo &MMI = MF.getMMI();
2255 const Function *Fn = MF.getFunction();
2256 WinEHFuncInfo &FuncInfo = MMI.getWinEHFuncInfo(Fn);
2257 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2258 MachineFrameInfo *MFI = MF.getFrameInfo();
2260 // FIXME: Don't set FrameSetup flag in catchret case.
2262 int FI = FuncInfo.EHRegNodeFrameIndex;
2263 int EHRegSize = MFI->getObjectSize(FI);
2266 // MOV32rm -EHRegSize(%ebp), %esp
2267 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2268 X86::EBP, true, -EHRegSize)
2269 .setMIFlag(MachineInstr::FrameSetup);
2273 int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2274 int EndOffset = -EHRegOffset - EHRegSize;
2275 FuncInfo.EHRegNodeEndOffset = EndOffset;
2277 if (UsedReg == FramePtr) {
2278 // ADD $offset, %ebp
2279 unsigned ADDri = getADDriOpcode(false, EndOffset);
2280 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2283 .setMIFlag(MachineInstr::FrameSetup)
2286 assert(EndOffset >= 0 &&
2287 "end of registration object above normal EBP position!");
2288 } else if (UsedReg == BasePtr) {
2289 // LEA offset(%ebp), %esi
2290 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2291 FramePtr, false, EndOffset)
2292 .setMIFlag(MachineInstr::FrameSetup);
2293 // MOV32rm SavedEBPOffset(%esi), %ebp
2294 assert(X86FI->getHasSEHFramePtrSave());
2296 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2297 assert(UsedReg == BasePtr);
2298 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2299 UsedReg, true, Offset)
2300 .setMIFlag(MachineInstr::FrameSetup);
2302 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2307 unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const {
2308 // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2309 unsigned Offset = 16;
2310 // RBP is immediately pushed.
2312 // All callee-saved registers are then pushed.
2313 Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2314 // Every funclet allocates enough stack space for the largest outgoing call.
2315 Offset += getWinEHFuncletFrameSize(MF);