1 //===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the X86-32 and X86-64
13 //===----------------------------------------------------------------------===//
15 /// CCIfSubtarget - Match if the current subtarget has a feature F.
16 class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>;
19 //===----------------------------------------------------------------------===//
20 // Return Value Calling Conventions
21 //===----------------------------------------------------------------------===//
23 // Return-value conventions common to all X86 CC's.
24 def RetCC_X86Common : CallingConv<[
25 // Scalar values are returned in AX first, then DX.
26 CCIfType<[i8] , CCAssignToReg<[AL]>>,
27 CCIfType<[i16], CCAssignToReg<[AX]>>,
28 CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
29 CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
31 // Vector types are returned in XMM0 and XMM1, when they fit. If the target
32 // doesn't have XMM registers, it won't have vector types.
33 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
34 CCAssignToReg<[XMM0,XMM1]>>,
36 // MMX vector types are always returned in MM0. If the target doesn't have
37 // MM0, it doesn't support these vector types.
38 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[MM0]>>,
40 // Long double types are always returned in ST0 (even with SSE).
41 CCIfType<[f80], CCAssignToReg<[ST0]>>
44 // X86-32 C return-value convention.
45 def RetCC_X86_32_C : CallingConv<[
46 // The X86-32 calling convention returns FP values in ST0, otherwise it is the
47 // same as the common X86 calling conv.
48 CCIfType<[f32], CCAssignToReg<[ST0]>>,
49 CCIfType<[f64], CCAssignToReg<[ST0]>>,
50 CCDelegateTo<RetCC_X86Common>
53 // X86-32 FastCC return-value convention.
54 def RetCC_X86_32_Fast : CallingConv<[
55 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
56 // SSE2, otherwise it is the the C calling conventions.
57 // This can happen when a float, 2 x float, or 3 x float vector is split by
58 // target lowering, and is returned in 1-3 sse regs.
59 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
60 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
61 CCDelegateTo<RetCC_X86Common>
64 // X86-64 C return-value convention.
65 def RetCC_X86_64_C : CallingConv<[
66 // The X86-64 calling convention always returns FP values in XMM0.
67 CCIfType<[f32], CCAssignToReg<[XMM0]>>,
68 CCIfType<[f64], CCAssignToReg<[XMM0]>>,
69 CCDelegateTo<RetCC_X86Common>
74 // This is the root return-value convention for the X86-32 backend.
75 def RetCC_X86_32 : CallingConv<[
76 // If FastCC, use RetCC_X86_32_Fast.
77 CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
78 // Otherwise, use RetCC_X86_32_C.
79 CCDelegateTo<RetCC_X86_32_C>
82 // This is the root return-value convention for the X86-64 backend.
83 def RetCC_X86_64 : CallingConv<[
84 // Always just the same as C calling conv for X86-64.
85 CCDelegateTo<RetCC_X86_64_C>
88 // This is the return-value convention used for the entire X86 backend.
89 def RetCC_X86 : CallingConv<[
90 CCIfSubtarget<"is64Bit()", CCDelegateTo<RetCC_X86_64>>,
91 CCDelegateTo<RetCC_X86_32>
94 //===----------------------------------------------------------------------===//
95 // X86-64 Argument Calling Conventions
96 //===----------------------------------------------------------------------===//
98 def CC_X86_64_C : CallingConv<[
99 // Promote i8/i16 arguments to i32.
100 CCIfType<[i8, i16], CCPromoteToType<i32>>,
102 CCIfStruct<CCStructAssign<[RDI, RSI, RDX, RCX, R8, R9 ]>>,
104 // The first 6 integer arguments are passed in integer registers.
105 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
106 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
108 // The first 8 FP/Vector arguments are passed in XMM registers.
109 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
110 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
112 // The first 8 MMX vector arguments are passed in GPRs.
113 CCIfType<[v8i8, v4i16, v2i32, v1i64],
114 CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
116 // The 'nest' parameter, if any, is passed in R10.
117 CCIfNest<CCAssignToReg<[R10]>>,
119 // Integer/FP values get stored in stack slots that are 8 bytes in size and
120 // 8-byte aligned if there are no more registers to hold them.
121 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
123 // Long doubles get stack slots whose size and alignment depends on the
125 CCIfType<[f80], CCAssignToStack<0, 0>>,
127 // Vectors get 16-byte stack slots that are 16-byte aligned.
128 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
130 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
131 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
134 // Tail call convention (fast): One register is reserved for target address,
136 def CC_X86_64_TailCall : CallingConv<[
137 // Promote i8/i16 arguments to i32.
138 CCIfType<[i8, i16], CCPromoteToType<i32>>,
140 CCIfStruct<CCStructAssign<[RDI, RSI, RDX, RCX, R8]>>,
142 // The first 6 integer arguments are passed in integer registers.
143 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D]>>,
144 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
146 // The first 8 FP/Vector arguments are passed in XMM registers.
147 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
148 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
150 // The first 8 MMX vector arguments are passed in GPRs.
151 CCIfType<[v8i8, v4i16, v2i32, v1i64],
152 CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
154 // The 'nest' parameter, if any, is passed in R10.
155 CCIfNest<CCAssignToReg<[R10]>>,
157 // Integer/FP values get stored in stack slots that are 8 bytes in size and
158 // 8-byte aligned if there are no more registers to hold them.
159 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
161 // Vectors get 16-byte stack slots that are 16-byte aligned.
162 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
164 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
165 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
169 //===----------------------------------------------------------------------===//
170 // X86 C Calling Convention
171 //===----------------------------------------------------------------------===//
173 /// CC_X86_32_Common - In all X86-32 calling conventions, extra integers and FP
174 /// values are spilled on the stack, and the first 4 vector values go in XMM
176 def CC_X86_32_Common : CallingConv<[
177 // Integer/Float values get stored in stack slots that are 4 bytes in
178 // size and 4-byte aligned.
179 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
181 // Doubles get 8-byte slots that are 4-byte aligned.
182 CCIfType<[f64], CCAssignToStack<8, 4>>,
184 // Long doubles get slots whose size and alignment depends on the
186 CCIfType<[f80], CCAssignToStack<16, 4>>,
188 // The first 4 vector arguments are passed in XMM registers.
189 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
190 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
192 // Other vectors get 16-byte stack slots that are 16-byte aligned.
193 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
195 // __m64 vectors get 8-byte stack slots that are 8-byte aligned. They are
196 // passed in the parameter area.
197 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
200 def CC_X86_32_C : CallingConv<[
201 // Promote i8/i16 arguments to i32.
202 CCIfType<[i8, i16], CCPromoteToType<i32>>,
204 // The 'nest' parameter, if any, is passed in ECX.
205 CCIfNest<CCAssignToReg<[ECX]>>,
207 // The first 3 integer arguments, if marked 'inreg' and if the call is not
208 // a vararg call, are passed in integer registers.
209 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
211 // Otherwise, same as everything else.
212 CCDelegateTo<CC_X86_32_Common>
215 /// Same as C calling convention except for non-free ECX which is used for storing
216 /// a potential pointer to the tail called function.
217 def CC_X86_32_TailCall : CallingConv<[
218 // Promote i8/i16 arguments to i32.
219 CCIfType<[i8, i16], CCPromoteToType<i32>>,
221 // Nested function trampolines are currently not supported by fastcc.
223 // The first 3 integer arguments, if marked 'inreg' and if the call is not
224 // a vararg call, are passed in integer registers.
225 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,
227 // Otherwise, same as everything else.
228 CCDelegateTo<CC_X86_32_Common>
231 def CC_X86_32_FastCall : CallingConv<[
232 // Promote i8/i16 arguments to i32.
233 CCIfType<[i8, i16], CCPromoteToType<i32>>,
235 // The 'nest' parameter, if any, is passed in EAX.
236 CCIfNest<CCAssignToReg<[EAX]>>,
238 // The first 2 integer arguments are passed in ECX/EDX
239 CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
241 // Otherwise, same as everything else.
242 CCDelegateTo<CC_X86_32_Common>