1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #include "X86ATTAsmPrinter.h"
18 #include "X86TargetMachine.h"
19 #include "llvm/Module.h"
20 #include "llvm/Support/Mangler.h"
21 #include "llvm/Target/TargetOptions.h"
25 /// runOnMachineFunction - This uses the printMachineInstruction()
26 /// method to print assembly for each instruction.
28 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
29 if (Subtarget->isTargetDarwin()) {
30 // Let PassManager know we need debug information and relay
31 // the MachineDebugInfo address on to DwarfWriter.
32 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
35 SetupMachineFunction(MF);
38 // Print out constants referenced by the function
39 EmitConstantPool(MF.getConstantPool());
41 // Print out labels for the function.
42 const Function *F = MF.getFunction();
43 switch (F->getLinkage()) {
44 default: assert(0 && "Unknown linkage type!");
45 case Function::InternalLinkage: // Symbols default to internal.
46 SwitchToTextSection(DefaultTextSection, F);
47 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
49 case Function::ExternalLinkage:
50 SwitchToTextSection(DefaultTextSection, F);
51 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
52 O << "\t.globl\t" << CurrentFnName << "\n";
54 case Function::WeakLinkage:
55 case Function::LinkOnceLinkage:
56 if (Subtarget->isTargetDarwin()) {
58 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
59 O << "\t.globl\t" << CurrentFnName << "\n";
60 O << "\t.weak_definition\t" << CurrentFnName << "\n";
61 } else if (Subtarget->TargetType == X86Subtarget::isCygwin) {
62 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
63 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
65 SwitchToTextSection("", F);
66 O << "\t.weak " << CurrentFnName << "\n";
68 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
69 O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
70 << ",\"ax\",@progbits\n";
71 SwitchToTextSection("", F);
72 O << "\t.weak " << CurrentFnName << "\n";
76 O << CurrentFnName << ":\n";
78 if (Subtarget->isTargetDarwin()) {
79 // Emit pre-function debug information.
80 DW.BeginFunction(&MF);
83 // Print out code for the function.
84 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
86 // Print a label for the basic block.
87 if (I->pred_begin() != I->pred_end()) {
88 printBasicBlockLabel(I, true);
91 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
93 // Print the assembly for the instruction.
95 printMachineInstruction(II);
99 // Print out jump tables referenced by the function
100 // Mac OS X requires at least one non-local (e.g. L1) labels before local
101 // lables that are used in jump table expressions (e.g. LBB1_1-LJT1_0).
102 EmitJumpTableInfo(MF.getJumpTableInfo());
104 if (HasDotTypeDotSizeDirective)
105 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
107 if (Subtarget->isTargetDarwin()) {
108 // Emit post-function debug information.
112 // We didn't modify anything.
116 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
117 const char *Modifier) {
118 const MachineOperand &MO = MI->getOperand(OpNo);
119 const MRegisterInfo &RI = *TM.getRegisterInfo();
120 switch (MO.getType()) {
121 case MachineOperand::MO_Register: {
122 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
123 "Virtual registers should not make it this far!");
125 unsigned Reg = MO.getReg();
126 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
127 MVT::ValueType VT = (strcmp(Modifier,"subreg16") == 0)
128 ? MVT::i16 : MVT::i8;
129 Reg = getX86SubSuperRegister(Reg, VT);
131 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
132 O << (char)tolower(*Name);
136 case MachineOperand::MO_Immediate:
137 if (!Modifier || strcmp(Modifier, "debug") != 0)
139 O << MO.getImmedValue();
141 case MachineOperand::MO_MachineBasicBlock:
142 printBasicBlockLabel(MO.getMachineBasicBlock());
144 case MachineOperand::MO_JumpTableIndex: {
145 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
146 if (!isMemOp) O << '$';
147 O << PrivateGlobalPrefix << "JTI" << getFunctionNumber() << "_"
148 << MO.getJumpTableIndex();
149 if (Subtarget->isTargetDarwin() &&
150 TM.getRelocationModel() == Reloc::PIC_)
151 O << "-\"L" << getFunctionNumber() << "$pb\"";
154 case MachineOperand::MO_ConstantPoolIndex: {
155 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
156 if (!isMemOp) O << '$';
157 O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
158 << MO.getConstantPoolIndex();
159 if (Subtarget->isTargetDarwin() &&
160 TM.getRelocationModel() == Reloc::PIC_)
161 O << "-\"L" << getFunctionNumber() << "$pb\"";
162 int Offset = MO.getOffset();
169 case MachineOperand::MO_GlobalAddress: {
170 bool isCallOp = Modifier && !strcmp(Modifier, "call");
171 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
172 if (!isMemOp && !isCallOp) O << '$';
173 // Darwin block shameless ripped from PPCAsmPrinter.cpp
174 if (Subtarget->isTargetDarwin() &&
175 TM.getRelocationModel() != Reloc::Static) {
176 GlobalValue *GV = MO.getGlobal();
177 std::string Name = Mang->getValueName(GV);
178 // Link-once, External, or Weakly-linked global variables need
179 // non-lazily-resolved stubs
180 if (GV->isExternal() || GV->hasWeakLinkage() ||
181 GV->hasLinkOnceLinkage()) {
182 // Dynamically-resolved functions need a stub for the function.
183 if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
184 FnStubs.insert(Name);
185 O << "L" << Name << "$stub";
187 GVStubs.insert(Name);
188 O << "L" << Name << "$non_lazy_ptr";
191 O << Mang->getValueName(GV);
193 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
194 O << "-\"L" << getFunctionNumber() << "$pb\"";
196 O << Mang->getValueName(MO.getGlobal());
197 int Offset = MO.getOffset();
204 case MachineOperand::MO_ExternalSymbol: {
205 bool isCallOp = Modifier && !strcmp(Modifier, "call");
207 Subtarget->isTargetDarwin() &&
208 TM.getRelocationModel() != Reloc::Static) {
209 std::string Name(GlobalPrefix);
210 Name += MO.getSymbolName();
211 FnStubs.insert(Name);
212 O << "L" << Name << "$stub";
215 if (!isCallOp) O << '$';
216 O << GlobalPrefix << MO.getSymbolName();
220 O << "<unknown operand type>"; return;
224 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
225 unsigned char value = MI->getOperand(Op).getImmedValue();
226 assert(value <= 7 && "Invalid ssecc argument!");
228 case 0: O << "eq"; break;
229 case 1: O << "lt"; break;
230 case 2: O << "le"; break;
231 case 3: O << "unord"; break;
232 case 4: O << "neq"; break;
233 case 5: O << "nlt"; break;
234 case 6: O << "nle"; break;
235 case 7: O << "ord"; break;
239 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
240 assert(isMem(MI, Op) && "Invalid memory reference!");
242 const MachineOperand &BaseReg = MI->getOperand(Op);
243 int ScaleVal = MI->getOperand(Op+1).getImmedValue();
244 const MachineOperand &IndexReg = MI->getOperand(Op+2);
245 const MachineOperand &DispSpec = MI->getOperand(Op+3);
247 if (BaseReg.isFrameIndex()) {
248 O << "[frame slot #" << BaseReg.getFrameIndex();
249 if (DispSpec.getImmedValue())
250 O << " + " << DispSpec.getImmedValue();
255 if (DispSpec.isGlobalAddress() ||
256 DispSpec.isConstantPoolIndex() ||
257 DispSpec.isJumpTableIndex()) {
258 printOperand(MI, Op+3, "mem");
260 int DispVal = DispSpec.getImmedValue();
261 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
265 if (IndexReg.getReg() || BaseReg.getReg()) {
267 if (BaseReg.getReg())
268 printOperand(MI, Op);
270 if (IndexReg.getReg()) {
272 printOperand(MI, Op+2);
274 O << "," << ScaleVal;
281 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
282 O << "\"L" << getFunctionNumber() << "$pb\"\n";
283 O << "\"L" << getFunctionNumber() << "$pb\":";
287 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
289 const MRegisterInfo &RI = *TM.getRegisterInfo();
290 unsigned Reg = MO.getReg();
292 default: return true; // Unknown mode.
293 case 'b': // Print QImode register
294 Reg = getX86SubSuperRegister(Reg, MVT::i8);
296 case 'h': // Print QImode high register
297 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
299 case 'w': // Print HImode register
300 Reg = getX86SubSuperRegister(Reg, MVT::i16);
302 case 'k': // Print SImode register
303 Reg = getX86SubSuperRegister(Reg, MVT::i32);
308 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
309 O << (char)tolower(*Name);
313 /// PrintAsmOperand - Print out an operand for an inline asm expression.
315 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
317 const char *ExtraCode) {
318 // Does this asm operand have a single letter operand modifier?
319 if (ExtraCode && ExtraCode[0]) {
320 if (ExtraCode[1] != 0) return true; // Unknown modifier.
322 switch (ExtraCode[0]) {
323 default: return true; // Unknown modifier.
324 case 'b': // Print QImode register
325 case 'h': // Print QImode high register
326 case 'w': // Print HImode register
327 case 'k': // Print SImode register
328 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
332 printOperand(MI, OpNo);
336 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
339 const char *ExtraCode) {
340 if (ExtraCode && ExtraCode[0])
341 return true; // Unknown modifier.
342 printMemReference(MI, OpNo);
346 /// printMachineInstruction -- Print out a single X86 LLVM instruction
347 /// MI in Intel syntax to the current output stream.
349 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
351 // This works around some Darwin assembler bugs.
352 if (Subtarget->isTargetDarwin()) {
353 switch (MI->getOpcode()) {
355 O << "rep/movsb (%esi),(%edi)\n";
358 O << "rep/movsl (%esi),(%edi)\n";
361 O << "rep/movsw (%esi),(%edi)\n";
377 // See if a truncate instruction can be turned into a nop.
378 switch (MI->getOpcode()) {
380 case X86::TRUNC_GR32_GR16:
381 case X86::TRUNC_GR32_GR8:
382 case X86::TRUNC_GR16_GR8: {
383 const MachineOperand &MO0 = MI->getOperand(0);
384 const MachineOperand &MO1 = MI->getOperand(1);
385 unsigned Reg0 = MO0.getReg();
386 unsigned Reg1 = MO1.getReg();
387 if (MI->getOpcode() == X86::TRUNC_GR32_GR16)
388 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
390 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
391 O << CommentString << " TRUNCATE ";
398 // Call the autogenerated instruction printer routines.
399 printInstruction(MI);
402 // Include the auto-generated portion of the assembly writer.
403 #include "X86GenAsmWriter.inc"