Added the llvm.readport and llvm.writeport intrinsics for x86. These do
[oota-llvm.git] / lib / Target / X86 / X86.td
1 //===- X86.td - Target definition file for the Intel X86 arch ---*- C++ -*-===//
2 // 
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
7 // 
8 //===----------------------------------------------------------------------===//
9 //
10 // This is a target description file for the Intel i386 architecture, refered to
11 // here as the "X86" architecture.
12 //
13 //===----------------------------------------------------------------------===//
14
15 // Get the target-independent interfaces which we are implementing...
16 //
17 include "../Target.td"
18
19 //===----------------------------------------------------------------------===//
20 // Register File Description
21 //===----------------------------------------------------------------------===//
22
23 include "X86RegisterInfo.td"
24
25 //===----------------------------------------------------------------------===//
26 // Instruction Descriptions
27 //===----------------------------------------------------------------------===//
28
29 include "X86InstrInfo.td"
30
31 def X86InstrInfo : InstrInfo {
32   let PHIInst  = PHI;
33
34   // Define how we want to layout our TargetSpecific information field... This
35   // should be kept up-to-date with the fields in the X86InstrInfo.h file.
36   let TSFlagsFields = ["FormBits",
37                        "hasOpSizePrefix",
38                        "Prefix",
39                        "MemTypeBits",
40                        "ImmTypeBits",
41                        "FPFormBits",
42                        "printImplicitUsesAfter", 
43                        "printImplicitUsesBefore",
44                        "printImplicitDefsAfter",
45                        "Opcode"];
46   let TSFlagsShifts = [0,
47                        5,
48                        6,
49                        10,
50                        13,
51                        15,
52                        18,
53                        19,
54                        20,
55                        21];
56 }
57
58 def X86 : Target {
59   // Specify the callee saved registers.
60   let CalleeSavedRegisters = [ESI, EDI, EBX, EBP];
61
62   // Yes, pointers are 32-bits in size.
63   let PointerType = i32;
64
65   // Information about the instructions...
66   let InstructionSet = X86InstrInfo;
67 }