1 //===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides X86 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
27 class MCSubtargetInfo;
28 class MCRelocationInfo;
35 extern Target TheX86_32Target, TheX86_64Target;
37 /// Flavour of dwarf regnumbers
39 namespace DWARFFlavour {
41 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
45 /// Native X86 register numbers
49 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
54 std::string ParseX86Triple(StringRef TT);
56 unsigned getDwarfRegFlavour(Triple TT, bool isEH);
58 void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI);
60 /// Create a X86 MCSubtargetInfo instance. This is exposed so Asm parser, etc.
61 /// do not need to go through TargetRegistry.
62 MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
66 MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII,
67 const MCRegisterInfo &MRI,
70 MCAsmBackend *createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI,
71 StringRef TT, StringRef CPU);
72 MCAsmBackend *createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
73 StringRef TT, StringRef CPU);
75 /// Construct an X86 Windows COFF machine code streamer which will generate
76 /// PE/COFF format object files.
78 /// Takes ownership of \p AB and \p CE.
79 MCStreamer *createX86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB,
80 raw_ostream &OS, MCCodeEmitter *CE,
83 /// Construct an X86 Mach-O object writer.
84 MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS,
89 /// Construct an X86 ELF object writer.
90 MCObjectWriter *createX86ELFObjectWriter(raw_ostream &OS,
94 /// Construct an X86 Win COFF object writer.
95 MCObjectWriter *createX86WinCOFFObjectWriter(raw_ostream &OS, bool Is64Bit);
97 /// Construct X86-64 Mach-O relocation info.
98 MCRelocationInfo *createX86_64MachORelocationInfo(MCContext &Ctx);
100 /// Construct X86-64 ELF relocation info.
101 MCRelocationInfo *createX86_64ELFRelocationInfo(MCContext &Ctx);
102 } // End llvm namespace
105 // Defines symbolic names for X86 registers. This defines a mapping from
106 // register name to register number.
108 #define GET_REGINFO_ENUM
109 #include "X86GenRegisterInfo.inc"
111 // Defines symbolic names for the X86 instructions.
113 #define GET_INSTRINFO_ENUM
114 #include "X86GenInstrInfo.inc"
116 #define GET_SUBTARGETINFO_ENUM
117 #include "X86GenSubtargetInfo.inc"