1 //===-- X86DisassemblerDecoderInternal.h - Disassembler decoder -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler.
11 // It contains the public interface of the instruction decoder.
12 // Documentation for the disassembler can be found in X86Disassembler.h.
14 //===----------------------------------------------------------------------===//
16 #ifndef X86DISASSEMBLERDECODER_H
17 #define X86DISASSEMBLERDECODER_H
19 #include "X86DisassemblerDecoderCommon.h"
22 namespace X86Disassembler {
24 // Accessor functions for various fields of an Intel instruction
25 #define modFromModRM(modRM) (((modRM) & 0xc0) >> 6)
26 #define regFromModRM(modRM) (((modRM) & 0x38) >> 3)
27 #define rmFromModRM(modRM) ((modRM) & 0x7)
28 #define scaleFromSIB(sib) (((sib) & 0xc0) >> 6)
29 #define indexFromSIB(sib) (((sib) & 0x38) >> 3)
30 #define baseFromSIB(sib) ((sib) & 0x7)
31 #define wFromREX(rex) (((rex) & 0x8) >> 3)
32 #define rFromREX(rex) (((rex) & 0x4) >> 2)
33 #define xFromREX(rex) (((rex) & 0x2) >> 1)
34 #define bFromREX(rex) ((rex) & 0x1)
36 #define rFromEVEX2of4(evex) (((~(evex)) & 0x80) >> 7)
37 #define xFromEVEX2of4(evex) (((~(evex)) & 0x40) >> 6)
38 #define bFromEVEX2of4(evex) (((~(evex)) & 0x20) >> 5)
39 #define r2FromEVEX2of4(evex) (((~(evex)) & 0x10) >> 4)
40 #define mmFromEVEX2of4(evex) ((evex) & 0x3)
41 #define wFromEVEX3of4(evex) (((evex) & 0x80) >> 7)
42 #define vvvvFromEVEX3of4(evex) (((~(evex)) & 0x78) >> 3)
43 #define ppFromEVEX3of4(evex) ((evex) & 0x3)
44 #define zFromEVEX4of4(evex) (((evex) & 0x80) >> 7)
45 #define l2FromEVEX4of4(evex) (((evex) & 0x40) >> 6)
46 #define lFromEVEX4of4(evex) (((evex) & 0x20) >> 5)
47 #define bFromEVEX4of4(evex) (((evex) & 0x10) >> 4)
48 #define v2FromEVEX4of4(evex) (((~evex) & 0x8) >> 3)
49 #define aaaFromEVEX4of4(evex) ((evex) & 0x7)
51 #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
52 #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
53 #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
54 #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
55 #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7)
56 #define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3)
57 #define lFromVEX3of3(vex) (((vex) & 0x4) >> 2)
58 #define ppFromVEX3of3(vex) ((vex) & 0x3)
60 #define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7)
61 #define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3)
62 #define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
63 #define ppFromVEX2of2(vex) ((vex) & 0x3)
65 #define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7)
66 #define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6)
67 #define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5)
68 #define mmmmmFromXOP2of3(xop) ((xop) & 0x1f)
69 #define wFromXOP3of3(xop) (((xop) & 0x80) >> 7)
70 #define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3)
71 #define lFromXOP3of3(xop) (((xop) & 0x4) >> 2)
72 #define ppFromXOP3of3(xop) ((xop) & 0x3)
74 // These enums represent Intel registers for use by the decoder.
97 #define EA_BASES_16BIT \
133 #define EA_BASES_32BIT \
169 #define EA_BASES_64BIT \
327 #define REGS_SEGMENT \
345 #define REGS_CONTROL \
356 #define ALL_EA_BASES \
361 #define ALL_SIB_BASES \
380 /// \brief All possible values of the base field for effective-address
381 /// computations, a.k.a. the Mod and R/M fields of the ModR/M byte.
382 /// We distinguish between bases (EA_BASE_*) and registers that just happen
383 /// to be referred to when Mod == 0b11 (EA_REG_*).
386 #define ENTRY(x) EA_BASE_##x,
389 #define ENTRY(x) EA_REG_##x,
395 /// \brief All possible values of the SIB index field.
396 /// borrows entries from ALL_EA_BASES with the special case that
397 /// sib is synonymous with NONE.
398 /// Vector SIB: index can be XMM or YMM.
401 #define ENTRY(x) SIB_INDEX_##x,
410 /// \brief All possible values of the SIB base field.
413 #define ENTRY(x) SIB_BASE_##x,
419 /// \brief Possible displacement types for effective-address computations.
427 /// \brief All possible values of the reg field in the ModR/M byte.
429 #define ENTRY(x) MODRM_REG_##x,
435 /// \brief All possible segment overrides.
436 enum SegmentOverride {
447 /// \brief Possible values for the VEX.m-mmmm field
448 enum VEXLeadingOpcodeByte {
455 XOP_MAP_SELECT_8 = 0x8,
456 XOP_MAP_SELECT_9 = 0x9,
457 XOP_MAP_SELECT_A = 0xA
460 /// \brief Possible values for the VEX.pp/EVEX.pp field
462 VEX_PREFIX_NONE = 0x0,
468 enum VectorExtensionType {
469 TYPE_NO_VEX_XOP = 0x0,
476 /// \brief Type for the byte reader that the consumer must provide to
477 /// the decoder. Reads a single byte from the instruction's address space.
478 /// \param arg A baton that the consumer can associate with any internal
479 /// state that it needs.
480 /// \param byte A pointer to a single byte in memory that should be set to
481 /// contain the value at address.
482 /// \param address The address in the instruction's address space that should
484 /// \return -1 if the byte cannot be read for any reason; 0 otherwise.
485 typedef int (*byteReader_t)(const void *arg, uint8_t *byte, uint64_t address);
487 /// \brief Type for the logging function that the consumer can provide to
488 /// get debugging output from the decoder.
489 /// \param arg A baton that the consumer can associate with any internal
490 /// state that it needs.
491 /// \param log A string that contains the message. Will be reused after
492 /// the logger returns.
493 typedef void (*dlog_t)(void *arg, const char *log);
495 /// The specification for how to extract and interpret a full instruction and
497 struct InstructionSpecifier {
501 /// The x86 internal instruction, which is produced by the decoder.
502 struct InternalInstruction {
503 // Reader interface (C)
505 // Opaque value passed to the reader
506 const void* readerArg;
507 // The address of the next byte to read via the reader
508 uint64_t readerCursor;
510 // Logger interface (C)
512 // Opaque value passed to the logger
515 // General instruction information
517 // The mode to disassemble for (64-bit, protected, real)
518 DisassemblerMode mode;
519 // The start of the instruction, usable with the reader
520 uint64_t startLocation;
521 // The length of the instruction, in bytes
526 // 1 if the prefix byte corresponding to the entry is present; 0 if not
527 uint8_t prefixPresent[0x100];
528 // contains the location (for use with the reader) of the prefix byte
529 uint64_t prefixLocations[0x100];
530 // The value of the vector extension prefix(EVEX/VEX/XOP), if present
531 uint8_t vectorExtensionPrefix[4];
532 // The type of the vector extension prefix
533 VectorExtensionType vectorExtensionType;
534 // The value of the REX prefix, if present
536 // The location where a mandatory prefix would have to be (i.e., right before
537 // the opcode, or right before the REX prefix if one is present).
538 uint64_t necessaryPrefixLocation;
539 // The segment override type
540 SegmentOverride segmentOverride;
541 // 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease
542 bool xAcquireRelease;
544 // Sizes of various critical pieces of data, in bytes
545 uint8_t registerSize;
547 uint8_t displacementSize;
548 uint8_t immediateSize;
550 // Offsets from the start of the instruction to the pieces of data, which is
551 // needed to find relocation entries for adding symbolic operands.
552 uint8_t displacementOffset;
553 uint8_t immediateOffset;
557 // The last byte of the opcode, not counting any ModR/M extension
559 // The ModR/M byte of the instruction, if it is an opcode extension
560 uint8_t modRMExtension;
564 // The type of opcode, used for indexing into the array of decode tables
565 OpcodeType opcodeType;
566 // The instruction ID, extracted from the decode table
567 uint16_t instructionID;
568 // The specifier for the instruction, from the instruction info table
569 const InstructionSpecifier *spec;
571 // state for additional bytes, consumed during operand decode. Pattern:
572 // consumed___ indicates that the byte was already consumed and does not
573 // need to be consumed again.
575 // The VEX.vvvv field, which contains a third register operand for some AVX
579 // The writemask for AVX-512 instructions which is contained in EVEX.aaa
582 // The ModR/M byte, which contains most register operands and some portion of
583 // all memory operands.
587 // The SIB byte, used for more complex 32- or 64-bit memory operands
591 // The displacement, used for memory operands
592 bool consumedDisplacement;
593 int32_t displacement;
595 // Immediates. There can be two in some cases
596 uint8_t numImmediatesConsumed;
597 uint8_t numImmediatesTranslated;
598 uint64_t immediates[2];
600 // A register or immediate operand encoded into the opcode
603 // Portions of the ModR/M byte
605 // These fields determine the allowable values for the ModR/M fields, which
606 // depend on operand and address widths.
611 // The Mod and R/M fields can encode a base for an effective address, or a
612 // register. These are separated into two fields here.
614 EADisplacement eaDisplacement;
615 // The reg field always encodes a register
623 const OperandSpecifier *operands;
626 /// \brief Decode one instruction and store the decoding results in
627 /// a buffer provided by the consumer.
628 /// \param insn The buffer to store the instruction in. Allocated by the
630 /// \param reader The byteReader_t for the bytes to be read.
631 /// \param readerArg An argument to pass to the reader for storing context
632 /// specific to the consumer. May be NULL.
633 /// \param logger The dlog_t to be used in printing status messages from the
634 /// disassembler. May be NULL.
635 /// \param loggerArg An argument to pass to the logger for storing context
636 /// specific to the logger. May be NULL.
637 /// \param startLoc The address (in the reader's address space) of the first
638 /// byte in the instruction.
639 /// \param mode The mode (16-bit, 32-bit, 64-bit) to decode in.
640 /// \return Nonzero if there was an error during decode, 0 otherwise.
641 int decodeInstruction(InternalInstruction *insn,
643 const void *readerArg,
648 DisassemblerMode mode);
650 /// \brief Print a message to debugs()
651 /// \param file The name of the file printing the debug message.
652 /// \param line The line number that printed the debug message.
653 /// \param s The message to print.
654 void Debug(const char *file, unsigned line, const char *s);
656 const char *GetInstrName(unsigned Opcode, const void *mii);
658 } // namespace X86Disassembler