1 //===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "llvm/ADT/SmallVector.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/MC/MCAsmLexer.h"
14 #include "llvm/MC/MCAsmParser.h"
15 #include "llvm/MC/MCValue.h"
16 #include "llvm/Support/SourceMgr.h"
17 #include "llvm/Target/TargetRegistry.h"
18 #include "llvm/Target/TargetAsmParser.h"
24 class X86ATTAsmParser : public TargetAsmParser {
28 bool MatchInstruction(const StringRef &Name,
29 SmallVectorImpl<X86Operand> &Operands,
32 MCAsmParser &getParser() const { return Parser; }
34 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
36 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
38 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
40 bool ParseRegister(X86Operand &Op);
42 bool ParseOperand(X86Operand &Op);
44 bool ParseMemOperand(X86Operand &Op);
46 /// @name Auto-generated Match Functions
49 bool MatchRegisterName(const StringRef &Name, unsigned &RegNo);
54 X86ATTAsmParser(const Target &T, MCAsmParser &_Parser)
55 : TargetAsmParser(T), Parser(_Parser) {}
57 virtual bool ParseInstruction(const StringRef &Name, MCInst &Inst);
60 } // end anonymous namespace
65 /// X86Operand - Instances of this class represent a parsed X86 machine
92 unsigned getReg() const {
93 assert(Kind == Register && "Invalid access!");
97 static X86Operand CreateReg(unsigned RegNo) {
100 Res.Reg.RegNo = RegNo;
103 static X86Operand CreateImm(MCValue Val) {
105 Res.Kind = Immediate;
109 static X86Operand CreateMem(unsigned SegReg, MCValue Disp, unsigned BaseReg,
110 unsigned IndexReg, unsigned Scale) {
111 // If there is no index register, we should never have a scale, and we
112 // should always have a scale (in {1,2,4,8}) if we do.
113 assert(((Scale == 0 && !IndexReg) ||
114 (IndexReg && (Scale == 1 || Scale == 2 ||
115 Scale == 4 || Scale == 8))) &&
119 Res.Mem.SegReg = SegReg;
121 Res.Mem.BaseReg = BaseReg;
122 Res.Mem.IndexReg = IndexReg;
123 Res.Mem.Scale = Scale;
128 } // end anonymous namespace.
131 bool X86ATTAsmParser::ParseRegister(X86Operand &Op) {
132 const AsmToken &Tok = getLexer().getTok();
133 assert(Tok.is(AsmToken::Register) && "Invalid token kind!");
135 // FIXME: Validate register for the current architecture; we have to do
136 // validation later, so maybe there is no need for this here.
138 assert(Tok.getString().startswith("%") && "Invalid register name!");
139 if (MatchRegisterName(Tok.getString().substr(1), RegNo))
140 return Error(Tok.getLoc(), "invalid register name");
142 Op = X86Operand::CreateReg(RegNo);
143 getLexer().Lex(); // Eat register token.
148 bool X86ATTAsmParser::ParseOperand(X86Operand &Op) {
149 switch (getLexer().getKind()) {
151 return ParseMemOperand(Op);
152 case AsmToken::Register:
153 // FIXME: if a segment register, this could either be just the seg reg, or
154 // the start of a memory operand.
155 return ParseRegister(Op);
156 case AsmToken::Dollar: {
160 if (getParser().ParseRelocatableExpression(Val))
162 Op = X86Operand::CreateImm(Val);
166 getLexer().Lex(); // Eat the star.
168 if (getLexer().is(AsmToken::Register)) {
169 if (ParseRegister(Op))
171 } else if (ParseMemOperand(Op))
174 // FIXME: Note the '*' in the operand for use by the matcher.
179 /// ParseMemOperand: segment: disp(basereg, indexreg, scale)
180 bool X86ATTAsmParser::ParseMemOperand(X86Operand &Op) {
181 // FIXME: If SegReg ':' (e.g. %gs:), eat and remember.
184 // We have to disambiguate a parenthesized expression "(4+5)" from the start
185 // of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The
186 // only way to do this without lookahead is to eat the ( and see what is after
188 MCValue Disp = MCValue::get(0, 0, 0);
189 if (getLexer().isNot(AsmToken::LParen)) {
190 if (getParser().ParseRelocatableExpression(Disp)) return true;
192 // After parsing the base expression we could either have a parenthesized
193 // memory address or not. If not, return now. If so, eat the (.
194 if (getLexer().isNot(AsmToken::LParen)) {
195 Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 0);
202 // Okay, we have a '('. We don't know if this is an expression or not, but
203 // so we have to eat the ( to see beyond it.
204 getLexer().Lex(); // Eat the '('.
206 if (getLexer().is(AsmToken::Register) || getLexer().is(AsmToken::Comma)) {
207 // Nothing to do here, fall into the code below with the '(' part of the
208 // memory operand consumed.
210 // It must be an parenthesized expression, parse it now.
211 if (getParser().ParseParenRelocatableExpression(Disp))
214 // After parsing the base expression we could either have a parenthesized
215 // memory address or not. If not, return now. If so, eat the (.
216 if (getLexer().isNot(AsmToken::LParen)) {
217 Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 0);
226 // If we reached here, then we just ate the ( of the memory operand. Process
227 // the rest of the memory operand.
228 unsigned BaseReg = 0, IndexReg = 0, Scale = 0;
230 if (getLexer().is(AsmToken::Register)) {
231 if (ParseRegister(Op))
233 BaseReg = Op.getReg();
236 if (getLexer().is(AsmToken::Comma)) {
237 getLexer().Lex(); // Eat the comma.
239 // Following the comma we should have either an index register, or a scale
240 // value. We don't support the later form, but we want to parse it
243 // Not that even though it would be completely consistent to support syntax
244 // like "1(%eax,,1)", the assembler doesn't.
245 if (getLexer().is(AsmToken::Register)) {
246 if (ParseRegister(Op))
248 IndexReg = Op.getReg();
249 Scale = 1; // If not specified, the scale defaults to 1.
251 if (getLexer().isNot(AsmToken::RParen)) {
252 // Parse the scale amount:
253 // ::= ',' [scale-expression]
254 if (getLexer().isNot(AsmToken::Comma))
256 getLexer().Lex(); // Eat the comma.
258 if (getLexer().isNot(AsmToken::RParen)) {
259 SMLoc Loc = getLexer().getTok().getLoc();
262 if (getParser().ParseAbsoluteExpression(ScaleVal))
265 // Validate the scale amount.
266 if (ScaleVal != 1 && ScaleVal != 2 && ScaleVal != 4 && ScaleVal != 8)
267 return Error(Loc, "scale factor in address must be 1, 2, 4 or 8");
268 Scale = (unsigned)ScaleVal;
271 } else if (getLexer().isNot(AsmToken::RParen)) {
272 // Otherwise we have the unsupported form of a scale amount without an
274 SMLoc Loc = getLexer().getTok().getLoc();
277 if (getParser().ParseAbsoluteExpression(Value))
280 return Error(Loc, "cannot have scale factor without index register");
284 // Ok, we've eaten the memory operand, verify we have a ')' and eat it too.
285 if (getLexer().isNot(AsmToken::RParen))
286 return Error(getLexer().getTok().getLoc(),
287 "unexpected token in memory operand");
288 getLexer().Lex(); // Eat the ')'.
290 Op = X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale);
295 X86ATTAsmParser::MatchInstruction(const StringRef &Name,
296 SmallVectorImpl<X86Operand> &Operands,
301 bool X86ATTAsmParser::ParseInstruction(const StringRef &Name, MCInst &Inst) {
302 SmallVector<X86Operand, 3> Operands;
304 if (getLexer().isNot(AsmToken::EndOfStatement)) {
305 // Read the first operand.
306 Operands.push_back(X86Operand());
307 if (ParseOperand(Operands.back()))
310 while (getLexer().is(AsmToken::Comma)) {
311 getLexer().Lex(); // Eat the comma.
313 // Parse and remember the operand.
314 Operands.push_back(X86Operand());
315 if (ParseOperand(Operands.back()))
320 return MatchInstruction(Name, Operands, Inst);
323 // Force static initialization.
324 extern "C" void LLVMInitializeX86AsmParser() {
325 RegisterAsmParser<X86ATTAsmParser> X(TheX86_32Target);
326 RegisterAsmParser<X86ATTAsmParser> Y(TheX86_64Target);
329 #include "X86GenAsmMatcher.inc"