1 //===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "SystemZTargetMachine.h"
11 #include "llvm/CodeGen/Passes.h"
12 #include "llvm/Support/TargetRegistry.h"
13 #include "llvm/Transforms/Scalar.h"
17 extern "C" void LLVMInitializeSystemZTarget() {
18 // Register the target.
19 RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
22 SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT,
23 StringRef CPU, StringRef FS,
24 const TargetOptions &Options,
25 Reloc::Model RM, CodeModel::Model CM,
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
28 Subtarget(TT, CPU, FS),
29 // Make sure that global data has at least 16 bits of alignment by
30 // default, so that we can refer to it using LARL. We don't have any
31 // special requirements for stack variables though.
32 DL("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
33 InstrInfo(Subtarget), TLInfo(*this), TSInfo(DL), FrameLowering() {
38 /// SystemZ Code Generator Pass Configuration Options.
39 class SystemZPassConfig : public TargetPassConfig {
41 SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM)
42 : TargetPassConfig(TM, PM) {}
44 SystemZTargetMachine &getSystemZTargetMachine() const {
45 return getTM<SystemZTargetMachine>();
48 void addIRPasses() override;
49 bool addInstSelector() override;
50 bool addPreSched2() override;
51 bool addPreEmitPass() override;
53 } // end anonymous namespace
55 void SystemZPassConfig::addIRPasses() {
56 TargetPassConfig::addIRPasses();
57 addPass(createPartiallyInlineLibCallsPass());
60 bool SystemZPassConfig::addInstSelector() {
61 addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel()));
65 bool SystemZPassConfig::addPreSched2() {
66 if (getOptLevel() != CodeGenOpt::None &&
67 getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
68 addPass(&IfConverterID);
72 bool SystemZPassConfig::addPreEmitPass() {
73 // We eliminate comparisons here rather than earlier because some
74 // transformations can change the set of available CC values and we
75 // generally want those transformations to have priority. This is
76 // especially true in the commonest case where the result of the comparison
77 // is used by a single in-range branch instruction, since we will then
78 // be able to fuse the compare and the branch instead.
80 // For example, two-address NILF can sometimes be converted into
81 // three-address RISBLG. NILF produces a CC value that indicates whether
82 // the low word is zero, but RISBLG does not modify CC at all. On the
83 // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG.
84 // The CC value produced by NILL isn't useful for our purposes, but the
85 // value produced by RISBG can be used for any comparison with zero
86 // (not just equality). So there are some transformations that lose
87 // CC values (while still being worthwhile) and others that happen to make
88 // the CC result more useful than it was originally.
90 // Another reason is that we only want to use BRANCH ON COUNT in cases
91 // where we know that the count register is not going to be spilled.
93 // Doing it so late makes it more likely that a register will be reused
94 // between the comparison and the branch, but it isn't clear whether
95 // preventing that would be a win or not.
96 if (getOptLevel() != CodeGenOpt::None)
97 addPass(createSystemZElimComparePass(getSystemZTargetMachine()));
98 if (getOptLevel() != CodeGenOpt::None)
99 addPass(createSystemZShortenInstPass(getSystemZTargetMachine()));
100 addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
104 TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
105 return new SystemZPassConfig(this, PM);