1 //===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SystemZ implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "SystemZRegisterInfo.h"
16 #include "SystemZSubtarget.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/Target/TargetFrameInfo.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetOptions.h"
23 #include "llvm/ADT/BitVector.h"
26 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
27 const TargetInstrInfo &tii)
28 : SystemZGenRegisterInfo(SystemZ::NOP, SystemZ::NOP),
33 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
34 static const unsigned CalleeSavedRegs[] = {
35 SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D,
36 SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
37 SystemZ::F1, SystemZ::F3, SystemZ::F5, SystemZ::F7,
41 return CalleeSavedRegs;
44 const TargetRegisterClass* const*
45 SystemZRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
46 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
47 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
48 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
49 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
50 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass,
51 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass,
52 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 0
54 return CalleeSavedRegClasses;
57 BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
58 BitVector Reserved(getNumRegs());
60 Reserved.set(SystemZ::R11D);
61 Reserved.set(SystemZ::R14D);
62 Reserved.set(SystemZ::R15D);
66 // needsFP - Return true if the specified function should have a dedicated frame
67 // pointer register. This is true if the function has variable sized allocas or
68 // if frame pointer elimination is disabled.
70 bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const {
71 const MachineFrameInfo *MFI = MF.getFrameInfo();
72 return NoFramePointerElim || MFI->hasVarSizedObjects();
75 void SystemZRegisterInfo::
76 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
77 MachineBasicBlock::iterator I) const {
78 assert(0 && "Not implemented yet!");
81 int SystemZRegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const {
82 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
83 MachineFrameInfo *MFI = MF.getFrameInfo();
84 int Offset = MFI->getObjectOffset(FI) + MFI->getOffsetAdjustment();
85 uint64_t StackSize = MFI->getStackSize();
87 Offset += StackSize - TFI.getOffsetOfLocalArea();
89 // Skip the register save area if we generated the stack frame.
91 Offset -= TFI.getOffsetOfLocalArea();
96 void SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
97 int SPAdj, RegScavenger *RS) const {
98 assert(SPAdj == 0 && "Unxpected");
101 MachineInstr &MI = *II;
102 MachineFunction &MF = *MI.getParent()->getParent();
103 while (!MI.getOperand(i).isFI()) {
105 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
108 int FrameIndex = MI.getOperand(i).getIndex();
110 unsigned BasePtr = (hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
112 // This must be part of a rri or ri operand memory reference. Replace the
113 // FrameIndex with base register with BasePtr. Add an offset to the
114 // displacement field.
115 MI.getOperand(i).ChangeToRegister(BasePtr, false);
117 // Offset is a 20-bit integer.
118 // FIXME: handle "too long" displacements.
119 int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
120 MI.getOperand(i+1).ChangeToImmediate(Offset);
123 void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const {
127 void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF,
128 MachineBasicBlock &MBB) const {
132 unsigned SystemZRegisterInfo::getRARegister() const {
133 assert(0 && "What is the return address register");
137 unsigned SystemZRegisterInfo::getFrameRegister(MachineFunction &MF) const {
138 assert(0 && "What is the frame register");
142 unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
143 assert(0 && "What is the exception register");
147 unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
148 assert(0 && "What is the exception handler register");
152 int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
153 assert(0 && "What is the dwarf register number");
157 #include "SystemZGenRegisterInfo.inc"