1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZICmp : SDTypeProfile<0, 3,
21 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
24 SDTCisVT<2, OtherVT>]>;
25 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
30 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
33 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
38 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
41 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
42 [SDTCisVT<0, untyped>,
45 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
46 [SDTCisVT<0, untyped>,
49 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
56 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
64 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
68 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
73 def SDT_ZString : SDTypeProfile<1, 3,
78 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
79 def SDT_ZPrefetch : SDTypeProfile<0, 2,
83 //===----------------------------------------------------------------------===//
85 //===----------------------------------------------------------------------===//
87 // These are target-independent nodes, but have target-specific formats.
88 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
89 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
90 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
91 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
93 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
95 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
96 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
97 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
98 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
99 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
101 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
102 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
104 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
105 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
107 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
108 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
110 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
111 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
112 SDT_ZWrapOffset, []>;
113 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
114 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
115 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
116 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>;
117 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
118 [SDNPHasChain, SDNPInGlue]>;
119 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
121 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
122 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
124 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
125 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
126 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
127 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
128 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
129 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
131 def z_serialize : SDNode<"SystemZISD::SERIALIZE", SDTNone,
132 [SDNPHasChain, SDNPMayStore]>;
134 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
135 : SDNode<"SystemZISD::"##name, profile,
136 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
138 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
139 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
140 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
141 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
142 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
143 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
144 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
145 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
146 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
147 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
148 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
149 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
151 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
152 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
153 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
154 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
155 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
156 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
157 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
158 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
159 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
160 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
161 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
162 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
163 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
164 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
165 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
166 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
167 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
168 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
169 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
170 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
171 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
172 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
173 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
174 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
175 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
176 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
177 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
179 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
180 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
183 //===----------------------------------------------------------------------===//
185 //===----------------------------------------------------------------------===//
187 // Signed and unsigned comparisons.
188 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
189 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
190 return Type != SystemZICMP::UnsignedOnly;
192 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
193 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
194 return Type != SystemZICMP::SignedOnly;
197 // Register- and memory-based TEST UNDER MASK.
198 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
199 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
201 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
202 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
203 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
204 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
206 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
207 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
208 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
209 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
211 // Typed floating-point loads.
212 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
213 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
215 // Extending loads in which the extension type can be signed.
216 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
217 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
218 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
220 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
221 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
223 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
224 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
226 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
227 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
230 // Extending loads in which the extension type can be unsigned.
231 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
232 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
233 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
235 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
236 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
238 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
239 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
241 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
242 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
245 // Extending loads in which the extension type doesn't matter.
246 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
247 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
249 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
250 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
252 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
253 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
255 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
256 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
260 class AlignedLoad<SDPatternOperator load>
261 : PatFrag<(ops node:$addr), (load node:$addr), [{
262 auto *Load = cast<LoadSDNode>(N);
263 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
265 def aligned_load : AlignedLoad<load>;
266 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
267 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
268 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
269 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
272 class AlignedStore<SDPatternOperator store>
273 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
274 auto *Store = cast<StoreSDNode>(N);
275 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
277 def aligned_store : AlignedStore<store>;
278 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
279 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
281 // Non-volatile loads. Used for instructions that might access the storage
282 // location multiple times.
283 class NonvolatileLoad<SDPatternOperator load>
284 : PatFrag<(ops node:$addr), (load node:$addr), [{
285 auto *Load = cast<LoadSDNode>(N);
286 return !Load->isVolatile();
288 def nonvolatile_load : NonvolatileLoad<load>;
289 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
290 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
291 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
293 // Non-volatile stores.
294 class NonvolatileStore<SDPatternOperator store>
295 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
296 auto *Store = cast<StoreSDNode>(N);
297 return !Store->isVolatile();
299 def nonvolatile_store : NonvolatileStore<store>;
300 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
301 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
302 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
304 // A store of a load that can be implemented using MVC.
305 def mvc_store : PatFrag<(ops node:$value, node:$addr),
306 (unindexedstore node:$value, node:$addr),
307 [{ return storeLoadCanUseMVC(N); }]>;
309 // Binary read-modify-write operations on memory in which the other
310 // operand is also memory and for which block operations like NC can
311 // be used. There are two patterns for each operator, depending on
312 // which operand contains the "other" load.
313 multiclass block_op<SDPatternOperator operator> {
314 def "1" : PatFrag<(ops node:$value, node:$addr),
315 (unindexedstore (operator node:$value,
316 (unindexedload node:$addr)),
318 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
319 def "2" : PatFrag<(ops node:$value, node:$addr),
320 (unindexedstore (operator (unindexedload node:$addr),
323 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
325 defm block_and : block_op<and>;
326 defm block_or : block_op<or>;
327 defm block_xor : block_op<xor>;
330 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
331 (or (and node:$src1, -256), node:$src2)>;
332 def insertll : PatFrag<(ops node:$src1, node:$src2),
333 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
334 def insertlh : PatFrag<(ops node:$src1, node:$src2),
335 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
336 def inserthl : PatFrag<(ops node:$src1, node:$src2),
337 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
338 def inserthh : PatFrag<(ops node:$src1, node:$src2),
339 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
340 def insertlf : PatFrag<(ops node:$src1, node:$src2),
341 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
342 def inserthf : PatFrag<(ops node:$src1, node:$src2),
343 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
345 // ORs that can be treated as insertions.
346 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
347 (or node:$src1, node:$src2), [{
348 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
349 return CurDAG->MaskedValueIsZero(N->getOperand(0),
350 APInt::getLowBitsSet(BitWidth, 8));
353 // ORs that can be treated as reversed insertions.
354 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
355 (or node:$src1, node:$src2), [{
356 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
357 return CurDAG->MaskedValueIsZero(N->getOperand(1),
358 APInt::getLowBitsSet(BitWidth, 8));
361 // Negative integer absolute.
362 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
364 // Integer absolute, matching the canonical form generated by DAGCombiner.
365 def z_iabs32 : PatFrag<(ops node:$src),
366 (xor (add node:$src, (sra node:$src, (i32 31))),
367 (sra node:$src, (i32 31)))>;
368 def z_iabs64 : PatFrag<(ops node:$src),
369 (xor (add node:$src, (sra node:$src, (i32 63))),
370 (sra node:$src, (i32 63)))>;
371 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
372 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
374 // Fused multiply-add and multiply-subtract, but with the order of the
375 // operands matching SystemZ's MA and MS instructions.
376 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
377 (fma node:$src2, node:$src3, node:$src1)>;
378 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
379 (fma node:$src2, node:$src3, (fneg node:$src1))>;
381 // Floating-point negative absolute.
382 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
384 // Create a unary operator that loads from memory and then performs
385 // the given operation on it.
386 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
387 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
389 // Create a store operator that performs the given unary operation
390 // on the value before storing it.
391 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
392 : PatFrag<(ops node:$value, node:$addr),
393 (store (operator node:$value), node:$addr)>;