1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZICmp : SDTypeProfile<0, 3,
21 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
24 SDTCisVT<2, OtherVT>]>;
25 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
30 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
33 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
38 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
41 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
42 [SDTCisVT<0, untyped>,
45 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
46 [SDTCisVT<0, untyped>,
49 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
56 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
64 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
68 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
73 def SDT_ZString : SDTypeProfile<1, 3,
78 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
79 def SDT_ZPrefetch : SDTypeProfile<0, 2,
83 //===----------------------------------------------------------------------===//
85 //===----------------------------------------------------------------------===//
87 // These are target-independent nodes, but have target-specific formats.
88 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
89 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
90 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
91 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
93 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
95 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
96 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
97 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
98 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
99 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
101 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
102 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
104 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
105 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
107 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
108 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
110 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
111 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
112 SDT_ZWrapOffset, []>;
113 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
114 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
115 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
116 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>;
117 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
118 [SDNPHasChain, SDNPInGlue]>;
119 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
121 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
122 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
124 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
125 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
126 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
127 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
128 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
130 def z_serialize : SDNode<"SystemZISD::SERIALIZE", SDTNone,
131 [SDNPHasChain, SDNPMayStore]>;
133 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
134 : SDNode<"SystemZISD::"##name, profile,
135 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
137 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
138 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
139 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
140 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
141 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
142 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
143 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
144 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
145 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
146 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
147 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
148 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
150 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
151 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
152 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
153 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
154 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
155 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
156 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
157 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
158 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
159 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
160 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
161 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
162 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
163 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
164 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
165 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
166 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
167 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
168 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
169 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
170 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
171 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
172 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
173 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
174 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
175 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
176 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
178 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
179 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
182 //===----------------------------------------------------------------------===//
184 //===----------------------------------------------------------------------===//
186 // Signed and unsigned comparisons.
187 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
188 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
189 return Type != SystemZICMP::UnsignedOnly;
191 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
192 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
193 return Type != SystemZICMP::SignedOnly;
196 // Register- and memory-based TEST UNDER MASK.
197 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
198 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
200 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
201 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
202 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
203 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
205 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
206 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
207 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
208 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
210 // Typed floating-point loads.
211 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
212 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
214 // Extending loads in which the extension type can be signed.
215 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
216 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
217 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
219 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
220 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
222 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
223 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
225 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
226 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
229 // Extending loads in which the extension type can be unsigned.
230 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
231 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
232 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
234 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
235 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
237 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
238 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
240 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
241 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
244 // Extending loads in which the extension type doesn't matter.
245 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
246 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
248 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
249 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
251 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
252 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
254 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
255 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
259 class AlignedLoad<SDPatternOperator load>
260 : PatFrag<(ops node:$addr), (load node:$addr), [{
261 auto *Load = cast<LoadSDNode>(N);
262 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
264 def aligned_load : AlignedLoad<load>;
265 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
266 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
267 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
268 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
271 class AlignedStore<SDPatternOperator store>
272 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
273 auto *Store = cast<StoreSDNode>(N);
274 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
276 def aligned_store : AlignedStore<store>;
277 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
278 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
280 // Non-volatile loads. Used for instructions that might access the storage
281 // location multiple times.
282 class NonvolatileLoad<SDPatternOperator load>
283 : PatFrag<(ops node:$addr), (load node:$addr), [{
284 auto *Load = cast<LoadSDNode>(N);
285 return !Load->isVolatile();
287 def nonvolatile_load : NonvolatileLoad<load>;
288 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
289 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
290 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
292 // Non-volatile stores.
293 class NonvolatileStore<SDPatternOperator store>
294 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
295 auto *Store = cast<StoreSDNode>(N);
296 return !Store->isVolatile();
298 def nonvolatile_store : NonvolatileStore<store>;
299 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
300 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
301 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
303 // A store of a load that can be implemented using MVC.
304 def mvc_store : PatFrag<(ops node:$value, node:$addr),
305 (unindexedstore node:$value, node:$addr),
306 [{ return storeLoadCanUseMVC(N); }]>;
308 // Binary read-modify-write operations on memory in which the other
309 // operand is also memory and for which block operations like NC can
310 // be used. There are two patterns for each operator, depending on
311 // which operand contains the "other" load.
312 multiclass block_op<SDPatternOperator operator> {
313 def "1" : PatFrag<(ops node:$value, node:$addr),
314 (unindexedstore (operator node:$value,
315 (unindexedload node:$addr)),
317 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
318 def "2" : PatFrag<(ops node:$value, node:$addr),
319 (unindexedstore (operator (unindexedload node:$addr),
322 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
324 defm block_and : block_op<and>;
325 defm block_or : block_op<or>;
326 defm block_xor : block_op<xor>;
329 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
330 (or (and node:$src1, -256), node:$src2)>;
331 def insertll : PatFrag<(ops node:$src1, node:$src2),
332 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
333 def insertlh : PatFrag<(ops node:$src1, node:$src2),
334 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
335 def inserthl : PatFrag<(ops node:$src1, node:$src2),
336 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
337 def inserthh : PatFrag<(ops node:$src1, node:$src2),
338 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
339 def insertlf : PatFrag<(ops node:$src1, node:$src2),
340 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
341 def inserthf : PatFrag<(ops node:$src1, node:$src2),
342 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
344 // ORs that can be treated as insertions.
345 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
346 (or node:$src1, node:$src2), [{
347 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
348 return CurDAG->MaskedValueIsZero(N->getOperand(0),
349 APInt::getLowBitsSet(BitWidth, 8));
352 // ORs that can be treated as reversed insertions.
353 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
354 (or node:$src1, node:$src2), [{
355 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
356 return CurDAG->MaskedValueIsZero(N->getOperand(1),
357 APInt::getLowBitsSet(BitWidth, 8));
360 // Negative integer absolute.
361 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
363 // Integer absolute, matching the canonical form generated by DAGCombiner.
364 def z_iabs32 : PatFrag<(ops node:$src),
365 (xor (add node:$src, (sra node:$src, (i32 31))),
366 (sra node:$src, (i32 31)))>;
367 def z_iabs64 : PatFrag<(ops node:$src),
368 (xor (add node:$src, (sra node:$src, (i32 63))),
369 (sra node:$src, (i32 63)))>;
370 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
371 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
373 // Fused multiply-add and multiply-subtract, but with the order of the
374 // operands matching SystemZ's MA and MS instructions.
375 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
376 (fma node:$src2, node:$src3, node:$src1)>;
377 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
378 (fma node:$src2, node:$src3, (fneg node:$src1))>;
380 // Floating-point negative absolute.
381 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
383 // Create a unary operator that loads from memory and then performs
384 // the given operation on it.
385 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
386 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
388 // Create a store operator that performs the given unary operation
389 // on the value before storing it.
390 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
391 : PatFrag<(ops node:$value, node:$addr),
392 (store (operator node:$value), node:$addr)>;