1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
21 SDTCisVT<2, OtherVT>]>;
22 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
27 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
30 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
31 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
34 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
35 [SDTCisVT<0, untyped>,
38 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
39 [SDTCisVT<0, untyped>,
42 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
49 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
57 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
61 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
63 //===----------------------------------------------------------------------===//
65 //===----------------------------------------------------------------------===//
67 // These are target-independent nodes, but have target-specific formats.
68 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
69 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
70 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
71 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
74 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
75 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
76 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
77 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
78 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
80 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
81 def z_cmp : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>;
82 def z_ucmp : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>;
83 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
84 [SDNPHasChain, SDNPInGlue]>;
85 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
87 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
88 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
90 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
91 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
92 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
93 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
94 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
96 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
97 : SDNode<"SystemZISD::"##name, profile,
98 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
100 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
101 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
102 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
103 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
104 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
105 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
106 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
107 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
108 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
109 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
110 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
111 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
113 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
114 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
115 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
116 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
117 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
120 //===----------------------------------------------------------------------===//
122 //===----------------------------------------------------------------------===//
124 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
125 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
126 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
127 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
129 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
130 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
131 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
132 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
134 // Typed floating-point loads.
135 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
136 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
138 // Extending loads in which the extension type doesn't matter.
139 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
140 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
142 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
143 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
145 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
146 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
148 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
149 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
153 class AlignedLoad<SDPatternOperator load>
154 : PatFrag<(ops node:$addr), (load node:$addr), [{
155 LoadSDNode *Load = cast<LoadSDNode>(N);
156 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
158 def aligned_load : AlignedLoad<load>;
159 def aligned_sextloadi16 : AlignedLoad<sextloadi16>;
160 def aligned_sextloadi32 : AlignedLoad<sextloadi32>;
161 def aligned_zextloadi16 : AlignedLoad<zextloadi16>;
162 def aligned_zextloadi32 : AlignedLoad<zextloadi32>;
165 class AlignedStore<SDPatternOperator store>
166 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
167 StoreSDNode *Store = cast<StoreSDNode>(N);
168 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
170 def aligned_store : AlignedStore<store>;
171 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
172 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
174 // Non-volatile loads. Used for instructions that might access the storage
175 // location multiple times.
176 class NonvolatileLoad<SDPatternOperator load>
177 : PatFrag<(ops node:$addr), (load node:$addr), [{
178 LoadSDNode *Load = cast<LoadSDNode>(N);
179 return !Load->isVolatile();
181 def nonvolatile_load : NonvolatileLoad<load>;
182 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
183 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
184 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
186 // Non-volatile stores.
187 class NonvolatileStore<SDPatternOperator store>
188 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
189 StoreSDNode *Store = cast<StoreSDNode>(N);
190 return !Store->isVolatile();
192 def nonvolatile_store : NonvolatileStore<store>;
193 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
194 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
195 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
198 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
199 (or (and node:$src1, -256), node:$src2)>;
200 def insertll : PatFrag<(ops node:$src1, node:$src2),
201 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
202 def insertlh : PatFrag<(ops node:$src1, node:$src2),
203 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
204 def inserthl : PatFrag<(ops node:$src1, node:$src2),
205 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
206 def inserthh : PatFrag<(ops node:$src1, node:$src2),
207 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
208 def insertlf : PatFrag<(ops node:$src1, node:$src2),
209 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
210 def inserthf : PatFrag<(ops node:$src1, node:$src2),
211 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
213 // ORs that can be treated as insertions.
214 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
215 (or node:$src1, node:$src2), [{
216 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
217 return CurDAG->MaskedValueIsZero(N->getOperand(0),
218 APInt::getLowBitsSet(BitWidth, 8));
221 // ORs that can be treated as reversed insertions.
222 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
223 (or node:$src1, node:$src2), [{
224 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
225 return CurDAG->MaskedValueIsZero(N->getOperand(1),
226 APInt::getLowBitsSet(BitWidth, 8));
229 // Fused multiply-add and multiply-subtract, but with the order of the
230 // operands matching SystemZ's MA and MS instructions.
231 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
232 (fma node:$src2, node:$src3, node:$src1)>;
233 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
234 (fma node:$src2, node:$src3, (fneg node:$src1))>;
236 // Floating-point negative absolute.
237 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
239 // Create a unary operator that loads from memory and then performs
240 // the given operation on it.
241 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
242 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
244 // Create a store operator that performs the given unary operation
245 // on the value before storing it.
246 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
247 : PatFrag<(ops node:$value, node:$addr),
248 (store (operator node:$value), node:$addr)>;