1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
21 SDTCisVT<2, OtherVT>]>;
22 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
27 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
30 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
31 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
34 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
35 [SDTCisVT<0, untyped>,
38 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
39 [SDTCisVT<0, untyped>,
42 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
49 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
57 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
61 def SDT_ZString : SDTypeProfile<1, 3,
66 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
67 def SDT_ZPrefetch : SDTypeProfile<0, 2,
71 //===----------------------------------------------------------------------===//
73 //===----------------------------------------------------------------------===//
75 // These are target-independent nodes, but have target-specific formats.
76 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
77 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
78 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
79 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
82 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
83 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
84 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
85 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
86 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
88 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
89 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
91 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
92 def z_cmp : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>;
93 def z_ucmp : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>;
94 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
95 [SDNPHasChain, SDNPInGlue]>;
96 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
98 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
99 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
101 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
102 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
103 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
104 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
105 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
107 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
108 : SDNode<"SystemZISD::"##name, profile,
109 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
111 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
112 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
113 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
114 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
115 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
116 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
117 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
118 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
119 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
120 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
121 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
122 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
124 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
125 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
126 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
127 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
128 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
129 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
130 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
131 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
132 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
133 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
134 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
136 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
137 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
140 //===----------------------------------------------------------------------===//
142 //===----------------------------------------------------------------------===//
144 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
145 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
146 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
147 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
149 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
150 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
151 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
152 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
154 // Typed floating-point loads.
155 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
156 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
158 // Extending loads in which the extension type doesn't matter.
159 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
160 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
162 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
163 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
165 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
166 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
168 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
169 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
173 class AlignedLoad<SDPatternOperator load>
174 : PatFrag<(ops node:$addr), (load node:$addr), [{
175 LoadSDNode *Load = cast<LoadSDNode>(N);
176 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
178 def aligned_load : AlignedLoad<load>;
179 def aligned_sextloadi16 : AlignedLoad<sextloadi16>;
180 def aligned_sextloadi32 : AlignedLoad<sextloadi32>;
181 def aligned_zextloadi16 : AlignedLoad<zextloadi16>;
182 def aligned_zextloadi32 : AlignedLoad<zextloadi32>;
185 class AlignedStore<SDPatternOperator store>
186 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
187 StoreSDNode *Store = cast<StoreSDNode>(N);
188 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
190 def aligned_store : AlignedStore<store>;
191 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
192 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
194 // Non-volatile loads. Used for instructions that might access the storage
195 // location multiple times.
196 class NonvolatileLoad<SDPatternOperator load>
197 : PatFrag<(ops node:$addr), (load node:$addr), [{
198 LoadSDNode *Load = cast<LoadSDNode>(N);
199 return !Load->isVolatile();
201 def nonvolatile_load : NonvolatileLoad<load>;
202 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
203 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
204 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
206 // Non-volatile stores.
207 class NonvolatileStore<SDPatternOperator store>
208 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
209 StoreSDNode *Store = cast<StoreSDNode>(N);
210 return !Store->isVolatile();
212 def nonvolatile_store : NonvolatileStore<store>;
213 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
214 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
215 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
218 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
219 (or (and node:$src1, -256), node:$src2)>;
220 def insertll : PatFrag<(ops node:$src1, node:$src2),
221 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
222 def insertlh : PatFrag<(ops node:$src1, node:$src2),
223 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
224 def inserthl : PatFrag<(ops node:$src1, node:$src2),
225 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
226 def inserthh : PatFrag<(ops node:$src1, node:$src2),
227 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
228 def insertlf : PatFrag<(ops node:$src1, node:$src2),
229 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
230 def inserthf : PatFrag<(ops node:$src1, node:$src2),
231 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
233 // ORs that can be treated as insertions.
234 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
235 (or node:$src1, node:$src2), [{
236 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
237 return CurDAG->MaskedValueIsZero(N->getOperand(0),
238 APInt::getLowBitsSet(BitWidth, 8));
241 // ORs that can be treated as reversed insertions.
242 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
243 (or node:$src1, node:$src2), [{
244 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
245 return CurDAG->MaskedValueIsZero(N->getOperand(1),
246 APInt::getLowBitsSet(BitWidth, 8));
249 // Integer absolute, matching the canonical form generated by DAGCombiner.
250 def z_iabs32 : PatFrag<(ops node:$src),
251 (xor (add node:$src, (sra node:$src, (i32 31))),
252 (sra node:$src, (i32 31)))>;
253 def z_iabs64 : PatFrag<(ops node:$src),
254 (xor (add node:$src, (sra node:$src, (i32 63))),
255 (sra node:$src, (i32 63)))>;
256 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
257 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
259 // Fused multiply-add and multiply-subtract, but with the order of the
260 // operands matching SystemZ's MA and MS instructions.
261 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
262 (fma node:$src2, node:$src3, node:$src1)>;
263 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
264 (fma node:$src2, node:$src3, (fneg node:$src1))>;
266 // Floating-point negative absolute.
267 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
269 // Create a unary operator that loads from memory and then performs
270 // the given operation on it.
271 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
272 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
274 // Create a store operator that performs the given unary operation
275 // on the value before storing it.
276 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
277 : PatFrag<(ops node:$value, node:$addr),
278 (store (operator node:$value), node:$addr)>;