[SystemZ] Add conditional store patterns
[oota-llvm.git] / lib / Target / SystemZ / SystemZOperators.td
1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 //===----------------------------------------------------------------------===//
11 // Type profiles
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart        : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd          : SDCallSeqEnd<[SDTCisVT<0, i64>,
15                                             SDTCisVT<1, i64>]>;
16 def SDT_ZCall               : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp                : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZBRCCMask           : SDTypeProfile<0, 2,
19                                             [SDTCisVT<0, i8>,
20                                              SDTCisVT<1, OtherVT>]>;
21 def SDT_ZSelectCCMask       : SDTypeProfile<1, 3,
22                                             [SDTCisSameAs<0, 1>,
23                                              SDTCisSameAs<1, 2>,
24                                              SDTCisVT<3, i8>]>;
25 def SDT_ZWrapPtr            : SDTypeProfile<1, 1,
26                                             [SDTCisSameAs<0, 1>,
27                                              SDTCisPtrTy<0>]>;
28 def SDT_ZAdjDynAlloc        : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
29 def SDT_ZExtractAccess      : SDTypeProfile<1, 1,
30                                             [SDTCisVT<0, i32>,
31                                              SDTCisVT<1, i8>]>;
32 def SDT_ZGR128Binary32      : SDTypeProfile<1, 2,
33                                             [SDTCisVT<0, untyped>,
34                                              SDTCisVT<1, untyped>,
35                                              SDTCisVT<2, i32>]>;
36 def SDT_ZGR128Binary64      : SDTypeProfile<1, 2,
37                                             [SDTCisVT<0, untyped>,
38                                              SDTCisVT<1, untyped>,
39                                              SDTCisVT<2, i64>]>;
40 def SDT_ZAtomicLoadBinaryW  : SDTypeProfile<1, 5,
41                                             [SDTCisVT<0, i32>,
42                                              SDTCisPtrTy<1>,
43                                              SDTCisVT<2, i32>,
44                                              SDTCisVT<3, i32>,
45                                              SDTCisVT<4, i32>,
46                                              SDTCisVT<5, i32>]>;
47 def SDT_ZAtomicCmpSwapW     : SDTypeProfile<1, 6,
48                                             [SDTCisVT<0, i32>,
49                                              SDTCisPtrTy<1>,
50                                              SDTCisVT<2, i32>,
51                                              SDTCisVT<3, i32>,
52                                              SDTCisVT<4, i32>,
53                                              SDTCisVT<5, i32>,
54                                              SDTCisVT<6, i32>]>;
55
56 //===----------------------------------------------------------------------===//
57 // Node definitions
58 //===----------------------------------------------------------------------===//
59
60 // These are target-independent nodes, but have target-specific formats.
61 def callseq_start       : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
62                                  [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
63 def callseq_end         : SDNode<"ISD::CALLSEQ_END",   SDT_CallSeqEnd,
64                                  [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
65                                   SDNPOutGlue]>;
66
67 // Nodes for SystemZISD::*.  See SystemZISelLowering.h for more details.
68 def z_retflag           : SDNode<"SystemZISD::RET_FLAG", SDTNone,
69                                  [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
70 def z_call              : SDNode<"SystemZISD::CALL", SDT_ZCall,
71                                  [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
72                                   SDNPVariadic]>;
73 def z_pcrel_wrapper     : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
74 def z_cmp               : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>;
75 def z_ucmp              : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>;
76 def z_br_ccmask         : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
77                                  [SDNPHasChain, SDNPInGlue]>;
78 def z_select_ccmask     : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
79                                  [SDNPInGlue]>;
80 def z_adjdynalloc       : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
81 def z_extract_access    : SDNode<"SystemZISD::EXTRACT_ACCESS",
82                                  SDT_ZExtractAccess>;
83 def z_umul_lohi64       : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
84 def z_sdivrem64         : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
85 def z_udivrem32         : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
86 def z_udivrem64         : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
87
88 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
89   : SDNode<"SystemZISD::"##name, profile,
90            [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
91
92 def z_atomic_swapw      : AtomicWOp<"ATOMIC_SWAPW">;
93 def z_atomic_loadw_add  : AtomicWOp<"ATOMIC_LOADW_ADD">;
94 def z_atomic_loadw_sub  : AtomicWOp<"ATOMIC_LOADW_SUB">;
95 def z_atomic_loadw_and  : AtomicWOp<"ATOMIC_LOADW_AND">;
96 def z_atomic_loadw_or   : AtomicWOp<"ATOMIC_LOADW_OR">;
97 def z_atomic_loadw_xor  : AtomicWOp<"ATOMIC_LOADW_XOR">;
98 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
99 def z_atomic_loadw_min  : AtomicWOp<"ATOMIC_LOADW_MIN">;
100 def z_atomic_loadw_max  : AtomicWOp<"ATOMIC_LOADW_MAX">;
101 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
102 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
103 def z_atomic_cmp_swapw  : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
104
105 //===----------------------------------------------------------------------===//
106 // Pattern fragments
107 //===----------------------------------------------------------------------===//
108
109 // Register sign-extend operations.  Sub-32-bit values are represented as i32s.
110 def sext8  : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
111 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
112 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
113
114 // Register zero-extend operations.  Sub-32-bit values are represented as i32s.
115 def zext8  : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
116 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
117 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
118
119 // Typed floating-point loads.
120 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
121 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
122
123 // Extending loads in which the extension type doesn't matter.
124 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
125   return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
126 }]>;
127 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
128   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
129 }]>;
130 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
131   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
132 }]>;
133 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
134   return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
135 }]>;
136
137 // Aligned loads.
138 class AlignedLoad<SDPatternOperator load>
139   : PatFrag<(ops node:$addr), (load node:$addr), [{
140   LoadSDNode *Load = cast<LoadSDNode>(N);
141   return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
142 }]>;
143 def aligned_load        : AlignedLoad<load>;
144 def aligned_sextloadi16 : AlignedLoad<sextloadi16>;
145 def aligned_sextloadi32 : AlignedLoad<sextloadi32>;
146 def aligned_zextloadi16 : AlignedLoad<zextloadi16>;
147 def aligned_zextloadi32 : AlignedLoad<zextloadi32>;
148
149 // Aligned stores.
150 class AlignedStore<SDPatternOperator store>
151   : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
152   StoreSDNode *Store = cast<StoreSDNode>(N);
153   return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
154 }]>;
155 def aligned_store         : AlignedStore<store>;
156 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
157 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
158
159 // Non-volatile loads.  Used for instructions that might access the storage
160 // location multiple times.
161 class NonvolatileLoad<SDPatternOperator load>
162   : PatFrag<(ops node:$addr), (load node:$addr), [{
163   LoadSDNode *Load = cast<LoadSDNode>(N);
164   return !Load->isVolatile();
165 }]>;
166 def nonvolatile_load          : NonvolatileLoad<load>;
167 def nonvolatile_anyextloadi8  : NonvolatileLoad<anyextloadi8>;
168 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
169 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
170
171 // Non-volatile stores.
172 class NonvolatileStore<SDPatternOperator store>
173   : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
174   StoreSDNode *Store = cast<StoreSDNode>(N);
175   return !Store->isVolatile();
176 }]>;
177 def nonvolatile_store         : NonvolatileStore<store>;
178 def nonvolatile_truncstorei8  : NonvolatileStore<truncstorei8>;
179 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
180 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
181
182 // Insertions.
183 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
184                        (or (and node:$src1, -256), node:$src2)>;
185 def insertll : PatFrag<(ops node:$src1, node:$src2),
186                        (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
187 def insertlh : PatFrag<(ops node:$src1, node:$src2),
188                        (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
189 def inserthl : PatFrag<(ops node:$src1, node:$src2),
190                        (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
191 def inserthh : PatFrag<(ops node:$src1, node:$src2),
192                        (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
193 def insertlf : PatFrag<(ops node:$src1, node:$src2),
194                        (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
195 def inserthf : PatFrag<(ops node:$src1, node:$src2),
196                        (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
197
198 // ORs that can be treated as insertions.
199 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
200                              (or node:$src1, node:$src2), [{
201   unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
202   return CurDAG->MaskedValueIsZero(N->getOperand(0),
203                                    APInt::getLowBitsSet(BitWidth, 8));
204 }]>;
205
206 // ORs that can be treated as reversed insertions.
207 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
208                                 (or node:$src1, node:$src2), [{
209   unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
210   return CurDAG->MaskedValueIsZero(N->getOperand(1),
211                                    APInt::getLowBitsSet(BitWidth, 8));
212 }]>;
213
214 // Fused multiply-add and multiply-subtract, but with the order of the
215 // operands matching SystemZ's MA and MS instructions.
216 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
217                     (fma node:$src2, node:$src3, node:$src1)>;
218 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
219                     (fma node:$src2, node:$src3, (fneg node:$src1))>;
220
221 // Floating-point negative absolute.
222 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
223
224 // Create a unary operator that loads from memory and then performs
225 // the given operation on it.
226 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
227   : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
228
229 // Create a store operator that performs the given unary operation
230 // on the value before storing it.
231 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
232   : PatFrag<(ops node:$value, node:$addr),
233             (store (operator node:$value), node:$addr)>;