1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZICmp : SDTypeProfile<0, 3,
21 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
24 SDTCisVT<2, OtherVT>]>;
25 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
30 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
33 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
38 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
41 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
42 [SDTCisVT<0, untyped>,
45 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
46 [SDTCisVT<0, untyped>,
49 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
56 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
64 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
68 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
73 def SDT_ZString : SDTypeProfile<1, 3,
78 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
79 def SDT_ZPrefetch : SDTypeProfile<0, 2,
82 def SDT_ZTBegin : SDTypeProfile<0, 2,
85 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3,
89 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2,
92 def SDT_ZReplicate : SDTypeProfile<1, 1,
94 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1,
97 def SDT_ZVecBinary : SDTypeProfile<1, 2,
100 SDTCisSameAs<0, 2>]>;
101 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2,
105 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2,
108 SDTCisSameAs<1, 2>]>;
109 def SDT_ZRotateMask : SDTypeProfile<1, 2,
113 def SDT_ZJoinDwords : SDTypeProfile<1, 2,
117 def SDT_ZVecTernary : SDTypeProfile<1, 3,
121 SDTCisSameAs<0, 3>]>;
122 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3,
128 //===----------------------------------------------------------------------===//
130 //===----------------------------------------------------------------------===//
132 // These are target-independent nodes, but have target-specific formats.
133 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
134 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
135 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
136 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
138 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
140 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
141 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
142 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
143 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
144 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
146 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
147 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
149 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
150 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
152 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
153 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
155 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
156 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
157 SDT_ZWrapOffset, []>;
158 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
159 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
160 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
161 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp, [SDNPOutGlue]>;
162 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
163 [SDNPHasChain, SDNPInGlue]>;
164 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
166 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
167 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
169 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
170 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
171 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
172 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
173 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
174 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
176 def z_serialize : SDNode<"SystemZISD::SERIALIZE", SDTNone,
177 [SDNPHasChain, SDNPMayStore]>;
179 // Defined because the index is an i32 rather than a pointer.
180 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
181 SDT_ZInsertVectorElt>;
182 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
183 SDT_ZExtractVectorElt>;
184 def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
185 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
186 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
187 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
188 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
189 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
190 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
191 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
192 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS",
194 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
195 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
196 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
197 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
198 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
199 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
200 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR",
202 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR",
204 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR",
206 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
207 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
208 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
209 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
210 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
211 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
212 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
213 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
214 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
216 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
217 : SDNode<"SystemZISD::"##name, profile,
218 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
220 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
221 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
222 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
223 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
224 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
225 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
226 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
227 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
228 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
229 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
230 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
231 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
233 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
234 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
235 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
236 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
237 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
238 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
239 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
240 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
241 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
242 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
243 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
244 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
245 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
246 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
247 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
248 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
249 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
250 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
251 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
252 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
253 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
254 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
255 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
256 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
257 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
258 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
259 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
261 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
262 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
265 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
266 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
268 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
269 [SDNPHasChain, SDNPOutGlue, SDNPMayStore,
271 def z_tend : SDNode<"SystemZISD::TEND", SDTNone,
272 [SDNPHasChain, SDNPOutGlue, SDNPSideEffect]>;
274 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>;
275 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>;
276 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>;
278 //===----------------------------------------------------------------------===//
280 //===----------------------------------------------------------------------===//
282 // Signed and unsigned comparisons.
283 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
284 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
285 return Type != SystemZICMP::UnsignedOnly;
287 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
288 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
289 return Type != SystemZICMP::SignedOnly;
292 // Register- and memory-based TEST UNDER MASK.
293 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>;
294 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
296 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
297 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
298 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
299 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
301 // Match extensions of an i32 to an i64, followed by an in-register sign
302 // extension from a sub-i32 value.
303 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
304 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
306 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
307 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
308 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
309 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
311 // Match extensions of an i32 to an i64, followed by an AND of the low
313 def zext8dbl : PatFrag<(ops node:$src), (zext8 (anyext node:$src))>;
314 def zext16dbl : PatFrag<(ops node:$src), (zext16 (anyext node:$src))>;
316 // Typed floating-point loads.
317 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
318 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
320 // Extending loads in which the extension type can be signed.
321 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
322 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
323 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
325 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
326 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
328 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
329 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
331 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
332 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
335 // Extending loads in which the extension type can be unsigned.
336 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
337 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
338 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
340 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
341 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
343 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
344 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
346 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
347 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
350 // Extending loads in which the extension type doesn't matter.
351 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
352 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
354 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
355 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
357 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
358 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
360 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
361 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
365 class AlignedLoad<SDPatternOperator load>
366 : PatFrag<(ops node:$addr), (load node:$addr), [{
367 auto *Load = cast<LoadSDNode>(N);
368 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
370 def aligned_load : AlignedLoad<load>;
371 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
372 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
373 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
374 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
377 class AlignedStore<SDPatternOperator store>
378 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
379 auto *Store = cast<StoreSDNode>(N);
380 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
382 def aligned_store : AlignedStore<store>;
383 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
384 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
386 // Non-volatile loads. Used for instructions that might access the storage
387 // location multiple times.
388 class NonvolatileLoad<SDPatternOperator load>
389 : PatFrag<(ops node:$addr), (load node:$addr), [{
390 auto *Load = cast<LoadSDNode>(N);
391 return !Load->isVolatile();
393 def nonvolatile_load : NonvolatileLoad<load>;
394 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
395 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
396 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
398 // Non-volatile stores.
399 class NonvolatileStore<SDPatternOperator store>
400 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
401 auto *Store = cast<StoreSDNode>(N);
402 return !Store->isVolatile();
404 def nonvolatile_store : NonvolatileStore<store>;
405 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
406 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
407 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
409 // A store of a load that can be implemented using MVC.
410 def mvc_store : PatFrag<(ops node:$value, node:$addr),
411 (unindexedstore node:$value, node:$addr),
412 [{ return storeLoadCanUseMVC(N); }]>;
414 // Binary read-modify-write operations on memory in which the other
415 // operand is also memory and for which block operations like NC can
416 // be used. There are two patterns for each operator, depending on
417 // which operand contains the "other" load.
418 multiclass block_op<SDPatternOperator operator> {
419 def "1" : PatFrag<(ops node:$value, node:$addr),
420 (unindexedstore (operator node:$value,
421 (unindexedload node:$addr)),
423 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
424 def "2" : PatFrag<(ops node:$value, node:$addr),
425 (unindexedstore (operator (unindexedload node:$addr),
428 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
430 defm block_and : block_op<and>;
431 defm block_or : block_op<or>;
432 defm block_xor : block_op<xor>;
435 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
436 (or (and node:$src1, -256), node:$src2)>;
437 def insertll : PatFrag<(ops node:$src1, node:$src2),
438 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
439 def insertlh : PatFrag<(ops node:$src1, node:$src2),
440 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
441 def inserthl : PatFrag<(ops node:$src1, node:$src2),
442 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
443 def inserthh : PatFrag<(ops node:$src1, node:$src2),
444 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
445 def insertlf : PatFrag<(ops node:$src1, node:$src2),
446 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
447 def inserthf : PatFrag<(ops node:$src1, node:$src2),
448 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
450 // ORs that can be treated as insertions.
451 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
452 (or node:$src1, node:$src2), [{
453 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
454 return CurDAG->MaskedValueIsZero(N->getOperand(0),
455 APInt::getLowBitsSet(BitWidth, 8));
458 // ORs that can be treated as reversed insertions.
459 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
460 (or node:$src1, node:$src2), [{
461 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
462 return CurDAG->MaskedValueIsZero(N->getOperand(1),
463 APInt::getLowBitsSet(BitWidth, 8));
466 // Negative integer absolute.
467 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
469 // Integer absolute, matching the canonical form generated by DAGCombiner.
470 def z_iabs32 : PatFrag<(ops node:$src),
471 (xor (add node:$src, (sra node:$src, (i32 31))),
472 (sra node:$src, (i32 31)))>;
473 def z_iabs64 : PatFrag<(ops node:$src),
474 (xor (add node:$src, (sra node:$src, (i32 63))),
475 (sra node:$src, (i32 63)))>;
476 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
477 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
479 // Integer multiply-and-add
480 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
481 (add (mul node:$src1, node:$src2), node:$src3)>;
483 // Fused multiply-subtract, using the natural operand order.
484 def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
485 (fma node:$src1, node:$src2, (fneg node:$src3))>;
487 // Fused multiply-add and multiply-subtract, but with the order of the
488 // operands matching SystemZ's MA and MS instructions.
489 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
490 (fma node:$src2, node:$src3, node:$src1)>;
491 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
492 (fma node:$src2, node:$src3, (fneg node:$src1))>;
494 // Floating-point negative absolute.
495 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
497 // Create a unary operator that loads from memory and then performs
498 // the given operation on it.
499 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
500 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
502 // Create a store operator that performs the given unary operation
503 // on the value before storing it.
504 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
505 : PatFrag<(ops node:$value, node:$addr),
506 (store (operator node:$value), node:$addr)>;
508 // Vector representation of all-zeros and all-ones.
509 def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>;
510 def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>;
512 // Load a scalar and replicate it in all elements of a vector.
513 class z_replicate_load<ValueType scalartype, SDPatternOperator load>
514 : PatFrag<(ops node:$addr),
515 (z_replicate (scalartype (load node:$addr)))>;
516 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>;
517 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
518 def z_replicate_loadi32 : z_replicate_load<i32, load>;
519 def z_replicate_loadi64 : z_replicate_load<i64, load>;
520 def z_replicate_loadf32 : z_replicate_load<f32, load>;
521 def z_replicate_loadf64 : z_replicate_load<f64, load>;
523 // Load a scalar and insert it into a single element of a vector.
524 class z_vle<ValueType scalartype, SDPatternOperator load>
525 : PatFrag<(ops node:$vec, node:$addr, node:$index),
526 (z_vector_insert node:$vec, (scalartype (load node:$addr)),
528 def z_vlei8 : z_vle<i32, anyextloadi8>;
529 def z_vlei16 : z_vle<i32, anyextloadi16>;
530 def z_vlei32 : z_vle<i32, load>;
531 def z_vlei64 : z_vle<i64, load>;
532 def z_vlef32 : z_vle<f32, load>;
533 def z_vlef64 : z_vle<f64, load>;
535 // Load a scalar and insert it into the low element of the high i64 of a
537 class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
538 : PatFrag<(ops node:$addr),
539 (z_vector_insert (z_vzero),
540 (scalartype (load node:$addr)), (i32 index))>;
541 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>;
542 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
543 def z_vllezi32 : z_vllez<i32, load, 1>;
544 def z_vllezi64 : PatFrag<(ops node:$addr),
545 (z_join_dwords (i64 (load node:$addr)), (i64 0))>;
546 // We use high merges to form a v4f32 from four f32s. Propagating zero
547 // into all elements but index 1 gives this expression.
548 def z_vllezf32 : PatFrag<(ops node:$addr),
555 (v4f32 (scalar_to_vector
556 (f32 (load node:$addr)))))))),
557 (v2i64 (z_vzero))))>;
558 def z_vllezf64 : PatFrag<(ops node:$addr),
560 (scalar_to_vector (f64 (load node:$addr))),
563 // Store one element of a vector.
564 class z_vste<ValueType scalartype, SDPatternOperator store>
565 : PatFrag<(ops node:$vec, node:$addr, node:$index),
566 (store (scalartype (z_vector_extract node:$vec, node:$index)),
568 def z_vstei8 : z_vste<i32, truncstorei8>;
569 def z_vstei16 : z_vste<i32, truncstorei16>;
570 def z_vstei32 : z_vste<i32, store>;
571 def z_vstei64 : z_vste<i64, store>;
572 def z_vstef32 : z_vste<f32, store>;
573 def z_vstef64 : z_vste<f64, store>;
575 // Arithmetic negation on vectors.
576 def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>;
578 // Bitwise negation on vectors.
579 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>;
581 // Signed "integer greater than zero" on vectors.
582 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>;
584 // Signed "integer less than zero" on vectors.
585 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>;
587 // Integer absolute on vectors.
588 class z_viabs<int shift>
589 : PatFrag<(ops node:$src),
590 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))),
591 (z_vsra_by_scalar node:$src, (i32 shift)))>;
592 def z_viabs8 : z_viabs<7>;
593 def z_viabs16 : z_viabs<15>;
594 def z_viabs32 : z_viabs<31>;
595 def z_viabs64 : z_viabs<63>;
597 // Sign-extend the i64 elements of a vector.
598 class z_vse<int shift>
599 : PatFrag<(ops node:$src),
600 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
601 def z_vsei8 : z_vse<56>;
602 def z_vsei16 : z_vse<48>;
603 def z_vsei32 : z_vse<32>;
605 // ...and again with the extensions being done on individual i64 scalars.
606 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
607 : PatFrag<(ops node:$src),
609 (operator (z_vector_extract node:$src, index1)),
610 (operator (z_vector_extract node:$src, index2)))>;
611 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>;
612 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
613 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;