1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
18 def SDT_ZICmp : SDTypeProfile<0, 3,
21 def SDT_ZBRCCMask : SDTypeProfile<0, 3,
24 SDTCisVT<2, OtherVT>]>;
25 def SDT_ZSelectCCMask : SDTypeProfile<1, 4,
30 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
33 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
34 def SDT_ZExtractAccess : SDTypeProfile<1, 1,
37 def SDT_ZGR128Binary32 : SDTypeProfile<1, 2,
38 [SDTCisVT<0, untyped>,
41 def SDT_ZGR128Binary64 : SDTypeProfile<1, 2,
42 [SDTCisVT<0, untyped>,
45 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
52 def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6,
60 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
64 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
69 def SDT_ZString : SDTypeProfile<1, 3,
74 def SDT_ZI32Intrinsic : SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>;
75 def SDT_ZPrefetch : SDTypeProfile<0, 2,
79 //===----------------------------------------------------------------------===//
81 //===----------------------------------------------------------------------===//
83 // These are target-independent nodes, but have target-specific formats.
84 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
85 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
86 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
87 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
90 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
91 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
92 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
93 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
94 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
96 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
97 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
99 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
100 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp, [SDNPOutGlue]>;
101 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
102 def z_tm : SDNode<"SystemZISD::TM", SDT_ZCmp, [SDNPOutGlue]>;
103 def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
104 [SDNPHasChain, SDNPInGlue]>;
105 def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask,
107 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
108 def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS",
110 def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>;
111 def z_sdivrem32 : SDNode<"SystemZISD::SDIVREM32", SDT_ZGR128Binary32>;
112 def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>;
113 def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>;
114 def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>;
116 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
117 : SDNode<"SystemZISD::"##name, profile,
118 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
120 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
121 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
122 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
123 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
124 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
125 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
126 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
127 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
128 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
129 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
130 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
131 def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>;
133 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
134 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
135 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
136 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
137 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
138 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
139 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
140 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
141 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
142 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
143 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
144 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
145 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
146 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
147 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
148 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
149 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
150 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
151 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
152 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
153 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZString,
154 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
155 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
156 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
157 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZString,
158 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
159 def z_ipm : SDNode<"SystemZISD::IPM", SDT_ZI32Intrinsic,
161 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
162 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
165 //===----------------------------------------------------------------------===//
167 //===----------------------------------------------------------------------===//
169 // Signed and unsigned comparisons.
170 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
171 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
172 return Type != SystemZICMP::UnsignedOnly;
174 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{
175 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
176 return Type != SystemZICMP::SignedOnly;
179 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
180 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
181 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
182 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
184 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
185 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
186 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
187 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
189 // Typed floating-point loads.
190 def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>;
191 def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>;
193 // Extending loads in which the extension type doesn't matter.
194 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
195 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
197 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
198 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
200 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
201 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
203 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
204 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
208 class AlignedLoad<SDPatternOperator load>
209 : PatFrag<(ops node:$addr), (load node:$addr), [{
210 LoadSDNode *Load = cast<LoadSDNode>(N);
211 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
213 def aligned_load : AlignedLoad<load>;
214 def aligned_sextloadi16 : AlignedLoad<sextloadi16>;
215 def aligned_sextloadi32 : AlignedLoad<sextloadi32>;
216 def aligned_zextloadi16 : AlignedLoad<zextloadi16>;
217 def aligned_zextloadi32 : AlignedLoad<zextloadi32>;
220 class AlignedStore<SDPatternOperator store>
221 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
222 StoreSDNode *Store = cast<StoreSDNode>(N);
223 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
225 def aligned_store : AlignedStore<store>;
226 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
227 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
229 // Non-volatile loads. Used for instructions that might access the storage
230 // location multiple times.
231 class NonvolatileLoad<SDPatternOperator load>
232 : PatFrag<(ops node:$addr), (load node:$addr), [{
233 LoadSDNode *Load = cast<LoadSDNode>(N);
234 return !Load->isVolatile();
236 def nonvolatile_load : NonvolatileLoad<load>;
237 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
238 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
239 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
241 // Non-volatile stores.
242 class NonvolatileStore<SDPatternOperator store>
243 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
244 StoreSDNode *Store = cast<StoreSDNode>(N);
245 return !Store->isVolatile();
247 def nonvolatile_store : NonvolatileStore<store>;
248 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
249 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
250 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
252 // A store of a load that can be implemented using MVC.
253 def mvc_store : PatFrag<(ops node:$value, node:$addr),
254 (unindexedstore node:$value, node:$addr),
255 [{ return storeLoadCanUseMVC(N); }]>;
257 // Binary read-modify-write operations on memory in which the other
258 // operand is also memory and for which block operations like NC can
259 // be used. There are two patterns for each operator, depending on
260 // which operand contains the "other" load.
261 multiclass block_op<SDPatternOperator operator> {
262 def "1" : PatFrag<(ops node:$value, node:$addr),
263 (unindexedstore (operator node:$value,
264 (unindexedload node:$addr)),
266 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
267 def "2" : PatFrag<(ops node:$value, node:$addr),
268 (unindexedstore (operator (unindexedload node:$addr),
271 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
273 defm block_and : block_op<and>;
274 defm block_or : block_op<or>;
275 defm block_xor : block_op<xor>;
278 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
279 (or (and node:$src1, -256), node:$src2)>;
280 def insertll : PatFrag<(ops node:$src1, node:$src2),
281 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
282 def insertlh : PatFrag<(ops node:$src1, node:$src2),
283 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
284 def inserthl : PatFrag<(ops node:$src1, node:$src2),
285 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
286 def inserthh : PatFrag<(ops node:$src1, node:$src2),
287 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
288 def insertlf : PatFrag<(ops node:$src1, node:$src2),
289 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
290 def inserthf : PatFrag<(ops node:$src1, node:$src2),
291 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
293 // ORs that can be treated as insertions.
294 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
295 (or node:$src1, node:$src2), [{
296 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
297 return CurDAG->MaskedValueIsZero(N->getOperand(0),
298 APInt::getLowBitsSet(BitWidth, 8));
301 // ORs that can be treated as reversed insertions.
302 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
303 (or node:$src1, node:$src2), [{
304 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
305 return CurDAG->MaskedValueIsZero(N->getOperand(1),
306 APInt::getLowBitsSet(BitWidth, 8));
309 // Integer absolute, matching the canonical form generated by DAGCombiner.
310 def z_iabs32 : PatFrag<(ops node:$src),
311 (xor (add node:$src, (sra node:$src, (i32 31))),
312 (sra node:$src, (i32 31)))>;
313 def z_iabs64 : PatFrag<(ops node:$src),
314 (xor (add node:$src, (sra node:$src, (i32 63))),
315 (sra node:$src, (i32 63)))>;
316 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
317 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
319 // Fused multiply-add and multiply-subtract, but with the order of the
320 // operands matching SystemZ's MA and MS instructions.
321 def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
322 (fma node:$src2, node:$src3, node:$src1)>;
323 def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
324 (fma node:$src2, node:$src3, (fneg node:$src1))>;
326 // Floating-point negative absolute.
327 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
329 // Create a unary operator that loads from memory and then performs
330 // the given operation on it.
331 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
332 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
334 // Create a store operator that performs the given unary operation
335 // on the value before storing it.
336 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
337 : PatFrag<(ops node:$value, node:$addr),
338 (store (operator node:$value), node:$addr)>;