1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "SystemZFrameLowering.h"
11 #include "SystemZCallingConv.h"
12 #include "SystemZInstrBuilder.h"
13 #include "SystemZMachineFunctionInfo.h"
14 #include "SystemZTargetMachine.h"
15 #include "llvm/CodeGen/MachineModuleInfo.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/IR/Function.h"
22 // The ABI-defined register save slots, relative to the incoming stack
24 static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
25 { SystemZ::R2D, 0x10 },
26 { SystemZ::R3D, 0x18 },
27 { SystemZ::R4D, 0x20 },
28 { SystemZ::R5D, 0x28 },
29 { SystemZ::R6D, 0x30 },
30 { SystemZ::R7D, 0x38 },
31 { SystemZ::R8D, 0x40 },
32 { SystemZ::R9D, 0x48 },
33 { SystemZ::R10D, 0x50 },
34 { SystemZ::R11D, 0x58 },
35 { SystemZ::R12D, 0x60 },
36 { SystemZ::R13D, 0x68 },
37 { SystemZ::R14D, 0x70 },
38 { SystemZ::R15D, 0x78 },
39 { SystemZ::F0D, 0x80 },
40 { SystemZ::F2D, 0x88 },
41 { SystemZ::F4D, 0x90 },
42 { SystemZ::F6D, 0x98 }
46 SystemZFrameLowering::SystemZFrameLowering(const SystemZTargetMachine &tm,
47 const SystemZSubtarget &sti)
48 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8,
49 -SystemZMC::CallFrameSize, 8),
51 // Create a mapping from register number to save slot offset.
52 RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
53 for (unsigned I = 0, E = array_lengthof(SpillOffsetTable); I != E; ++I)
54 RegSpillOffsets[SpillOffsetTable[I].Reg] = SpillOffsetTable[I].Offset;
57 const TargetFrameLowering::SpillSlot *
58 SystemZFrameLowering::getCalleeSavedSpillSlots(unsigned &NumEntries) const {
59 NumEntries = array_lengthof(SpillOffsetTable);
60 return SpillOffsetTable;
63 void SystemZFrameLowering::
64 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
65 RegScavenger *RS) const {
66 MachineFrameInfo *MFFrame = MF.getFrameInfo();
67 MachineRegisterInfo &MRI = MF.getRegInfo();
68 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
69 bool HasFP = hasFP(MF);
70 SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>();
71 bool IsVarArg = MF.getFunction()->isVarArg();
73 // va_start stores incoming FPR varargs in the normal way, but delegates
74 // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
75 // Record these pending uses, which typically include the call-saved
76 // argument register R6D.
78 for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
79 MRI.setPhysRegUsed(SystemZ::ArgGPRs[I]);
81 // If the function requires a frame pointer, record that the hard
82 // frame pointer will be clobbered.
84 MRI.setPhysRegUsed(SystemZ::R11D);
86 // If the function calls other functions, record that the return
87 // address register will be clobbered.
88 if (MFFrame->hasCalls())
89 MRI.setPhysRegUsed(SystemZ::R14D);
91 // If we are saving GPRs other than the stack pointer, we might as well
92 // save and restore the stack pointer at the same time, via STMG and LMG.
93 // This allows the deallocation to be done by the LMG, rather than needing
94 // a separate %r15 addition.
95 const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
96 for (unsigned I = 0; CSRegs[I]; ++I) {
97 unsigned Reg = CSRegs[I];
98 if (SystemZ::GR64BitRegClass.contains(Reg) && MRI.isPhysRegUsed(Reg)) {
99 MRI.setPhysRegUsed(SystemZ::R15D);
105 // Add GPR64 to the save instruction being built by MIB, which is in basic
106 // block MBB. IsImplicit says whether this is an explicit operand to the
107 // instruction, or an implicit one that comes between the explicit start
108 // and end registers.
109 static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB,
110 const SystemZTargetMachine &TM,
111 unsigned GPR64, bool IsImplicit) {
112 const SystemZRegisterInfo *RI = TM.getRegisterInfo();
113 unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_32bit);
114 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
115 if (!IsLive || !IsImplicit) {
116 MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
118 MBB.addLiveIn(GPR64);
122 bool SystemZFrameLowering::
123 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
124 MachineBasicBlock::iterator MBBI,
125 const std::vector<CalleeSavedInfo> &CSI,
126 const TargetRegisterInfo *TRI) const {
130 MachineFunction &MF = *MBB.getParent();
131 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
132 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
133 bool IsVarArg = MF.getFunction()->isVarArg();
134 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
136 // Scan the call-saved GPRs and find the bounds of the register spill area.
138 unsigned HighGPR = SystemZ::R15D;
139 unsigned StartOffset = -1U;
140 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
141 unsigned Reg = CSI[I].getReg();
142 if (SystemZ::GR64BitRegClass.contains(Reg)) {
143 unsigned Offset = RegSpillOffsets[Reg];
144 assert(Offset && "Unexpected GPR save");
145 if (StartOffset > Offset) {
147 StartOffset = Offset;
152 // Save the range of call-saved registers, for use by the epilogue inserter.
153 ZFI->setLowSavedGPR(LowGPR);
154 ZFI->setHighSavedGPR(HighGPR);
156 // Include the GPR varargs, if any. R6D is call-saved, so would
157 // be included by the loop above, but we also need to handle the
158 // call-clobbered argument registers.
160 unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
161 if (FirstGPR < SystemZ::NumArgGPRs) {
162 unsigned Reg = SystemZ::ArgGPRs[FirstGPR];
163 unsigned Offset = RegSpillOffsets[Reg];
164 if (StartOffset > Offset) {
165 LowGPR = Reg; StartOffset = Offset;
172 assert(LowGPR != HighGPR && "Should be saving %r15 and something else");
174 // Build an STMG instruction.
175 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
177 // Add the explicit register operands.
178 addSavedGPR(MBB, MIB, TM, LowGPR, false);
179 addSavedGPR(MBB, MIB, TM, HighGPR, false);
182 MIB.addReg(SystemZ::R15D).addImm(StartOffset);
184 // Make sure all call-saved GPRs are included as operands and are
185 // marked as live on entry.
186 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
187 unsigned Reg = CSI[I].getReg();
188 if (SystemZ::GR64BitRegClass.contains(Reg))
189 addSavedGPR(MBB, MIB, TM, Reg, true);
192 // ...likewise GPR varargs.
194 for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
195 addSavedGPR(MBB, MIB, TM, SystemZ::ArgGPRs[I], true);
198 // Save FPRs in the normal TargetInstrInfo way.
199 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
200 unsigned Reg = CSI[I].getReg();
201 if (SystemZ::FP64BitRegClass.contains(Reg)) {
203 TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
204 &SystemZ::FP64BitRegClass, TRI);
211 bool SystemZFrameLowering::
212 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
213 MachineBasicBlock::iterator MBBI,
214 const std::vector<CalleeSavedInfo> &CSI,
215 const TargetRegisterInfo *TRI) const {
219 MachineFunction &MF = *MBB.getParent();
220 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
221 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
222 bool HasFP = hasFP(MF);
223 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
225 // Restore FPRs in the normal TargetInstrInfo way.
226 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
227 unsigned Reg = CSI[I].getReg();
228 if (SystemZ::FP64BitRegClass.contains(Reg))
229 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
230 &SystemZ::FP64BitRegClass, TRI);
233 // Restore call-saved GPRs (but not call-clobbered varargs, which at
234 // this point might hold return values).
235 unsigned LowGPR = ZFI->getLowSavedGPR();
236 unsigned HighGPR = ZFI->getHighSavedGPR();
237 unsigned StartOffset = RegSpillOffsets[LowGPR];
239 // If we saved any of %r2-%r5 as varargs, we should also be saving
240 // and restoring %r6. If we're saving %r6 or above, we should be
242 assert(LowGPR != HighGPR && "Should be loading %r15 and something else");
244 // Build an LMG instruction.
245 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
247 // Add the explicit register operands.
248 MIB.addReg(LowGPR, RegState::Define);
249 MIB.addReg(HighGPR, RegState::Define);
252 MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
253 MIB.addImm(StartOffset);
255 // Do a second scan adding regs as being defined by instruction
256 for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
257 unsigned Reg = CSI[I].getReg();
258 if (Reg != LowGPR && Reg != HighGPR)
259 MIB.addReg(Reg, RegState::ImplicitDefine);
266 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
267 static void emitIncrement(MachineBasicBlock &MBB,
268 MachineBasicBlock::iterator &MBBI,
270 unsigned Reg, int64_t NumBytes,
271 const TargetInstrInfo *TII) {
274 int64_t ThisVal = NumBytes;
275 if (isInt<16>(NumBytes))
276 Opcode = SystemZ::AGHI;
278 Opcode = SystemZ::AGFI;
279 // Make sure we maintain 8-byte stack alignment.
280 int64_t MinVal = -int64_t(1) << 31;
281 int64_t MaxVal = (int64_t(1) << 31) - 8;
282 if (ThisVal < MinVal)
284 else if (ThisVal > MaxVal)
287 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
288 .addReg(Reg).addImm(ThisVal);
289 // The CC implicit def is dead.
290 MI->getOperand(3).setIsDead();
295 void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
296 MachineBasicBlock &MBB = MF.front();
297 MachineFrameInfo *MFFrame = MF.getFrameInfo();
298 const SystemZInstrInfo *ZII =
299 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
300 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
301 MachineBasicBlock::iterator MBBI = MBB.begin();
302 MachineModuleInfo &MMI = MF.getMMI();
303 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
304 const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
305 bool HasFP = hasFP(MF);
306 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
308 // The current offset of the stack pointer from the CFA.
309 int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
311 if (ZFI->getLowSavedGPR()) {
312 // Skip over the GPR saves.
313 if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
316 llvm_unreachable("Couldn't skip over GPR saves");
318 // Add CFI for the GPR saves.
319 MCSymbol *GPRSaveLabel = MMI.getContext().CreateTempSymbol();
320 BuildMI(MBB, MBBI, DL,
321 ZII->get(TargetOpcode::PROLOG_LABEL)).addSym(GPRSaveLabel);
322 for (std::vector<CalleeSavedInfo>::const_iterator
323 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
324 unsigned Reg = I->getReg();
325 if (SystemZ::GR64BitRegClass.contains(Reg)) {
326 int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
327 MMI.addFrameInst(MCCFIInstruction::createOffset(
328 GPRSaveLabel, MRI->getDwarfRegNum(Reg, true), Offset));
333 uint64_t StackSize = getAllocatedStackSize(MF);
335 // Allocate StackSize bytes.
336 int64_t Delta = -int64_t(StackSize);
337 emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
339 // Add CFI for the allocation.
340 MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
341 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
342 .addSym(AdjustSPLabel);
343 MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
344 AdjustSPLabel, SPOffsetFromCFA + Delta));
345 SPOffsetFromCFA += Delta;
349 // Copy the base of the frame to R11.
350 BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
351 .addReg(SystemZ::R15D);
353 // Add CFI for the new frame location.
354 MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
355 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
357 unsigned HardFP = MRI->getDwarfRegNum(SystemZ::R11D, true);
359 MCCFIInstruction::createDefCfaRegister(SetFPLabel, HardFP));
361 // Mark the FramePtr as live at the beginning of every block except
362 // the entry block. (We'll have marked R11 as live on entry when
364 for (MachineFunction::iterator
365 I = llvm::next(MF.begin()), E = MF.end(); I != E; ++I)
366 I->addLiveIn(SystemZ::R11D);
369 // Skip over the FPR saves.
370 MCSymbol *FPRSaveLabel = 0;
371 for (std::vector<CalleeSavedInfo>::const_iterator
372 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
373 unsigned Reg = I->getReg();
374 if (SystemZ::FP64BitRegClass.contains(Reg)) {
375 if (MBBI != MBB.end() &&
376 (MBBI->getOpcode() == SystemZ::STD ||
377 MBBI->getOpcode() == SystemZ::STDY))
380 llvm_unreachable("Couldn't skip over FPR save");
382 // Add CFI for the this save.
384 FPRSaveLabel = MMI.getContext().CreateTempSymbol();
385 unsigned Reg = MRI->getDwarfRegNum(I->getReg(), true);
386 int64_t Offset = getFrameIndexOffset(MF, I->getFrameIdx());
387 MMI.addFrameInst(MCCFIInstruction::createOffset(
388 FPRSaveLabel, Reg, SPOffsetFromCFA + Offset));
391 // Complete the CFI for the FPR saves, modelling them as taking effect
392 // after the last save.
394 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
395 .addSym(FPRSaveLabel);
398 void SystemZFrameLowering::emitEpilogue(MachineFunction &MF,
399 MachineBasicBlock &MBB) const {
400 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
401 const SystemZInstrInfo *ZII =
402 static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
403 SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
405 // Skip the return instruction.
406 assert(MBBI->getOpcode() == SystemZ::RET &&
407 "Can only insert epilogue into returning blocks");
409 uint64_t StackSize = getAllocatedStackSize(MF);
410 if (ZFI->getLowSavedGPR()) {
412 unsigned Opcode = MBBI->getOpcode();
413 if (Opcode != SystemZ::LMG)
414 llvm_unreachable("Expected to see callee-save register restore code");
416 unsigned AddrOpNo = 2;
417 DebugLoc DL = MBBI->getDebugLoc();
418 uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
419 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
421 // If the offset is too large, use the largest stack-aligned offset
422 // and add the rest to the base register (the stack or frame pointer).
424 uint64_t NumBytes = Offset - 0x7fff8;
425 emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
428 NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
429 assert(NewOpcode && "No restore instruction available");
432 MBBI->setDesc(ZII->get(NewOpcode));
433 MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
434 } else if (StackSize) {
435 DebugLoc DL = MBBI->getDebugLoc();
436 emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
440 bool SystemZFrameLowering::hasFP(const MachineFunction &MF) const {
441 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
442 MF.getFrameInfo()->hasVarSizedObjects() ||
443 MF.getInfo<SystemZMachineFunctionInfo>()->getManipulatesSP());
446 int SystemZFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
448 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
450 // Start with the offset of FI from the top of the caller-allocated frame
451 // (i.e. the top of the 160 bytes allocated by the caller). This initial
452 // offset is therefore negative.
453 int64_t Offset = (MFFrame->getObjectOffset(FI) +
454 MFFrame->getOffsetAdjustment());
456 // Make the offset relative to the incoming stack pointer.
457 Offset -= getOffsetOfLocalArea();
459 // Make the offset relative to the bottom of the frame.
460 Offset += getAllocatedStackSize(MF);
465 uint64_t SystemZFrameLowering::
466 getAllocatedStackSize(const MachineFunction &MF) const {
467 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
469 // Start with the size of the local variables and spill slots.
470 uint64_t StackSize = MFFrame->getStackSize();
472 // Include space for an emergency spill slot, if one might be needed.
473 StackSize += getEmergencySpillSlotSize(MF);
475 // We need to allocate the ABI-defined 160-byte base area whenever
476 // we allocate stack space for our own use and whenever we call another
478 if (StackSize || MFFrame->hasVarSizedObjects() || MFFrame->hasCalls())
479 StackSize += SystemZMC::CallFrameSize;
484 unsigned SystemZFrameLowering::
485 getEmergencySpillSlotSize(const MachineFunction &MF) const {
486 const MachineFrameInfo *MFFrame = MF.getFrameInfo();
487 uint64_t MaxReach = MFFrame->getStackSize() + SystemZMC::CallFrameSize * 2;
488 return isUInt<12>(MaxReach) ? 0 : 8;
491 unsigned SystemZFrameLowering::
492 getEmergencySpillSlotOffset(const MachineFunction &MF) const {
493 assert(getEmergencySpillSlotSize(MF) && "No emergency spill slot");
494 return SystemZMC::CallFrameSize;
498 SystemZFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
499 // The ABI requires us to allocate 160 bytes of stack space for the callee,
500 // with any outgoing stack arguments being placed above that. It seems
501 // better to make that area a permanent feature of the frame even if
502 // we're using a frame pointer.
506 void SystemZFrameLowering::
507 eliminateCallFramePseudoInstr(MachineFunction &MF,
508 MachineBasicBlock &MBB,
509 MachineBasicBlock::iterator MI) const {
510 switch (MI->getOpcode()) {
511 case SystemZ::ADJCALLSTACKDOWN:
512 case SystemZ::ADJCALLSTACKUP:
513 assert(hasReservedCallFrame(MF) &&
514 "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
519 llvm_unreachable("Unexpected call frame instruction");