1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Streams SystemZ assembly language and associated data, in the form of
11 // MCInsts and MCExprs respectively.
13 //===----------------------------------------------------------------------===//
15 #include "SystemZAsmPrinter.h"
16 #include "InstPrinter/SystemZInstPrinter.h"
17 #include "SystemZConstantPoolValue.h"
18 #include "SystemZMCInstLower.h"
19 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
20 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
21 #include "llvm/IR/Mangler.h"
22 #include "llvm/MC/MCExpr.h"
23 #include "llvm/MC/MCInstBuilder.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/Support/TargetRegistry.h"
29 // Return an RI instruction like MI with opcode Opcode, but with the
30 // GR64 register operands turned into GR32s.
31 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) {
33 return MCInstBuilder(Opcode)
34 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
35 .addImm(MI->getOperand(1).getImm());
37 return MCInstBuilder(Opcode)
38 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
39 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))
40 .addImm(MI->getOperand(2).getImm());
43 // Return an RI instruction like MI with opcode Opcode, but with the
44 // GR64 register operands turned into GRH32s.
45 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) {
47 return MCInstBuilder(Opcode)
48 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
49 .addImm(MI->getOperand(1).getImm());
51 return MCInstBuilder(Opcode)
52 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
53 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))
54 .addImm(MI->getOperand(2).getImm());
57 // Return an RI instruction like MI with opcode Opcode, but with the
58 // R2 register turned into a GR64.
59 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) {
60 return MCInstBuilder(Opcode)
61 .addReg(MI->getOperand(0).getReg())
62 .addReg(MI->getOperand(1).getReg())
63 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()))
64 .addImm(MI->getOperand(3).getImm())
65 .addImm(MI->getOperand(4).getImm())
66 .addImm(MI->getOperand(5).getImm());
69 static const MCSymbolRefExpr *getTLSGetOffset(MCContext &Context) {
70 StringRef Name = "__tls_get_offset";
71 return MCSymbolRefExpr::Create(Context.GetOrCreateSymbol(Name),
72 MCSymbolRefExpr::VK_PLT,
76 static const MCSymbolRefExpr *getGlobalOffsetTable(MCContext &Context) {
77 StringRef Name = "_GLOBAL_OFFSET_TABLE_";
78 return MCSymbolRefExpr::Create(Context.GetOrCreateSymbol(Name),
79 MCSymbolRefExpr::VK_None,
83 void SystemZAsmPrinter::EmitInstruction(const MachineInstr *MI) {
84 SystemZMCInstLower Lower(MF->getContext(), *this);
86 switch (MI->getOpcode()) {
88 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D);
91 case SystemZ::CallBRASL:
92 LoweredMI = MCInstBuilder(SystemZ::BRASL)
93 .addReg(SystemZ::R14D)
94 .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
97 case SystemZ::CallBASR:
98 LoweredMI = MCInstBuilder(SystemZ::BASR)
99 .addReg(SystemZ::R14D)
100 .addReg(MI->getOperand(0).getReg());
103 case SystemZ::CallJG:
104 LoweredMI = MCInstBuilder(SystemZ::JG)
105 .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
108 case SystemZ::CallBR:
109 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R1D);
112 case SystemZ::TLS_GDCALL:
113 LoweredMI = MCInstBuilder(SystemZ::BRASL)
114 .addReg(SystemZ::R14D)
115 .addExpr(getTLSGetOffset(MF->getContext()))
116 .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSGD));
119 case SystemZ::TLS_LDCALL:
120 LoweredMI = MCInstBuilder(SystemZ::BRASL)
121 .addReg(SystemZ::R14D)
122 .addExpr(getTLSGetOffset(MF->getContext()))
123 .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSLDM));
127 LoweredMI = MCInstBuilder(SystemZ::LARL)
128 .addReg(MI->getOperand(0).getReg())
129 .addExpr(getGlobalOffsetTable(MF->getContext()));
132 case SystemZ::IILF64:
133 LoweredMI = MCInstBuilder(SystemZ::IILF)
134 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
135 .addImm(MI->getOperand(2).getImm());
138 case SystemZ::IIHF64:
139 LoweredMI = MCInstBuilder(SystemZ::IIHF)
140 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
141 .addImm(MI->getOperand(2).getImm());
144 case SystemZ::RISBHH:
145 case SystemZ::RISBHL:
146 LoweredMI = lowerRIEfLow(MI, SystemZ::RISBHG);
149 case SystemZ::RISBLH:
150 case SystemZ::RISBLL:
151 LoweredMI = lowerRIEfLow(MI, SystemZ::RISBLG);
154 case SystemZ::VLVGP32:
155 LoweredMI = MCInstBuilder(SystemZ::VLVGP)
156 .addReg(MI->getOperand(0).getReg())
157 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg()))
158 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()));
161 #define LOWER_LOW(NAME) \
162 case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
178 #define LOWER_HIGH(NAME) \
179 case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break
195 case SystemZ::Serialize:
196 if (MF->getSubtarget<SystemZSubtarget>().hasFastSerialization())
197 LoweredMI = MCInstBuilder(SystemZ::AsmBCR)
198 .addImm(14).addReg(SystemZ::R0D);
200 LoweredMI = MCInstBuilder(SystemZ::AsmBCR)
201 .addImm(15).addReg(SystemZ::R0D);
205 Lower.lower(MI, LoweredMI);
208 EmitToStreamer(*OutStreamer, LoweredMI);
211 // Convert a SystemZ-specific constant pool modifier into the associated
212 // MCSymbolRefExpr variant kind.
213 static MCSymbolRefExpr::VariantKind
214 getModifierVariantKind(SystemZCP::SystemZCPModifier Modifier) {
216 case SystemZCP::TLSGD: return MCSymbolRefExpr::VK_TLSGD;
217 case SystemZCP::TLSLDM: return MCSymbolRefExpr::VK_TLSLDM;
218 case SystemZCP::DTPOFF: return MCSymbolRefExpr::VK_DTPOFF;
219 case SystemZCP::NTPOFF: return MCSymbolRefExpr::VK_NTPOFF;
221 llvm_unreachable("Invalid SystemCPModifier!");
224 void SystemZAsmPrinter::
225 EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
226 auto *ZCPV = static_cast<SystemZConstantPoolValue*>(MCPV);
229 MCSymbolRefExpr::Create(getSymbol(ZCPV->getGlobalValue()),
230 getModifierVariantKind(ZCPV->getModifier()),
232 uint64_t Size = TM.getDataLayout()->getTypeAllocSize(ZCPV->getType());
234 OutStreamer->EmitValue(Expr, Size);
237 bool SystemZAsmPrinter::PrintAsmOperand(const MachineInstr *MI,
240 const char *ExtraCode,
242 if (ExtraCode && *ExtraCode == 'n') {
243 if (!MI->getOperand(OpNo).isImm())
245 OS << -int64_t(MI->getOperand(OpNo).getImm());
247 SystemZMCInstLower Lower(MF->getContext(), *this);
248 MCOperand MO(Lower.lowerOperand(MI->getOperand(OpNo)));
249 SystemZInstPrinter::printOperand(MO, OS);
254 bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
257 const char *ExtraCode,
259 SystemZInstPrinter::printAddress(MI->getOperand(OpNo).getReg(),
260 MI->getOperand(OpNo + 1).getImm(),
261 MI->getOperand(OpNo + 2).getReg(), OS);
265 // Force static initialization.
266 extern "C" void LLVMInitializeSystemZAsmPrinter() {
267 RegisterAsmPrinter<SystemZAsmPrinter> X(TheSystemZTarget);