1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "MappingInfo.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Assembly/PrintModulePass.h"
13 #include "llvm/Transforms/Scalar.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFunctionInfo.h"
16 #include "llvm/CodeGen/InstrSelection.h"
17 #include "llvm/CodeGen/InstrScheduling.h"
18 #include "llvm/CodeGen/MachineCodeForInstruction.h"
19 #include "llvm/Target/TargetMachineImpls.h"
20 #include "Support/CommandLine.h"
22 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
23 // Build the MachineInstruction Description Array...
24 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
25 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
26 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
27 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
28 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
29 ImplicitRegUseList, ImplicitRegUseList },
30 #include "SparcInstr.def"
33 //---------------------------------------------------------------------------
34 // Command line options to control choice of code generation passes.
35 //---------------------------------------------------------------------------
37 static cl::opt<bool> DisablePreOpt("disable-preopt",
38 cl::desc("Disable optimizations prior to instruction selection"));
40 static cl::opt<bool> DisableSched("disable-sched",
41 cl::desc("Disable local scheduling pass"));
43 static cl::opt<bool> DisablePeephole("disable-peephole",
44 cl::desc("Disable peephole optimization pass"));
46 static cl::opt<bool> EmitMappingInfo("enable-maps",
47 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
49 static cl::opt<bool> DisableStrip("disable-strip",
50 cl::desc("Do not strip the LLVM bytecode included in executable"));
52 static cl::opt<bool> DumpInput("dump-input",
53 cl::desc("Print bytecode before native code generation"),
56 //----------------------------------------------------------------------------
57 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
58 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
59 //----------------------------------------------------------------------------
61 TargetMachine *allocateSparcTargetMachine(const Module &M) {
62 return new UltraSparc();
65 //---------------------------------------------------------------------------
66 // class UltraSparcFrameInfo
68 // Interface to stack frame layout info for the UltraSPARC.
69 // Starting offsets for each area of the stack frame are aligned at
70 // a multiple of getStackFrameSizeAlignment().
71 //---------------------------------------------------------------------------
74 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
77 pos = false; // static stack area grows downwards
78 return StaticAreaOffsetFromFP;
82 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
85 // ensure no more auto vars are added
86 mcInfo.getInfo()->freezeAutomaticVarsArea();
88 pos = false; // static stack area grows downwards
89 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
90 return StaticAreaOffsetFromFP - autoVarsSize;
94 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
97 MachineFunctionInfo *MFI = mcInfo.getInfo();
98 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
99 MFI->freezeSpillsArea(); // ensure no more spill slots are added
101 pos = false; // static stack area grows downwards
102 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
103 unsigned spillAreaSize = MFI->getRegSpillsSize();
104 int offset = autoVarsSize + spillAreaSize;
105 return StaticAreaOffsetFromFP - offset;
109 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
112 // Dynamic stack area grows downwards starting at top of opt-args area.
113 // The opt-args, required-args, and register-save areas are empty except
114 // during calls and traps, so they are shifted downwards on each
115 // dynamic-size alloca.
117 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
118 if (int extra = optArgsSize % getStackFrameSizeAlignment())
119 optArgsSize += (getStackFrameSizeAlignment() - extra);
120 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
121 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
125 //---------------------------------------------------------------------------
126 // class UltraSparcMachine
129 // Primary interface to machine description for the UltraSPARC.
130 // Primarily just initializes machine-dependent parameters in
131 // class TargetMachine, and creates machine-dependent subclasses
132 // for classes such as TargetInstrInfo.
134 //---------------------------------------------------------------------------
136 UltraSparc::UltraSparc()
137 : TargetMachine("UltraSparc-Native", false),
145 // addPassesToEmitAssembly - This method controls the entire code generation
146 // process for the ultra sparc.
148 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
150 // The following 3 passes used to be inserted specially by llc.
151 // Replace malloc and free instructions with library calls.
152 PM.add(createLowerAllocationsPass());
154 // Strip all of the symbols from the bytecode so that it will be smaller...
156 PM.add(createSymbolStrippingPass());
158 // FIXME: implement the switch instruction in the instruction selector.
159 PM.add(createLowerSwitchPass());
161 // decompose multi-dimensional array references into single-dim refs
162 PM.add(createDecomposeMultiDimRefsPass());
164 // Construct and initialize the MachineFunction object for this fn.
165 PM.add(createMachineCodeConstructionPass(*this));
167 //Insert empty stackslots in the stack frame of each function
168 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
169 PM.add(createStackSlotsPass(*this));
171 if (!DisablePreOpt) {
172 // Specialize LLVM code for this target machine
173 PM.add(createPreSelectionPass(*this));
174 // Run basic dataflow optimizations on LLVM code
175 PM.add(createReassociatePass());
176 PM.add(createLICMPass());
177 PM.add(createGCSEPass());
180 // If LLVM dumping after transformations is requested, add it to the pipeline
182 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
185 PM.add(createInstructionSelectionPass(*this));
188 PM.add(createInstructionSchedulingWithSSAPass(*this));
190 PM.add(getRegisterAllocator(*this));
192 PM.add(getPrologEpilogInsertionPass());
194 if (!DisablePeephole)
195 PM.add(createPeepholeOptsPass(*this));
198 PM.add(getMappingInfoAsmPrinterPass(Out));
200 // Output assembly language to the .s file. Assembly emission is split into
201 // two parts: Function output and Global value output. This is because
202 // function output is pipelined with all of the rest of code generation stuff,
203 // allowing machine code representations for functions to be free'd after the
204 // function has been emitted.
206 PM.add(getFunctionAsmPrinterPass(Out));
207 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
209 // Emit Module level assembly after all of the functions have been processed.
210 PM.add(getModuleAsmPrinterPass(Out));
212 // Emit bytecode to the assembly file into its special section next
214 PM.add(getBytecodeAsmPrinterPass(Out));
219 // addPassesToJITCompile - This method controls the JIT method of code
220 // generation for the UltraSparc.
222 bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
223 const TargetData &TD = getTargetData();
225 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
226 TD.getPointerAlignment(), TD.getDoubleAlignment()));
228 // Replace malloc and free instructions with library calls.
229 // Do this after tracing until lli implements these lib calls.
230 // For now, it will emulate malloc and free internally.
231 PM.add(createLowerAllocationsPass());
233 // FIXME: implement the switch instruction in the instruction selector.
234 PM.add(createLowerSwitchPass());
236 // decompose multi-dimensional array references into single-dim refs
237 PM.add(createDecomposeMultiDimRefsPass());
239 // Construct and initialize the MachineFunction object for this fn.
240 PM.add(createMachineCodeConstructionPass(*this));
242 PM.add(createInstructionSelectionPass(*this));
244 // new pass: convert Value* in MachineOperand to an unsigned register
245 // this brings it in line with what the X86 JIT's RegisterAllocator expects
246 //PM.add(createAddRegNumToValuesPass());
248 PM.add(getRegisterAllocator(*this));
249 PM.add(getPrologEpilogInsertionPass());
251 if (!DisablePeephole)
252 PM.add(createPeepholeOptsPass(*this));
254 return false; // success!