1 //===-- SparcV9TargetMachine.cpp - SparcV9 Target Machine Implementation --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Primary interface to machine description for the UltraSPARC. Primarily just
11 // initializes machine-dependent parameters in class TargetMachine, and creates
12 // machine-dependent subclasses for classes such as TargetInstrInfo.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Function.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Assembly/PrintModulePass.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/IntrinsicLowering.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetMachineRegistry.h"
25 #include "llvm/Transforms/Scalar.h"
26 #include "MappingInfo.h"
27 #include "MachineFunctionInfo.h"
28 #include "MachineCodeForInstruction.h"
29 #include "SparcV9Internals.h"
30 #include "SparcV9TargetMachine.h"
31 #include "SparcV9BurgISel.h"
32 #include "llvm/Support/CommandLine.h"
35 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
36 // Build the MachineInstruction Description Array...
37 const TargetInstrDescriptor llvm::SparcV9MachineInstrDesc[] = {
38 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
39 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
40 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
41 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
42 ImplicitRegUseList, ImplicitRegUseList },
43 #include "SparcV9Instr.def"
46 //---------------------------------------------------------------------------
47 // Command line options to control choice of code generation passes.
48 //---------------------------------------------------------------------------
51 bool EmitMappingInfo = false;
55 cl::opt<bool> DisableSched("disable-sched",
56 cl::desc("Disable local scheduling pass"));
58 cl::opt<bool> DisablePeephole("disable-peephole",
59 cl::desc("Disable peephole optimization pass"));
61 cl::opt<bool, true> EmitMappingInfoOpt("enable-maps",
62 cl::location(EmitMappingInfo),
64 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
66 cl::opt<bool> DisableStrip("disable-strip",
67 cl::desc("Do not strip the LLVM bytecode in executable"));
69 // Register the target.
70 RegisterTarget<SparcV9TargetMachine> X("sparcv9", " SPARC V9");
73 unsigned SparcV9TargetMachine::getJITMatchQuality() {
74 #if defined(__sparcv9)
81 unsigned SparcV9TargetMachine::getModuleMatchQuality(const Module &M) {
82 if (M.getEndianness() == Module::BigEndian &&
83 M.getPointerSize() == Module::Pointer64)
84 return 10; // Direct match
85 else if (M.getEndianness() != Module::AnyEndianness ||
86 M.getPointerSize() != Module::AnyPointerSize)
87 return 0; // Match for some other target
89 return getJITMatchQuality()/2;
92 //===---------------------------------------------------------------------===//
93 // Code generation/destruction passes
94 //===---------------------------------------------------------------------===//
97 class ConstructMachineFunction : public FunctionPass {
98 TargetMachine &Target;
100 ConstructMachineFunction(TargetMachine &T) : Target(T) {}
102 const char *getPassName() const {
103 return "ConstructMachineFunction";
106 bool runOnFunction(Function &F) {
107 MachineFunction::construct(&F, Target).getInfo<SparcV9FunctionInfo>()->CalculateArgSize();
112 struct DestroyMachineFunction : public FunctionPass {
113 const char *getPassName() const { return "DestroyMachineFunction"; }
115 static void freeMachineCode(Instruction &I) {
116 MachineCodeForInstruction::destroy(&I);
119 bool runOnFunction(Function &F) {
120 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
121 for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
122 MachineCodeForInstruction::get(I).dropAllReferences();
124 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
125 for_each(FI->begin(), FI->end(), freeMachineCode);
127 MachineFunction::destruct(&F);
132 FunctionPass *createMachineCodeConstructionPass(TargetMachine &Target) {
133 return new ConstructMachineFunction(Target);
137 FunctionPass *llvm::createSparcV9MachineCodeDestructionPass() {
138 return new DestroyMachineFunction();
142 SparcV9TargetMachine::SparcV9TargetMachine(const Module &M,
143 IntrinsicLowering *il)
144 : TargetMachine("UltraSparcV9-Native", il, false),
151 /// addPassesToEmitAssembly - This method controls the entire code generation
152 /// process for the ultra sparc.
155 SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
157 // FIXME: Implement efficient support for garbage collection intrinsics.
158 PM.add(createLowerGCPass());
160 // Replace malloc and free instructions with library calls.
161 PM.add(createLowerAllocationsPass());
163 // FIXME: implement the switch instruction in the instruction selector.
164 PM.add(createLowerSwitchPass());
166 // FIXME: implement the invoke/unwind instructions!
167 PM.add(createLowerInvokePass());
169 // decompose multi-dimensional array references into single-dim refs
170 PM.add(createDecomposeMultiDimRefsPass());
172 // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
173 PM.add(createPreSelectionPass(*this));
174 PM.add(createLowerSelectPass());
176 // Run basic LLVM dataflow optimizations, to clean up after pre-selection.
177 PM.add(createReassociatePass());
178 PM.add(createLICMPass());
179 PM.add(createGCSEPass());
181 // If the user's trying to read the generated code, they'll need to see the
182 // transformed input.
183 if (PrintMachineCode)
184 PM.add(new PrintModulePass());
186 // Construct and initialize the MachineFunction object for this fn.
187 PM.add(createMachineCodeConstructionPass(*this));
189 // Insert empty stackslots in the stack frame of each function
190 // so %fp+offset-8 and %fp+offset-16 are empty slots now!
191 PM.add(createStackSlotsPass(*this));
193 PM.add(createSparcV9BurgInstSelector(*this));
196 PM.add(createInstructionSchedulingWithSSAPass(*this));
198 if (PrintMachineCode)
199 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
201 PM.add(getRegisterAllocator(*this));
203 if (PrintMachineCode)
204 PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
206 PM.add(createPrologEpilogInsertionPass());
208 if (!DisablePeephole)
209 PM.add(createPeepholeOptsPass(*this));
211 if (PrintMachineCode)
212 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));
214 if (EmitMappingInfo) {
215 PM.add(createInternalGlobalMapperPass());
216 PM.add(getMappingInfoAsmPrinterPass(Out));
219 // Output assembly language to the .s file. Assembly emission is split into
220 // two parts: Function output and Global value output. This is because
221 // function output is pipelined with all of the rest of code generation stuff,
222 // allowing machine code representations for functions to be free'd after the
223 // function has been emitted.
224 PM.add(createAsmPrinterPass(Out, *this));
226 // Free machine-code IR which is no longer needed:
227 PM.add(createSparcV9MachineCodeDestructionPass());
229 // Emit bytecode to the assembly file into its special section next
230 if (EmitMappingInfo) {
231 // Strip all of the symbols from the bytecode so that it will be smaller...
233 PM.add(createSymbolStrippingPass());
234 PM.add(createBytecodeAsmPrinterPass(Out));
240 /// addPassesToJITCompile - This method controls the JIT method of code
241 /// generation for the UltraSparcV9.
243 void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
244 // FIXME: Implement efficient support for garbage collection intrinsics.
245 PM.add(createLowerGCPass());
247 // Replace malloc and free instructions with library calls.
248 PM.add(createLowerAllocationsPass());
250 // FIXME: implement the switch instruction in the instruction selector.
251 PM.add(createLowerSwitchPass());
253 // FIXME: implement the invoke/unwind instructions!
254 PM.add(createLowerInvokePass());
256 // decompose multi-dimensional array references into single-dim refs
257 PM.add(createDecomposeMultiDimRefsPass());
259 // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
260 PM.add(createPreSelectionPass(TM));
261 PM.add(createLowerSelectPass());
263 // Run basic LLVM dataflow optimizations, to clean up after pre-selection.
264 PM.add(createReassociatePass());
265 // FIXME: these passes crash the FunctionPassManager when being added...
266 //PM.add(createLICMPass());
267 //PM.add(createGCSEPass());
269 // If the user's trying to read the generated code, they'll need to see the
270 // transformed input.
271 if (PrintMachineCode)
272 PM.add(new PrintFunctionPass());
274 // Construct and initialize the MachineFunction object for this fn.
275 PM.add(createMachineCodeConstructionPass(TM));
277 PM.add(createSparcV9BurgInstSelector(TM));
279 if (PrintMachineCode)
280 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
282 PM.add(getRegisterAllocator(TM));
284 if (PrintMachineCode)
285 PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
287 PM.add(createPrologEpilogInsertionPass());
289 if (!DisablePeephole)
290 PM.add(createPeepholeOptsPass(TM));
292 if (PrintMachineCode)
293 PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));