1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // This file contains the code for the Sparc Target that does not fit in any of
4 // the other files in this directory.
6 //===----------------------------------------------------------------------===//
8 #include "SparcInternals.h"
9 #include "llvm/Target/TargetMachineImpls.h"
10 #include "llvm/Function.h"
11 #include "llvm/PassManager.h"
12 #include "llvm/Transforms/Scalar.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineFunctionInfo.h"
15 #include "llvm/CodeGen/PreSelection.h"
16 #include "llvm/CodeGen/StackSlots.h"
17 #include "llvm/CodeGen/PeepholeOpts.h"
18 #include "llvm/CodeGen/InstrSelection.h"
19 #include "llvm/CodeGen/InstrScheduling.h"
20 #include "llvm/CodeGen/RegisterAllocation.h"
21 #include "llvm/CodeGen/MachineCodeForInstruction.h"
22 #include "llvm/Reoptimizer/Mapping/MappingInfo.h"
23 #include "Support/CommandLine.h"
24 #include "llvm/Assembly/PrintModulePass.h"
26 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
27 // Build the MachineInstruction Description Array...
28 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
29 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
30 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
31 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
32 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
33 ImplicitRegUseList, ImplicitRegUseList },
34 #include "SparcInstr.def"
37 //---------------------------------------------------------------------------
38 // Command line options to control choice of code generation passes.
39 //---------------------------------------------------------------------------
41 static cl::opt<bool> DisablePreSelect("nopreselect",
42 cl::desc("Disable preselection pass"));
44 static cl::opt<bool> DisableSched("nosched",
45 cl::desc("Disable local scheduling pass"));
47 static cl::opt<bool> DisablePeephole("nopeephole",
48 cl::desc("Disable peephole optimization pass"));
51 DisableStrip("disable-strip",
52 cl::desc("Do not strip the LLVM bytecode included in the executable"));
55 DumpAsm("dump-asm", cl::desc("Print bytecode before native code generation"),
58 //----------------------------------------------------------------------------
59 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
60 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
61 //----------------------------------------------------------------------------
63 TargetMachine *allocateSparcTargetMachine(unsigned Configuration) {
64 return new UltraSparc();
67 //---------------------------------------------------------------------------
68 // class UltraSparcFrameInfo
70 // Interface to stack frame layout info for the UltraSPARC.
71 // Starting offsets for each area of the stack frame are aligned at
72 // a multiple of getStackFrameSizeAlignment().
73 //---------------------------------------------------------------------------
76 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
79 pos = false; // static stack area grows downwards
80 return StaticAreaOffsetFromFP;
84 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
87 // ensure no more auto vars are added
88 mcInfo.getInfo()->freezeAutomaticVarsArea();
90 pos = false; // static stack area grows downwards
91 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
92 return StaticAreaOffsetFromFP - autoVarsSize;
96 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
99 MachineFunctionInfo *MFI = mcInfo.getInfo();
100 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
101 MFI->freezeSpillsArea(); // ensure no more spill slots are added
103 pos = false; // static stack area grows downwards
104 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
105 unsigned spillAreaSize = MFI->getRegSpillsSize();
106 int offset = autoVarsSize + spillAreaSize;
107 return StaticAreaOffsetFromFP - offset;
111 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
114 // Dynamic stack area grows downwards starting at top of opt-args area.
115 // The opt-args, required-args, and register-save areas are empty except
116 // during calls and traps, so they are shifted downwards on each
117 // dynamic-size alloca.
119 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
120 if (int extra = optArgsSize % getStackFrameSizeAlignment())
121 optArgsSize += (getStackFrameSizeAlignment() - extra);
122 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
123 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
127 //---------------------------------------------------------------------------
128 // class UltraSparcMachine
131 // Primary interface to machine description for the UltraSPARC.
132 // Primarily just initializes machine-dependent parameters in
133 // class TargetMachine, and creates machine-dependent subclasses
134 // for classes such as TargetInstrInfo.
136 //---------------------------------------------------------------------------
138 UltraSparc::UltraSparc()
139 : TargetMachine("UltraSparc-Native", false),
148 // addPassesToEmitAssembly - This method controls the entire code generation
149 // process for the ultra sparc.
151 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
153 // The following 3 passes used to be inserted specially by llc.
154 // Replace malloc and free instructions with library calls.
155 PM.add(createLowerAllocationsPass());
157 // If LLVM dumping after transformations is requested, add it to the pipeline
159 PM.add(new PrintFunctionPass("Code after xformations: \n", &std::cerr));
161 // Strip all of the symbols from the bytecode so that it will be smaller...
163 PM.add(createSymbolStrippingPass());
165 // FIXME: implement the switch instruction in the instruction selector.
166 PM.add(createLowerSwitchPass());
168 // Construct and initialize the MachineFunction object for this fn.
169 PM.add(createMachineCodeConstructionPass(*this));
171 //Insert empty stackslots in the stack frame of each function
172 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
173 PM.add(createStackSlotsPass(*this));
175 // Specialize LLVM code for this target machine and then
176 // run basic dataflow optimizations on LLVM code.
177 if (!DisablePreSelect) {
178 PM.add(createPreSelectionPass(*this));
179 PM.add(createReassociatePass());
180 PM.add(createLICMPass());
181 PM.add(createGCSEPass());
184 PM.add(createInstructionSelectionPass(*this));
187 PM.add(createInstructionSchedulingWithSSAPass(*this));
189 PM.add(getRegisterAllocator(*this));
191 PM.add(getPrologEpilogInsertionPass());
193 if (!DisablePeephole)
194 PM.add(createPeepholeOptsPass(*this));
196 PM.add(getMappingInfoCollector(Out));
198 // Output assembly language to the .s file. Assembly emission is split into
199 // two parts: Function output and Global value output. This is because
200 // function output is pipelined with all of the rest of code generation stuff,
201 // allowing machine code representations for functions to be free'd after the
202 // function has been emitted.
204 PM.add(getFunctionAsmPrinterPass(Out));
205 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
207 // Emit Module level assembly after all of the functions have been processed.
208 PM.add(getModuleAsmPrinterPass(Out));
210 // Emit bytecode to the assembly file into its special section next
211 PM.add(getEmitBytecodeToAsmPass(Out));
212 PM.add(getFunctionInfo(Out));
216 // addPassesToJITCompile - This method controls the JIT method of code
217 // generation for the UltraSparc.
219 bool UltraSparc::addPassesToJITCompile(PassManager &PM) {
220 const TargetData &TD = getTargetData();
222 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
223 TD.getPointerAlignment(), TD.getDoubleAlignment()));
225 // Replace malloc and free instructions with library calls.
226 // Do this after tracing until lli implements these lib calls.
227 // For now, it will emulate malloc and free internally.
228 PM.add(createLowerAllocationsPass());
230 // FIXME: implement the switch instruction in the instruction selector.
231 PM.add(createLowerSwitchPass());
233 // Construct and initialize the MachineFunction object for this fn.
234 PM.add(createMachineCodeConstructionPass(*this));
236 PM.add(createInstructionSelectionPass(*this));
238 // new pass: convert Value* in MachineOperand to an unsigned register
239 // this brings it in line with what the X86 JIT's RegisterAllocator expects
240 //PM.add(createAddRegNumToValuesPass());
242 PM.add(getRegisterAllocator(*this));
243 PM.add(getPrologEpilogInsertionPass());
245 if (!DisablePeephole)
246 PM.add(createPeepholeOptsPass(*this));
248 return false; // success!